diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/eagle.h | 19 | ||||
| -rw-r--r-- | include/configs/v3hsk.h | 28 |
2 files changed, 28 insertions, 19 deletions
diff --git a/include/configs/eagle.h b/include/configs/eagle.h deleted file mode 100644 index c751f75a7d0..00000000000 --- a/include/configs/eagle.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * include/configs/eagle.h - * This file is Eagle board configuration. - * - * Copyright (C) 2015 Renesas Electronics Corporation - */ - -#ifndef __EAGLE_H -#define __EAGLE_H - -#include "rcar-gen3-common.h" - -/* Environment compatibility */ - -/* Board Clock */ -/* XTAL_CLK : 33.33MHz */ - -#endif /* __EAGLE_H */ diff --git a/include/configs/v3hsk.h b/include/configs/v3hsk.h new file mode 100644 index 00000000000..58c2e88c0b7 --- /dev/null +++ b/include/configs/v3hsk.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * include/configs/v3hsk.h + * This file is V3HSK board configuration. + * + * Copyright (C) 2019 Renesas Electronics Corporation + * Copyright (C) 2019 Cogent Embedded, Inc. + */ + +#ifndef __V3HSK_H +#define __V3HSK_H + +#include "rcar-gen3-common.h" + +/* Environment compatibility */ + +/* SH Ether */ +#define CFG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_PHY_ADDR 0x0 +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII_ID +#define CFG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_ALIGNE_SIZE 64 + +/* Board Clock */ +/* XTAL_CLK : 33.33MHz */ + +#endif /* __V3HSK_H */ |