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-rw-r--r--include/configs/dh_imx6.h2
-rw-r--r--include/configs/imx6ulz_smm_m2.h78
-rw-r--r--include/configs/imxrt1170-evk.h29
-rw-r--r--include/configs/librem5.h95
-rw-r--r--include/configs/verdin-imx8mm.h10
-rw-r--r--include/configs/verdin-imx8mp.h10
-rw-r--r--include/dt-bindings/clock/imxrt1170-clock.h48
-rw-r--r--include/dt-bindings/memory/imxrt-sdram.h1
8 files changed, 264 insertions, 9 deletions
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 79424647f61..0f7e1c5c451 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -60,7 +60,7 @@
"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
"update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \
"load mmc 0:1 ${loadaddr} /boot/u-boot-with-spl.imx && "\
- "sf probe && sf erase 0x0 0xa0000 && " \
+ "sf probe && sf erase 0x0 0x100000 && " \
"sf write ${loadaddr} 0x400 ${filesize}\0" \
BOOTENV
diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h
new file mode 100644
index 00000000000..50885c53b3b
--- /dev/null
+++ b/include/configs/imx6ulz_smm_m2.h
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2021 Amarula Solutions B.V.
+ *
+ */
+#ifndef __IMX6ULZ_SMM_M2_CONFIG_H
+#define __IMX6ULZ_SMM_M2_CONFIG_H
+
+#include "mx6_common.h"
+
+#include <asm/arch/imx-regs.h>
+#include <linux/sizes.h>
+#include <linux/stringify.h>
+
+/* SPL options */
+#include "imx6_spl.h"
+
+#define CONFIG_MXC_UART_BASE UART4_BASE
+
+#ifndef CONFIG_SPL_BUILD
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(NAND, nand, 0) \
+
+#include <config_distro_bootcmd.h>
+
+#endif /* !CONFIG_SPL_BUILD */
+
+#define MEM_LAYOUT_ENV_SETTINGS \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "fdt_addr_r=0x81000000\0" \
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "bootcmd_mfg=echo Running fastboot mode; fastboot usb 0\0" \
+
+#define NANDARGS \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ CONFIG_MTDPARTS_DEFAULT "\0" \
+ "nandargs=setenv bootargs " \
+ "${optargs} " \
+ "mtdparts=${mtdparts} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:root rw ubi.mtd=rootfs\0" \
+ "nandrootfstype=ubifs rootwait=1\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${fdt_addr_r} nanddtb; " \
+ "nand read ${loadaddr} kernel; " \
+ "bootz ${loadaddr} - ${fdt_addr_r}\0"
+
+#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
+ "bootcmd_" #devtypel #instance "=" \
+ "run nandboot\0"
+
+#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
+ #devtypel #instance " "
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ MEM_LAYOUT_ENV_SETTINGS \
+ NANDARGS \
+ BOOTENV
+
+/* Physical Memory Map */
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE SZ_128M
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+/* NAND */
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+
+#define CONFIG_SYS_NAND_BASE 0x20000000
+
+#endif
diff --git a/include/configs/imxrt1170-evk.h b/include/configs/imxrt1170-evk.h
new file mode 100644
index 00000000000..2459fe24e24
--- /dev/null
+++ b/include/configs/imxrt1170-evk.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022
+ * Author(s): Jesse Taube <[email protected]>
+ * Giulio Benetti <[email protected]>
+ */
+
+#ifndef __IMXRT1170_EVK_H
+#define __IMXRT1170_EVK_H
+
+#include <asm/arch/imx-regs.h>
+
+#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1
+
+/*
+ * Configuration of the external SDRAM memory
+ */
+
+#define PHYS_SDRAM 0x80000000
+#define PHYS_SDRAM_SIZE (64 * 1024 * 1024)
+
+#define DMAMEM_SZ_ALL (1 * 1024 * 1024)
+#define DMAMEM_BASE (PHYS_SDRAM + PHYS_SDRAM_SIZE - \
+ DMAMEM_SZ_ALL)
+/* For SPL */
+#define CONFIG_SYS_UBOOT_START 0x202403FD
+/* For SPL ends */
+
+#endif /* __IMXRT1170_EVK_H */
diff --git a/include/configs/librem5.h b/include/configs/librem5.h
new file mode 100644
index 00000000000..389469aec54
--- /dev/null
+++ b/include/configs/librem5.h
@@ -0,0 +1,95 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2017 NXP
+ * Copyright 2018 Emcraft Systems
+ * Copyright 2022 Purism
+ *
+ */
+
+#ifndef __LIBREM5_H
+#define __LIBREM5_H
+
+/* #define DEBUG */
+
+#include <version.h>
+#include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+
+#ifdef CONFIG_SPL_BUILD
+
+#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
+
+#define CONFIG_POWER_BD71837
+#define CONFIG_POWER_BD71837_I2C_BUS 0
+#define CONFIG_POWER_BD71837_I2C_ADDR 0x4B
+
+#endif /* CONFIG_SPL_BUILD*/
+
+#define CONFIG_SYS_FSL_USDHC_NUM 2
+
+#define CONFIG_USBD_HS
+
+#define CONSOLE_ON_UART1
+
+#ifdef CONSOLE_ON_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONSOLE_UART_CLK 0
+#define CONSOLE "ttymxc0"
+#elif defined(CONSOLE_ON_UART2)
+#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONSOLE_UART_CLK 1
+#define CONSOLE "ttymxc1"
+#elif defined(CONSOLE_ON_UART3)
+#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
+#define CONSOLE_UART_CLK 2
+#define CONSOLE "ttymxc2"
+#elif defined(CONSOLE_ON_UART4)
+#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
+#define CONSOLE_UART_CLK 3
+#define CONSOLE "ttymxc3"
+#else
+#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONSOLE_UART_CLK 0
+#define CONSOLE "ttymxc0"
+#endif
+
+#ifndef CONFIG_SPL_BUILD
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(USB, usb, 0) \
+ func(DHCP, dhcp, na)
+#include <config_distro_bootcmd.h>
+#else
+#define BOOTENV
+#endif
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "scriptaddr=0x80000000\0" \
+ "pxefile_addr_r=0x80100000\0" \
+ "kernel_addr_r=0x80800000\0" \
+ "fdt_addr_r=0x84800000\0" \
+ "ramdisk_addr_r=0x85000000\0" \
+ "console=" CONSOLE ",115200\0" \
+ "bootargs=u_boot_version=" PLAIN_VERSION "\0" \
+ "stdin=usbacm,serial\0" \
+ "stdout=usbacm,serial\0" \
+ "stderr=usbacm,serial\0" \
+ BOOTENV
+
+/* Link Definitions */
+
+#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
+
+#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define PHYS_SDRAM 0x40000000
+#define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB LPDDR4 one Rank */
+
+/* Monitor Command Prompt */
+
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+
+#endif
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 5b5fce9bda1..4d20b86591f 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -20,10 +20,12 @@
#endif
#define MEM_LAYOUT_ENV_SETTINGS \
- "fdt_addr_r=0x44000000\0" \
- "kernel_addr_r=0x42000000\0" \
- "ramdisk_addr_r=0x46400000\0" \
- "scriptaddr=0x46000000\0"
+ "fdt_addr_r=0x50200000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_comp_addr_r=0x40200000\0" \
+ "kernel_comp_size=0x08080000\0" \
+ "ramdisk_addr_r=0x50300000\0" \
+ "scriptaddr=0x50280000\0"
/* Enable Distro Boot */
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index fca40beba18..9b8db223bb2 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -34,10 +34,12 @@
#endif /* CONFIG_CMD_NET */
#define MEM_LAYOUT_ENV_SETTINGS \
- "fdt_addr_r=0x43000000\0" \
- "kernel_addr_r=0x40000000\0" \
- "ramdisk_addr_r=0x46400000\0" \
- "scriptaddr=0x46000000\0"
+ "fdt_addr_r=0x50200000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_comp_addr_r=0x40200000\0" \
+ "kernel_comp_size=0x08080000\0" \
+ "ramdisk_addr_r=0x50300000\0" \
+ "scriptaddr=0x50280000\0"
/* Enable Distro Boot */
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/dt-bindings/clock/imxrt1170-clock.h b/include/dt-bindings/clock/imxrt1170-clock.h
new file mode 100644
index 00000000000..8ab8018a15e
--- /dev/null
+++ b/include/dt-bindings/clock/imxrt1170-clock.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022
+ * Author(s): Jesse Taube <[email protected]>
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_IMXRT1170_H
+#define __DT_BINDINGS_CLOCK_IMXRT1170_H
+
+#define IMXRT1170_CLK_DUMMY 0
+#define IMXRT1170_CLK_OSC 1
+#define IMXRT1170_CLK_OSC_32K 2
+#define IMXRT1170_CLK_RCOSC_16M 3
+#define IMXRT1170_CLK_RCOSC_48M 4
+#define IMXRT1170_CLK_RCOSC_48M_DIV2 5
+#define IMXRT1170_CLK_RCOSC_400M 6
+#define IMXRT1170_CLK_PLL_ARM 7
+#define IMXRT1170_CLK_PLL_AUDIO 8
+#define IMXRT1170_CLK_PLL_VIDEO 9
+#define IMXRT1170_CLK_PLL1 10
+#define IMXRT1170_CLK_PLL1_DIV2 11
+#define IMXRT1170_CLK_PLL1_DIV5 12
+#define IMXRT1170_CLK_PLL2 13
+#define IMXRT1170_CLK_PLL2_PFD0 14
+#define IMXRT1170_CLK_PLL2_PFD1 15
+#define IMXRT1170_CLK_PLL2_PFD2 16
+#define IMXRT1170_CLK_PLL2_PFD3 17
+#define IMXRT1170_CLK_PLL3 18
+#define IMXRT1170_CLK_PLL3_DIV2 19
+#define IMXRT1170_CLK_PLL3_PFD0 20
+#define IMXRT1170_CLK_PLL3_PFD1 21
+#define IMXRT1170_CLK_PLL3_PFD2 22
+#define IMXRT1170_CLK_PLL3_PFD3 23
+#define IMXRT1170_CLK_M7 24
+#define IMXRT1170_CLK_M4 25
+#define IMXRT1170_CLK_BUS 26
+#define IMXRT1170_CLK_BUS_LPSR 27
+#define IMXRT1170_CLK_LPUART1_SEL 28
+#define IMXRT1170_CLK_LPUART1 29
+#define IMXRT1170_CLK_USDHC1_SEL 30
+#define IMXRT1170_CLK_USDHC1 31
+#define IMXRT1170_CLK_GPT1_SEL 32
+#define IMXRT1170_CLK_GPT1 33
+#define IMXRT1170_CLK_SEMC_SEL 34
+#define IMXRT1170_CLK_SEMC 35
+#define IMXRT1170_CLK_END 36
+
+#endif /* __DT_BINDINGS_CLOCK_IMXRT1170_H */
diff --git a/include/dt-bindings/memory/imxrt-sdram.h b/include/dt-bindings/memory/imxrt-sdram.h
index acb35bce277..4b3b0c2f504 100644
--- a/include/dt-bindings/memory/imxrt-sdram.h
+++ b/include/dt-bindings/memory/imxrt-sdram.h
@@ -82,6 +82,7 @@
#define MEM_WIDTH_8BITS 0x0
#define MEM_WIDTH_16BITS 0x1
+#define MEM_WIDTH_32BITS 0x2
#define BL_1 0x0
#define BL_2 0x1
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-15 08:08:27 +0000