diff options
Diffstat (limited to 'include')
148 files changed, 4 insertions, 1052 deletions
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index 637de0c4558..1becc669aee 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -52,12 +52,6 @@ struct bd_info { unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(CONFIG_CPM2) - unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ - unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ - unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ - unsigned long bi_vco; /* VCO Out from PLL, in MHz */ -#endif #if defined(CONFIG_M68K) unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ #endif diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 3b4d1fd6265..ed971e5911e 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -31,7 +31,6 @@ /* * BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE /* * MEMORY ORGANIZATION diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 763cb8db7cf..c33616bf46b 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -29,11 +29,6 @@ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * MEMORY ORGANIZATION * -Monitor at top of sdram. * -The heap is placed below the monitor diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 9f4c3af4b8e..25f784e3980 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -22,11 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY @@ -52,7 +47,6 @@ #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) /* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ -#define CONFIG_BOOTFILE "u-boot.bin" #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 32671494d96..ff029213b52 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -24,11 +24,6 @@ #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ /* - * BOOTP options - */ -#undef CONFIG_BOOTP_BOOTFILESIZE - -/* * Clock configuration: enable only one of the following options */ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index df89a0f9613..c3fcf73a5d9 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -32,11 +32,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 7926ed44dc9..78904acb7bb 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -33,11 +33,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Available command configuration */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index df95eead1cd..cf87795eda9 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -30,11 +30,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 538d9c21978..8bbc5f47746 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -295,11 +295,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR @@ -329,7 +324,6 @@ #define CONFIG_HOSTNAME "mpc837x_rdb" #define CONFIG_ROOTPATH "/nfsroot" #define CONFIG_RAMDISKFILE "rootfs.ext2.gz.uboot" -#define CONFIG_BOOTFILE "uImage" /* U-Boot image on TFTP server */ #define CONFIG_UBOOTPATH "u-boot.bin" #define CONFIG_FDTFILE "mpc8379_rdb.dtb" diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h deleted file mode 100644 index 57097b17eb1..00000000000 --- a/include/configs/MPC8540ADS.h +++ /dev/null @@ -1,303 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2004, 2011 Freescale Semiconductor. - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <[email protected]> - */ - -/* - * mpc8540ads board configuration file - * - * Please refer to doc/README.mpc85xx for more info. - * - * Make sure you change the MAC address and other network params first, - * search for CONFIG_SERVERIP, etc in this file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * default CCARBAR is at 0xff700000 - * assume U-Boot is less than 0.5MB - */ - -#ifndef CONFIG_HAS_FEC -#define CONFIG_HAS_FEC 1 /* 8540 has FEC */ -#endif - -/* - * sysclk for MPC85xx - * - * Two valid values are: - * 33000000 - * 66000000 - * - * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz - * is likely the desired value here, so that is now the default. - * The board, however, can run at 66MHz. In any event, this value - * must match the settings of some switches. Details can be found - * in the README.mpc85xxads. - * - * XXX -- Can't we run at 66 MHz, anyway? PCI should drop to - * 33MHz to accommodate, based on a PCI pin. - * Note that PCI-X won't work at 33MHz. - */ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ - -/* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 128 /* DDR is 128MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007 /* 0-128MB */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002 -#define CONFIG_SYS_DDR_TIMING_1 0x37344321 -#define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ -#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ -#define CONFIG_SYS_DDR_MODE 0x00000062 /* DLL,normal,seq,4/2.5 */ -#define CONFIG_SYS_DDR_INTERVAL 0x05200100 /* autocharge,no open page */ - -/* - * SDRAM on the Local Bus - */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ - -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* - * Local Bus Definitions - */ - -/* - * Base Register 2 and Option Register 2 configure SDRAM. - * The SDRAM base address, CONFIG_SYS_LBC_SDRAM_BASE, is 0xf0000000. - * - * For BR2, need: - * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0 - * port-size = 32-bits = BR2[19:20] = 11 - * no parity checking = BR2[21:22] = 00 - * SDRAM for MSEL = BR2[24:26] = 011 - * Valid = BR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861 - * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into - * FIXME: the top 17 bits of BR2. - */ - -/* - * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. - * - * For OR2, need: - * 64MB mask for AM, OR2[0:7] = 1111 1100 - * XAM, OR2[17:18] = 11 - * 9 columns OR2[19-21] = 010 - * 13 rows OR2[23-25] = 100 - * EAD set for extra time OR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 - */ - -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ - -#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \ - | LSDMR_RFCR5 \ - | LSDMR_PRETOACT3 \ - | LSDMR_ACTTORW3 \ - | LSDMR_BL8 \ - | LSDMR_WRC2 \ - | LSDMR_CL3 \ - | LSDMR_RFEN \ - ) - -/* - * SDRAM Controller configuration sequence. - */ -#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL) -#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) -#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) - -/* - * 32KB, 8-bit wide for ADS config reg - */ -#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ - -/* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) - -/* - * I2C - */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } - -/* RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000 -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ -#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 -#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 -#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ - -#if defined(CONFIG_PCI) - -#if !defined(CONFIG_PCI_PNP) - #define PCI_ENET0_IOADDR 0xe0000000 - #define PCI_ENET0_MEMADDR 0xe0000000 - #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */ -#endif - -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ - -#endif /* CONFIG_PCI */ - -#if defined(CONFIG_TSEC_ENET) - -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT - -#if CONFIG_HAS_FEC -#define CONFIG_MPC85XX_FEC 1 -#define CONFIG_MPC85XX_FEC_NAME "FEC" -#define FEC_PHY_ADDR 3 -#define FEC_PHYIDX 0 -#define FEC_FLAGS 0 -#endif - -/* Options are: TSEC[0-1], FEC */ -#define CONFIG_ETHPRIME "TSEC0" - -#endif /* CONFIG_TSEC_ENET */ - -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* - * Miscellaneous configurable options - */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -/* - * Environment Configuration - */ - -/* The mac addresses for all ethernet interface */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#endif - -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "your.uImage" - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=your.fdt.dtb\0" - -#endif /* __CONFIG_H */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index e16d870a5e6..093061b52ff 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -30,7 +30,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ /* * Only possible on E500 Version 2 or newer cores. @@ -49,7 +48,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ @@ -376,11 +374,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * Miscellaneous configurable options */ @@ -406,7 +399,6 @@ #define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "8548cds/uImage.uboot" #define CONFIG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */ #define CONFIG_SERVERIP 192.168.1.1 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h deleted file mode 100644 index d23cf0e41aa..00000000000 --- a/include/configs/MPC8560ADS.h +++ /dev/null @@ -1,292 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2004, 2011 Freescale Semiconductor. - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <[email protected]> - */ - -/* - * mpc8560ads board configuration file - * - * Please refer to doc/README.mpc85xx for more info. - * - * Make sure you change the MAC address and other network params first, - * search for CONFIG_SERVERIP, etc. in this file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <linux/delay.h> - -/* High Level Configuration Options */ -#define CONFIG_CPM2 1 /* has CPM2 */ - -/* - * default CCARBAR is at 0xff700000 - * assume U-Boot is less than 0.5MB - */ - -#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ - -/* - * sysclk for MPC85xx - * - * Two valid values are: - * 33000000 - * 66000000 - * - * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz - * is likely the desired value here, so that is now the default. - * The board, however, can run at 66MHz. In any event, this value - * must match the settings of some switches. Details can be found - * in the README.mpc85xxads. - */ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ - -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ - -/* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 128 /* DDR is 128MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007 /* 0-128MB */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002 -#define CONFIG_SYS_DDR_TIMING_1 0x37344321 -#define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ -#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ -#define CONFIG_SYS_DDR_MODE 0x00000062 /* DLL,normal,seq,4/2.5 */ -#define CONFIG_SYS_DDR_INTERVAL 0x05200100 /* autocharge,no open page */ - -/* - * SDRAM on the Local Bus - */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ - -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* - * Local Bus Definitions - */ - -/* - * Base Register 2 and Option Register 2 configure SDRAM. - * The SDRAM base address, CONFIG_SYS_LBC_SDRAM_BASE, is 0xf0000000. - * - * For BR2, need: - * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0 - * port-size = 32-bits = BR2[19:20] = 11 - * no parity checking = BR2[21:22] = 00 - * SDRAM for MSEL = BR2[24:26] = 011 - * Valid = BR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861 - * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into - * FIXME: the top 17 bits of BR2. - */ - -/* - * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. - * - * For OR2, need: - * 64MB mask for AM, OR2[0:7] = 1111 1100 - * XAM, OR2[17:18] = 11 - * 9 columns OR2[19-21] = 010 - * 13 rows OR2[23-25] = 100 - * EAD set for extra time OR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 - */ - -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ - -#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \ - | LSDMR_RFCR5 \ - | LSDMR_PRETOACT3 \ - | LSDMR_ACTTORW3 \ - | LSDMR_BL8 \ - | LSDMR_WRC2 \ - | LSDMR_CL3 \ - | LSDMR_RFEN \ - ) - -/* - * SDRAM Controller configuration sequence. - */ -#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL) -#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) -#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) - -/* - * 32KB, 8-bit wide for ADS config reg - */ -#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ - -/* Serial Port */ -#define CONFIG_CONS_ON_SCC /* define if console on SCC */ - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -/* - * I2C - */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } - -/* RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000 -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ -#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 -#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 -#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ - -#if defined(CONFIG_PCI) - -#if !defined(CONFIG_PCI_PNP) - #define PCI_ENET0_IOADDR 0xe0000000 - #define PCI_ENET0_MEMADDR 0xe0000000 - #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */ -#endif - -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ - -#endif /* CONFIG_PCI */ - -#ifdef CONFIG_TSEC_ENET - -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT - -/* Options are: TSEC[0-1] */ -#define CONFIG_ETHPRIME "TSEC0" - -#endif /* CONFIG_TSEC_ENET */ - -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -/* - * Environment Configuration - */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#define CONFIG_HAS_ETH3 -#endif - -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "your.uImage" - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyCPM\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=mpc8560ads.dtb\0" - -#endif /* __CONFIG_H */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 106d1e6a4b7..5f36951932d 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -151,7 +151,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -171,7 +170,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* DDR3 Controller Settings */ #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f @@ -613,7 +611,6 @@ extern unsigned long get_sdram_size(void); #endif #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -643,10 +640,10 @@ extern unsigned long get_sdram_size(void); "ext2load usb 0:4 $fdtaddr $fdtfile;" \ "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \ "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \ - CONFIG_BOOTMODE + BOOTMODE #if defined(CONFIG_TARGET_P1010RDB_PA) -#define CONFIG_BOOTMODE \ +#define BOOTMODE \ "boot_bank0=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \ "mw.b ffb00011 0; mw.b ffb00009 0; reset\0" \ "boot_bank1=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \ @@ -655,7 +652,7 @@ extern unsigned long get_sdram_size(void); "mw.b ffb00011 0; mw.b ffb00017 1; reset\0" #elif defined(CONFIG_TARGET_P1010RDB_PB) -#define CONFIG_BOOTMODE \ +#define BOOTMODE \ "boot_bank0=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \ "i2c mw 19 1 2; i2c mw 19 3 e1; reset\0" \ "boot_bank1=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e6d5321070b..045d9114933 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -58,7 +58,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -94,7 +93,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 @@ -414,7 +412,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin #define __USB_PHY_TYPE utmi diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index d24cfce8b3b..f803b51f458 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -121,7 +121,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -153,7 +152,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -373,7 +371,6 @@ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) #define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS /* * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so * disable empty flash sector detection, which is I/O-intensive. @@ -535,7 +532,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9433f14227b..8a71807679e 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -98,7 +98,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -133,7 +132,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -553,7 +551,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a41f9f0d9b8..76e00cc095d 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -88,7 +88,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -118,7 +117,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 @@ -539,7 +537,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 7165ba08283..35064fec7e4 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -83,7 +83,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -113,7 +112,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 @@ -492,7 +490,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index daccd816c10..8c9e5806e0b 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -65,7 +65,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -94,7 +93,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 /* * IFC Definitions @@ -216,7 +214,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define HVBOOT \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 63805d3321c..456ed434332 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -44,9 +44,6 @@ #endif /* CONFIG_MTD_RAW_NAND */ /* Environment information */ - -#define CONFIG_BOOTFILE "uImage" - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 96526e1a75c..0954bc02aa2 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -33,9 +33,4 @@ * NS16550 Configuration */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #endif /* __AST_COMMON_CONFIG_H */ diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index b93c67be52a..669a8ec7c7a 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -15,11 +15,6 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_SD_BOOT #else diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index c9344e862ae..820c6a921be 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -40,11 +40,6 @@ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - -/* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 7fce98f0038..995b00953a6 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -39,11 +39,6 @@ #define CONFIG_ATMEL_LCD_BGR555 #endif -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 485211c42f5..f523d4761bc 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -41,11 +41,6 @@ #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 973e8894d67..a6f0844443d 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -32,11 +32,6 @@ /* board specific(not enough SRAM) */ #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index f102dbe5c93..1771defa164 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -23,11 +23,6 @@ #define CONFIG_LCD_INFO_BELOW_LOGO #define CONFIG_ATMEL_LCD_RGB565 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index e6d5b9925d3..47c55ba4a0f 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -16,11 +16,6 @@ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) * NB: in this case, USB 1.1 devices won't be recognized. */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index c02d25c03b7..8d74df4f735 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -58,11 +58,6 @@ "; fi\0" /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 2135ba700e9..4f8da594043 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -29,7 +29,6 @@ #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 7ab7f559e3e..612999fbabe 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif /* !CONFIG_SYS_L2CACHE_OFF */ -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK /* MMC */ diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h index 05915b4cffd..9d5a038de8f 100644 --- a/include/configs/bur_cfg_common.h +++ b/include/configs/bur_cfg_common.h @@ -27,7 +27,6 @@ #define CONFIG_NET_RETRY_COUNT 10 /* Network console */ -#define CONFIG_BOOTP_MAY_FAIL /* if we don't have DHCP environment */ /* As stated above, the following choices are optional. */ diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index 9d5a63cabaa..e29be3fda4a 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -15,9 +15,6 @@ #include <configs/x86-common.h> #include <configs/x86-chromebook.h> -/* We can rely on running natively, and this saves code size */ -#undef CONFIG_BIOSEMU - #undef CONFIG_STD_DEVICES_SETTINGS #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 81315f6ec7b..9d3ee7f2245 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -88,11 +88,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 975f745c98a..6cb75e59d80 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -51,8 +51,6 @@ #define DM9000_IO (CONFIG_DM9000_BASE) #define DM9000_DATA (CONFIG_DM9000_BASE + 4) #define CONFIG_NET_RETRY_COUNT 10 - -#define CONFIG_BOOTP_BOOTFILESIZE #endif /* diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 7fb96e8ad59..cad5796cbce 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -76,7 +76,6 @@ #define CONFIG_HOSTNAME "ccdc" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "ccdc.img" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth1\0" \ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index bd264122da7..c5a8567e1f6 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -59,7 +59,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -97,7 +96,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 @@ -411,7 +409,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #ifdef CONFIG_TARGET_P4080DS diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 27284f79138..5347115a14c 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -42,12 +42,6 @@ #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 956a9659019..fa7afabd517 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -155,7 +155,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 7baae3b090d..41d469d7952 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -72,6 +72,5 @@ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SPD_EEPROM 0x4e -#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index f30958f0d35..0a701e7dd03 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -94,8 +94,6 @@ * U-Boot Commands */ -#define CONFIG_BOOTFILE "uImage" - /* * SPL specific defines */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 3059bc0ad23..0637c7d9885 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -47,10 +47,6 @@ /* TWL4030 */ /* BOOTP/DHCP options */ -#define CONFIG_BOOTP_NISDOMAIN -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_TIMEOFFSET -#undef CONFIG_BOOTP_VENDOREX /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/draak.h b/include/configs/draak.h index e3e2b6a0bdd..c66a481dadb 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -19,7 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 9f765fa4937..43a179f013b 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -30,9 +30,6 @@ * it has to be done after each HCD reset */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index e71dd24a034..229e1a323b6 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -26,9 +26,6 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 19000000 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifndef CONFIG_SPL_BUILD #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 6ad8722d60b..d983cb77b18 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -32,11 +32,6 @@ * Environment is in the second sector of the first 256k of flash * *----------------------------------------------------------------------*/ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #define CONFIG_MCFTMR #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 178b050a12f..cbd1445636f 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -21,7 +21,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index 2ceefed9340..f1b2ddae34a 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -18,7 +18,6 @@ /* * Environment */ -#define CONFIG_BOOTFILE "app.bin" #define CONFIG_EXTRA_ENV_SETTINGS \ "upgrade_image=u-boot.bin\0" \ diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 2495db93f8d..d936b7f09fc 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -10,8 +10,6 @@ #include <configs/exynos7420-common.h> -#define CONFIG_BOARD_COMMON - #define CONFIG_ESPRESSO7420 #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index d88c14ac446..ef91146d2c1 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -105,7 +105,6 @@ /* DHCP/BOOTP options */ #ifdef CONFIG_CMD_DHCP -#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_SYS_AUTOLOAD "n" #endif diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 52dcf7a3bc4..4202c626126 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -12,8 +12,6 @@ #include "exynos-common.h" -#define CONFIG_BOARD_COMMON - /* SD/MMC configuration */ #define CONFIG_MMC_DEFAULT_DEV 0 diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 90d095d535b..410243bb2c9 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -58,30 +58,6 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 -#define CONFIG_SECURE_BL1_ONLY - -/* Secure FW size configuration */ -#ifdef CONFIG_SECURE_BL1_ONLY -#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ -#else -#define CONFIG_SEC_FW_SIZE 0 -#endif - -/* Configuration of BL1, BL2, ENV Blocks on mmc */ -#define CONFIG_RES_BLOCK_SIZE (512) -#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ -#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ - -#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) -#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) - -/* U-Boot copy size from boot Media to DRAM.*/ -#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) -#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) - -#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 -#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) - /* SPI */ /* Ethernet Controllor Driver */ diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index 00b67787d9e..bcbdfa7ae35 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -21,8 +21,6 @@ #define FLASH_SIZE (4 << 20) #define CONFIG_SPI_BOOTING -#define CONFIG_BOARD_COMMON - /* Display */ #ifdef CONFIG_LCD #define CONFIG_EXYNOS_FB diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 8d3449f028c..6b1df63dc32 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -36,8 +36,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} -#define CONFIG_BOARD_COMMON - #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - GENERATED_GBL_DATA_SIZE) /* DRAM Memory Banks */ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 7e13464b106..7a08c334eb4 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -83,7 +83,6 @@ /* TODO: Turn into string option and migrate to Kconfig */ #define CONFIG_HOSTNAME "gazerbeam" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index c5f9bcea8e7..29a0d943864 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -41,9 +41,6 @@ #define CONFIG_HIKEY_GPIO -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Initial environment variables */ /* diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 21a984a53d4..09fbbe90f1b 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -104,7 +104,6 @@ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" /* * Environment configuration */ -#define CONFIG_BOOTFILE "uImage" /* Cli configuration */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index c8c28bb4f04..aa00b0f4523 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -100,11 +100,6 @@ setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \ setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" -/* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - /* Cli configuration */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 8de89a467c2..08b9ec7c6cf 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -199,7 +199,6 @@ /* * U-Boot environment setup */ -#define CONFIG_BOOTP_BOOTFILESIZE /* * The reserved memory @@ -214,7 +213,6 @@ #define CONFIG_NETDEV eth1 #define CONFIG_HOSTNAME "ids8313" #define CONFIG_ROOTPATH "/opt/eldk-4.2/ppc_6xx" -#define CONFIG_BOOTFILE "ids8313/uImage" #define CONFIG_UBOOTPATH "ids8313/u-boot.bin" #define CONFIG_FDTFILE "ids8313/ids8313.dtb" #define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mo,eth1addr:mo" diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 6d7d798fd6c..91116f1021b 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -19,11 +19,6 @@ /* Integrator/AP-specific configuration */ #define CONFIG_SYS_HZ_CLOCK 24000000 /* Timer 1 is clocked at 24Mhz */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Flash settings */ #define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */ #define CONFIG_SYS_MAX_FLASH_SECT 128 diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 3ff7bb933c4..467423d21f0 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -29,7 +29,6 @@ #define CONFIG_SERVERIP 192.168.1.100 #define CONFIG_IPADDR 192.168.1.104 -#define CONFIG_BOOTFILE "uImage" /* * Miscellaneous configurable options diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index a1b8c066228..6092933cf58 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -68,10 +68,4 @@ CONFIG_SYS_SDRAM_BASE) - \ CONFIG_SYS_MALLOC_LEN - \ CONFIG_ENV_SIZE - -/* - * Environment - */ -#define CONFIG_BOOTFILE "app.bin" - #endif /* _CONFIG_IOT_DEVKIT_H_ */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index d321ebdb637..85cf516e162 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -27,11 +27,6 @@ #define CONFIG_LOADS_ECHO #define CONFIG_SYS_LOADS_BAUD_CHANGE -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS #define CONFIG_KM_DEF_ENV_BOOTPARAMS \ "actual_bank=0\0" diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 8453be84959..97f64530456 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 @@ -75,7 +74,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ca0cb31c296..707926f324c 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -152,7 +152,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -176,7 +175,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 448749a7f81..9eeb7ef9bfc 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -19,7 +19,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define CONFIG_VERY_BIG_RAM -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index b912db11d00..83bd6bc1508 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -50,7 +50,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 0263bb82893..8191c856a93 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -10,7 +10,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* SATA */ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index ef57cf6aaa3..7735a005e20 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -10,9 +10,7 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index c61865ccd4e..7d8d6ee085f 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -14,10 +14,8 @@ #define BOARD_REV_MASK 0x001A0000 /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define SYS_SDRAM_SIZE_512 0x20000000 #define SYS_SDRAM_SIZE_1024 0x40000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* ENV */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index cbcb3f72a56..d57f28e4967 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index c9a152e08a2..c51c4f2d3ea 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 2e5b804a4cb..4e5228aa219 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -59,8 +59,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * Serial Port */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 8c4cb7b7205..b6501e87b41 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -54,7 +54,6 @@ #define CONFIG_SYS_DDR_RAW_TIMING #endif #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -99,7 +98,6 @@ #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 5f6c2a00370..824078dd27d 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -77,8 +77,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index dcee79de884..fada8aa61db 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -79,8 +79,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * IFC Definitions */ @@ -121,7 +119,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index a517346c129..8bdfddcbc75 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -40,7 +40,6 @@ /* Miscellaneous configurable options */ /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index ea6831bb827..e9919cd05f7 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -92,7 +91,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 31b578ae33b..c904c9ca90b 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -62,7 +61,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 14ad84a1ef4..8425d17992c 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -11,7 +11,6 @@ #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_UBOOT_BASE 0x40100000 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 3d72c67a54f..2972e3beac2 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -105,7 +104,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 8ed1dceb234..f6ff6903292 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -13,7 +13,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 33b70c8d8f6..965fdfead24 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -132,7 +132,6 @@ unsigned long long get_qixis_addr(void); #endif /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f2725af0534..766da3969d2 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -139,7 +139,6 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ /* fixme: these need to be checked against the board */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 7554de1f6d3..1c59a89dbcf 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -27,7 +27,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 1c05b086778..de77872a709 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -37,7 +37,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index e31f8d087f7..c407fa8ba17 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -34,7 +34,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 8486cf8fc6e..98fb2640bc6 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -119,11 +119,6 @@ /* Watchdog */ /* - * Boot Linux - */ -#define CONFIG_BOOTFILE "boot/fitImage" - -/* * NAND SPL */ #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 073c5a57b2c..e4df9d8dfff 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -64,6 +64,5 @@ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 55f64b559c7..e841c94696b 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -38,11 +38,6 @@ */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index fd5a9cf8b8e..6bde4c29d7c 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -37,11 +37,6 @@ #define XILINX_DCACHE_BYTE_SIZE 32768 #endif -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* size of console buffer */ #define CONFIG_SYS_CBSIZE 512 /* max number of command args */ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 370f0002120..ab466b65ac4 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -22,9 +22,6 @@ /* Ethernet */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 552bf5ac630..3fb00031075 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -30,9 +30,6 @@ #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif -/* Boot Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environments */ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index caad95b7271..fe096d424c3 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -44,9 +44,6 @@ #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif -/* Boot Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "ubifs_file=filesystem.ubifs\0" \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 5ff931ee3bc..a0e481703bc 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -18,7 +18,6 @@ #endif #endif -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 75f5cf0b6de..319de9b0142 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -15,7 +15,6 @@ #include "imx7ulp_spl.h" #endif -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 /* diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 8f2cbc643ee..e80d748d991 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 1ce2f4e5622..c11d13a3483 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -25,7 +25,6 @@ */ /* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" #define CONFIG_HOSTNAME "novena" /* Physical Memory Map */ diff --git a/include/configs/nsim.h b/include/configs/nsim.h index 62169af676f..16c4935e720 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -23,11 +23,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_32M /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 536dff2bdfd..494f58baa34 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -21,9 +21,6 @@ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_BOOT_RETRY_MIN 30 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /** Extra environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=20080000\0" \ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 8185f4b6250..3ad6a595896 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -50,9 +50,6 @@ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_BOOT_RETRY_MIN 30 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* AHCI support Definitions */ #ifdef CONFIG_DM_SCSI /** Enable 48-bit SATA addressing */ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index a4825982a89..616f25eafd3 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -10,8 +10,6 @@ #include <configs/exynos5420-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define TZPC_BASE_OFFSET 0x10000 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 45297b9a612..e70f5fcfb30 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -146,7 +146,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "zImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 1caeed6ba5c..22325180ce0 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -58,9 +58,4 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 -/* U-Boot copy size from boot Media to DRAM.*/ -#define COPY_BL2_SIZE 0x80000 -#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) -#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) - #endif /* __CONFIG_H */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 92008cd38e4..926318993ae 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -145,7 +145,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE -#define CONFIG_BTB #define CONFIG_ENABLE_36BIT_PHYS @@ -165,10 +164,8 @@ #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 #else #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #endif #define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19)) #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 @@ -549,7 +546,6 @@ */ #define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #ifdef __SW_BOOT_NOR diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index bcc0781aade..00aebb99e09 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -51,11 +51,6 @@ #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_ARP_TIMEOUT 500 /* millisec */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /*-------------------------------------------------- * USB Configuration */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index f3196ee847b..3960a5cf96a 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -137,11 +137,6 @@ #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - /* SDRAM */ #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 4856f615276..8ee8bbb2192 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -150,11 +150,6 @@ #define CONFIG_LCD_IN_PSRAM 1 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - /* SDRAM */ #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index b2053916421..48b6e1c077f 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -22,11 +22,6 @@ /* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 30185b14b7a..3295d43ed67 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -36,9 +36,6 @@ #define CONFIG_SYS_SERIAL0 PER_UART0_CFG #define CONFIG_SYS_SERIAL1 PER_UART1_CFG -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM Bank #1 */ #define DDR_BASE 0x00000000 #define PHYS_SDRAM_1 DDR_BASE diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index d45f6068607..f5811076072 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -67,6 +67,5 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MAX_FLASH_SECT 256 /* Sector: 256K, Bank: 64M */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #endif /* __CONFIG_H */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index e257c0ec1f4..296361aa038 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -43,8 +43,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 0 - #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE @@ -93,7 +91,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #endif /* __QEMU_PPCE500_H */ diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 9542b0d1b59..1b3aa304d69 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -19,7 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index eb96e501fb4..7716ac27fb9 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -21,11 +21,6 @@ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) * NB: in this case, USB 1.1 devices won't be recognized. */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 8bfd1fcd25a..2a00bfa0d42 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -90,7 +90,6 @@ #define CONFIG_AT91_WANTS_COMMON_PHY /* BOOTP and DHCP options */ -#define CONFIG_BOOTP_BOOTFILESIZE #if !defined(CONFIG_SPL_BUILD) /* USB configuration */ diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index d7e86f2f764..1ea3b650cd2 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -15,6 +15,4 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 38691b63daf..f26995d5c1c 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -15,8 +15,6 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#define CONFIG_BOARD_COMMON - #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index f113fa44045..84b8537e54d 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -10,7 +10,6 @@ #include "exynos4-common.h" -#undef CONFIG_BOARD_COMMON #undef CONFIG_USB_GADGET_DWC2_OTG_PHY /* High Level Configuration Options */ @@ -51,11 +50,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 -/* U-Boot copy size from boot Media to DRAM.*/ -#define COPY_BL2_SIZE 0x80000 -#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) -#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) - /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_ENV_SROM_BANK 1 diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 10f8fde8d58..5820423a156 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -91,8 +91,6 @@ /* Boot options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Environment settings */ /* Console settings */ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 3889a88ae98..2377190a040 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -57,8 +57,6 @@ /* Boot options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/snow.h b/include/configs/snow.h index c082b2d82d8..00d9b4d4167 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -15,6 +15,4 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SNOW_H */ diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 0935eaedacb..5caffa62894 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -24,9 +24,6 @@ */ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -/* Booting Linux */ -#define CONFIG_BOOTFILE "zImage" - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Environment settings */ diff --git a/include/configs/socfpga_dbm_soc1.h b/include/configs/socfpga_dbm_soc1.h index 8acddbe8bb9..8f1c2de998e 100644 --- a/include/configs/socfpga_dbm_soc1.h +++ b/include/configs/socfpga_dbm_soc1.h @@ -10,9 +10,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" - /* Environment is in MMC */ /* Extra Environment */ diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index 06337d405c0..f387e403de1 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -11,9 +11,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x10000000 -/* Booting Linux */ -#define CONFIG_BOOTFILE "zImage" - /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_ARP_TIMEOUT 500UL diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index 3aa231c1521..e76438e228d 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -10,9 +10,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" - /* Environment is in MMC */ /* Extra Environment */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 51dc2e41880..a06ac6b5968 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -72,13 +72,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Environment variable */ - -#ifdef CONFIG_FIT -#define CONFIG_BOOTFILE "kernel.itb" -#else -#define CONFIG_BOOTFILE "Image" -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootfile=" CONFIG_BOOTFILE "\0" \ diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index d7674928150..2d4ce3ce44b 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -11,7 +11,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */ /* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */ /* Extra Environment */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index a51a162ee04..4d562d49c97 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -42,7 +42,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ @@ -61,7 +60,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */ @@ -170,11 +168,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * Miscellaneous configurable options */ diff --git a/include/configs/spring.h b/include/configs/spring.h index 0b052453a51..2f0a5807be0 100644 --- a/include/configs/spring.h +++ b/include/configs/spring.h @@ -10,6 +10,4 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SPRING_H */ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 4c464cfbe5a..3e6feae1fa3 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -31,7 +31,6 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x40000000\0" \ "fdtfile=stih410-b2260.dtb\0" \ diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 6e31bd5ddb6..290b5eba263 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -46,11 +46,6 @@ #define ETH1_BASE_ADDRESS 0xFE110000 /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 3d770f88bde..d07a8fe86bc 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_SERIAL0 0x87e024000000 #define CONFIG_SYS_SERIAL1 0x87e025000000 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index ca79b0352ad..57e6863cc43 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -19,7 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index c9d3c2dd064..834943a4fd5 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -79,7 +79,6 @@ #define CONFIG_ROOTPATH "/nfs/root/path" #ifdef CONFIG_FIT -#define CONFIG_BOOTFILE "fitImage" #define KERNEL_ADDR_R_OFFSET "0x05100000" #define LINUXBOOT_ENV_SETTINGS \ "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ @@ -87,11 +86,9 @@ "__nfsboot=run tftpboot\0" #else #ifdef CONFIG_ARM64 -#define CONFIG_BOOTFILE "Image" #define LINUXBOOT_CMD "booti" #define KERNEL_ADDR_R_OFFSET "0x02080000" #else -#define CONFIG_BOOTFILE "zImage" #define LINUXBOOT_CMD "bootz" #define KERNEL_ADDR_R_OFFSET "0x00208000" #endif diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index ffa69009a12..bc400292ca1 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -23,10 +23,6 @@ /* * Hardware drivers */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index f0c5ceb3849..b956bd91478 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -99,9 +99,6 @@ #define CONFIG_PL011_CLOCK 24000000 #endif -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 5f119aeb3df..4b958b44904 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -126,9 +126,6 @@ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000) diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index a43fd81e45d..2f02f96458f 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -68,12 +68,6 @@ */ /* - * Boot Linux - */ - -#define CONFIG_BOOTFILE "uImage" - -/* * SPL */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 0efc7156a6d..b45d2bbd626 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -24,7 +24,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xefff -#define CONFIG_BIOSEMU #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 394978b9d90..15fa8649384 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -62,12 +62,9 @@ * USB configuration */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Default environment */ #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_HOSTNAME "x86" -#define CONFIG_BOOTFILE "bzImage" #define CONFIG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) #define CONFIG_OTHBOOTARGS "othbootargs=\0" diff --git a/include/configs/xea.h b/include/configs/xea.h index acaf81dedeb..01942eaf2ba 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -31,11 +31,6 @@ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -/* Environment */ - -/* Booting Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_HOSTNAME "xea" diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index bc72f5f35ff..20f5a7271a2 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -27,10 +27,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_MAY_FAIL - /* Miscellaneous configurable options */ /* Monitor Command Prompt */ diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h index 00c97188198..a94ab1fd207 100644 --- a/include/configs/xilinx_versal_mini.h +++ b/include/configs/xilinx_versal_mini.h @@ -17,10 +17,6 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS -/* BOOTP options */ -#undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_MAY_FAIL - #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e51d92ffe4e..1f0da1a4b3e 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -27,10 +27,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_MAY_FAIL - #ifdef CONFIG_NAND_ARASAN # define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index c3c8b4cbf90..baef561c0b5 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -18,9 +18,6 @@ #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_INIT_SP_ADDR -/* BOOTP options */ -#undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_MAY_FAIL #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 8c2cdb5cbdd..c8cae598a3a 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -97,9 +97,6 @@ /* U-Boot general configuration */ /*==============================*/ -#define CONFIG_BOARD_POSTCLK_INIT - -#define CONFIG_BOOTFILE "uImage" /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 780952cf5f6..a66845338a4 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -28,7 +28,6 @@ /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_BOOTP_MAY_FAIL #endif /* NOR */ diff --git a/include/env_default.h b/include/env_default.h index 21afd7f7dcf..7004a6fef29 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -77,7 +77,7 @@ const char default_environment[] = { #ifdef CONFIG_HOSTNAME "hostname=" CONFIG_HOSTNAME "\0" #endif -#ifdef CONFIG_BOOTFILE +#ifdef CONFIG_USE_BOOTFILE "bootfile=" CONFIG_BOOTFILE "\0" #endif #ifdef CONFIG_SYS_LOAD_ADDR |