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2024-04-26rockchip: rk3588-turing-rk1: Use dwc3-generic driverJonas Karlman
RK35xx boards are expected to use the dwc3-generic driver and not the xhci-dwc3 driver. Remove the USB_XHCI_DWC3 option to ensure that the dwc3-generic driver is used. Fixes: 153ac950a599 ("board: rockchip: Add the Turing RK1 SoM") Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3588-toybrick: Add .dtb-file entry in MakefileJonas Karlman
Add Rockchip Toybrick TB-RK3588X .dtb-file entry in Makefile. Fixes: 9fdd9a546986 ("board: rockchip: add Rockchip Toybrick TB-RK3588X board") Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3588-toybrick: Use pinctrl and aliases in SPLJonas Karlman
Pinctrl must be configured for eMMC, SD-card and SPI flash to successfully read FIT from all possible fallback media in SPL. Include pinctrl props and enable the SPL_PINCTRL Kconfig option to ensure FIT can be loaded from eMMC, SD-card and SPI flash. Also enable the SPL_DM_SEQ_ALIAS Kconfig option to ensure that the storage device sequence number matches in both SPL and U-Boot proper. Fixes: 9fdd9a546986 ("board: rockchip: add Rockchip Toybrick TB-RK3588X board") Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3588-coolpi: Fix .dtb-file entries in MakefileJonas Karlman
Fix CoolPi 4 Model B and CoolPi CM5 EVB .dtb-file entries in Makefile. Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB") Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3588-coolpi: Add boards to documentationJonas Karlman
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation. Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB") Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3566-pinetab2: Fix reading FIT from SPI flashJonas Karlman
The SF_DEFAULT_SPEED Kconfig option got lost during merge and this prevent reading FIT from SPI flash. Restore the SF_DEFAULT_SPEED option to fix this. Fixes: 8a94c376f6cb ("rockchip: Use common bss and stack addresses on RK356x") Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3588-evb: Use pinctrl and aliases in SPLJonas Karlman
Pinctrl must be configured for eMMC, SD-card and SPI flash to successfully read FIT from all possible fallback media in SPL. Include pinctrl props and enable the SPL_PINCTRL Kconfig option to ensure FIT can be loaded from eMMC, SD-card and SPI flash. Also enable the SPL_DM_SEQ_ALIAS Kconfig option to ensure that the storage device sequence number matches in both SPL and U-Boot proper. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3568-evb: Use pinctrl in SPLJonas Karlman
Pinctrl must be configured for eMMC, SD-card and SPI flash to successfully read FIT from all possible fallback media in SPL. Include pinctrl props and enable the SPL_PINCTRL Kconfig option to ensure FIT can be loaded from eMMC, SD-card and SPI flash. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3588: Update bootph propsJonas Karlman
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag") bootph props is propagating to parent nodes. Update bootph props to ensure eMMC, SD-card and SPI flash is available in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph props that automatically is propagated to parent nodes. Also adjust pinctrl nodes to only be included in boot phases where they are needed and add any missing pinctrl node needed in SPL. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk356x: Update bootph propsJonas Karlman
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag") bootph props is propagating to parent nodes. Update bootph props to ensure eMMC, SD-card and SPI flash is available in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph props that automatically is propagated to parent nodes. Also adjust pinctrl nodes to only be included in boot phases where they are needed and add any missing pinctrl node needed in SPL. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk35xx: Sort soc u-boot.dtsi alphabeticallyJonas Karlman
Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes is sorted by reg addr then by alphabetical order. This has no intended change beside sorting existing nodes and removing a duplicated usbdpphy0_grf node. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk356x: Imply enhanced features for standard bootJonas Karlman
Imply BOOTSTD_FULL for all RK356x boards to more closely follow RK3588. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk35xx: Imply support for GbE PHYJonas Karlman
Imply support for GbE PHY status parsing and configuration when support for onboard ethernet is enabled. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk35xx: Enable random generatorJonas Karlman
The RK35xx SoCs contain a crypto engine block that can generate random numbers. Enable rng node in soc u-boot.dtsi and enable Kconfig options to take advantage of the random generator. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk35xx: Sort imply statements alphabeticallyJonas Karlman
Sort imply statements under ROCKCHIP_RK3568 and ROCKCHIP_RK3588 alphabetically. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3566-anbernic-rgxx3: Remove SPL_ROCKCHIP_BACK_TO_BROM optionJonas Karlman
SPL_ROCKCHIP_BACK_TO_BROM should normally only be enabled when BROM should load U-Boot binary. SPL on Anbernic RGxx3 devices load TF-A and U-Boot proper from FIT images and does never jump back to BROM from SPL. Remove the superfluous Kconfig option from defconfig to align with other RK356x boards. This patch have no intended change in boot behavior. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3588: Drop REGULATOR_PWM Kconfig optionJonas Karlman
RK3588 boards do not have any pwm-regulator compatible nodes in DT, drop the superfluous REGULATOR_PWM Kconfig options. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26clk: rockchip: rk356x: Fix set rate of SCLK_SFC clockJonas Karlman
The SCLK_SFC can be set to a rate of 24, 50, 75, 100, 125 or 150 MHz. However, clk_set_rate() will fail unless one of those exact rates are used, and with newer and updated device tree files that contain spi-max-frequency values that does not exactly match these rates use of SPI flash may fail. Fix this by using the highest possible rate that exceeds or is equal to the requested rate. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26clk: rockchip: rk3588: Add REF_CLK_USB3OTGx supportJonas Karlman
The REF_CLK_USB3OTGx clocks is used as reference clock for USB3 block. Add simple support to get rate of REF_CLK_USB3OTGx clocks to fix reference clock period configuration. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Acked-by: Sean Anderson <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26clk: rockchip: rk356x: Add CLK_USB3OTGx_REF supportJonas Karlman
The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block. Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix reference clock period configuration. Signed-off-by: Jonas Karlman <[email protected]> Acked-by: Sean Anderson <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308: Move cru and grf include files to arch-rockchipJonas Karlman
Move cru_rk3308.h and grf_rk3308.h to arch-rockchip to match path used for all other Rockchip SoCs. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308-rock-pi-s: Update defconfigJonas Karlman
Update defconfig for rk3308-rock-pi-s with new defaults. Add OF_LIBFDT_OVERLAY=y to support device tree overlays. Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. Remove BOOTDELAY=0, SYS_CONSOLE_INFO_QUIET=y and enable more CMD to allow use of U-Boot cmdline. Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY. Add PHY_ROCKCHIP_INNO_USB2=y, DM_USB_GADGET=y and remove USB_DWC2=y to allow full use of USB 2.0 host and otg ports. Enable EFI_LOADER to allow EFI boot. Also fix use of USB 2.0 otg port by removing improper use of phy-supply and regulator-always-on props. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308-roc-cc: Update defconfigJonas Karlman
Update defconfig for rk3308-roc-cc with new defaults. Add OF_LIBFDT_OVERLAY=y to support device tree overlays. Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. Remove BOOTDELAY=0, SYS_CONSOLE_INFO_QUIET=y and enable more CMD to allow use of U-Boot cmdline. Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY. Add PHY_ROCKCHIP_INNO_USB2=y, DM_USB_GADGET=y and remove USB_DWC2=y to allow full use of USB 2.0 host and otg ports. Enable EFI_LOADER to allow EFI boot. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308-evb: Update defconfigJonas Karlman
Update defconfig for rk3308-evb with new defaults. Add OF_LIBFDT_OVERLAY=y to support device tree overlays. Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. Use DEBUG_UART_BASE=0xFF0E0000 and disable DEBUG_UART_BOARD_INIT to make debug uart use uart4, same as stdout-path prop. Remove BOOTDELAY=0, SYS_CONSOLE_INFO_QUIET=y and enable more CMD to allow use of U-Boot cmdline. Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY. Add PHY_ROCKCHIP_INNO_USB2=y, DM_USB_GADGET=y and remove USB_DWC2=y to allow full use of USB 2.0 host and otg ports. Enable EFI_LOADER to allow EFI boot. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308: Sync device tree from linux v6.8Jonas Karlman
Sync device tree from linux v6.8 and rename the rockchip,rk3308-mac compatible in gmac_rockchip driver to match upstream linux. Also move rk3308-roc-cc gmac node to u-boot.dtsi to not break features not enabled in upstream device tree. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26phy: rockchip-inno-usb2: Add support for RK3308Jonas Karlman
Add clkout_ctl and phy_sus regs to support USB2PHY for RK3308. Based on linux commit 31f840e7ff3e ("phy: phy-rockchip-inno-usb2: add support for RK3308 USB phy"). Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26clk: rockchip: rk3308: Add dummy support for USB480M clockJonas Karlman
Add dummy support for setting parent of USB480M clock. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26clk: rockchip: rk3308: Add support for SCLK_RTC32K clockFinley Xiao
Add support to get and set the SCLK_RTC32K clock rate. Signed-off-by: Finley Xiao <[email protected]> [[email protected]: Update commit message] Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308: Fix loading FIT from SD-card when booting from eMMCJonas Karlman
When RK3308 boards run SPL from eMMC and fail to load FIT from eMMC due to it being missing or checksum validation fails there can be a fallback to read FIT from SD-card. However, without proper pinctrl configuration reading FIT from SD-card may fail: U-Boot SPL 2024.04-rc4 (Mar 16 2024 - 12:36:12 +0000) Trying to boot from MMC2 mmc_load_image_raw_sector: mmc block read error Trying to boot from MMC1 Card did not respond to voltage select! : -110 mmc_init: -95, time 12 spl: mmc init failed with error: -95 Trying to boot from MMC2 mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices (err=-6) ### ERROR ### Please RESET the board ### Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph props. Also sort and move common nodes shared by all boards to the SoC u-boot.dtsi. Imply SPL_PINCTRL and SPL_DM_SEQ_ALIAS to apply correct pinconf before trying to load FIT from a device. Move u-boot,spl-boot-order to soc u-boot.dtsi and define both sdmmc and emmc nodes as fallback. Also fix boot from eMMC (SD NAND) on ROCK Pi S by using correct pinctrl. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308: Enable random generatorJonas Karlman
The RK3308 SoC contain a crypto engine block that can generate random numbers. Add rng node to soc u-boot.dtsi and enable Kconfig options to take advantage of the random generator. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308: Generate ethaddr based on cpu idJonas Karlman
Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP memory. The rockchip_otp driver already support the RK3308 variant. However, the device tree is missing a node to enable use of OTP. Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp driver and enable use of misc_init_r() to set ethaddr based on cpu id. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308: Enable ARMv8 crypto and FIT checksum validationJonas Karlman
The RK3308 SoC support ARMv8 Cryptography Extensions and use of the ARMv8 crypto extensions help speed up FIT checksum validation in SPL. Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto extensions for SHA256 when validating checksum of FIT images. Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum validation on all RK3308 boards. Also disable CONFIG_SPL_RAW_IMAGE_SUPPORT in board defconfigs to ensure SPL does not try to jump to code that failed checksum validation. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: rk3308: Sort imply statements alphabeticallyJonas Karlman
Sort imply statements under ROCKCHIP_RK3308 alphabetically and remove the config SPL_SERIAL statement from soc Kconfig file, it is already implyed in arch Kconfig. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26board: rockchip: rk3308: Add device tree files and myself to MAINTAINERSJonas Karlman
Update MAINTAINERS files for RK3308 boards to include related device tree files. Also add myself as a reviewer for the ROCK Pi S board. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: spl-boot-order: show DT path for missing deviceChristopher Obbard
When debugging the SPL boot order, the node ID of a device which hasn't been found is printed but it can be quite hard to relate that to the specific devicetree node. To aid debugging, print the node path instead of the cryptic node ID. Original debug message: board_boot_order: could not map node @73c to a boot-device With this patch applied this becomes e.g: board_boot_order: could not map node /spi@ff1d0000/flash@0 to a boot-device Reviewed-by: Dragan Simic <[email protected]> Signed-off-by: Christopher Obbard <[email protected]> Reviewed-by: Philipp Tomsich <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2024-04-26rockchip: spl-boot-order: fix typo in comment succes→successChristopher Obbard
Fix a simple spelling mistake in a comment. Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Signed-off-by: Christopher Obbard <[email protected]>
2024-04-26rockchip: ringneck-px30: put STM32_RST line in input mode instead of outputQuentin Schulz
The STM32_RST line is routed to the ATtiny microcontroller PA0/RESET/UPDI pin. By driving the PX30 SoC pin as GPIO output high, we prevent external UPDI to be used for flashing without first putting this pin as GPIO input, an extra step we could avoid in userspace. There's an external hardware pull-up strong enough to keep the STM32_RST state high on ATtiny side but weak enough it can be overridden by external UPDI. This also means it is safe to use for the STM32 variant, where STM32_RST line will be in the same state as if output high was used. The Q7 standard specifies that MFG_NC1 and MFG_NC2 (used for UPDI for Ringneck) pins should neither be driven by the carrierboard, nor have pull-up or pull-down resistors. This means this commit is safe to use regardless of the carrierboard this module would be connected to (provided it follows the Q7 standard). Fixes: 6acdd63e8771 ("rockchip: ringneck-px30: always reset STM32 companion controller on boot") Cc: Quentin Schulz <[email protected]> Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2024-04-26rockchip: spl: Add SPI NOR flash to boot_devices arrayJonas Karlman
Add missing boot source id <-> device tree node path mapping for SPI NOR flash on PX30, RK3288, RK3308, RK3368 and RV1126. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]>
2024-04-26rockchip: spl: Cache boot source id for later useJonas Karlman
Rockchip BROM writes a boot source id at CFG_IRAM_BASE + 0x10, this id indicates from what storage media TPL/SPL was loaded from. SPL uses this id to determine what device "same-as-spl" represent when determining from where FIT should be loaded. This works as long as the boot_devices array contain a matching id <-> node path entry. However, SPL typically load a small part of TF-A into SRAM and on RK3399 this overwrites the CFG_IRAM_BASE + 0x10 addr used for boot source id. For affected devices the u-boot,spl-boot-device would not be set when booting from SPI flash and the flash@0 node was not explicitly listed in the u-boot,spl-boot-order prop. Here boot source id is 3 before FIT images is loaded, and 0 after: U-Boot SPL 2024.04-rc4 (Mar 15 2024 - 17:26:19 +0000) board_spl_was_booted_from: brom_bootdevice_id 3 maps to '/spi@ff1d0000/flash@0' Trying to boot from SPI ## Checking hash(es) for config config-1 ... OK ## Checking hash(es) for Image atf-1 ... sha256+ OK ## Checking hash(es) for Image u-boot ... sha256+ OK ## Checking hash(es) for Image fdt-1 ... sha256+ OK ## Checking hash(es) for Image atf-2 ... sha256+ OK ## Checking hash(es) for Image atf-3 ... sha256+ OK board_spl_was_booted_from: failed to resolve brom_bootdevice_id 0 spl_decode_boot_device: could not find udevice for /mmc@fe330000 spl_decode_boot_device: could not find udevice for /mmc@fe320000 spl_perform_fixups: could not map boot_device to ofpath: -19 Use a static brom_bootsource_id_cache to save the boot source id after an initial read from SRAM to fix this, this allow spl_perform_fixups() to resolve correct boot source path for "same-as-spl" after SPL have loaded TF-A related FIT images into memory. With this the spl-boot-device prop can correctly be resolved to the SPI flash node in the control FDT: => fdt addr ${fdtcontroladdr} Working FDT set to f1ee6710 => fdt list /chosen chosen { u-boot,spl-boot-device = "/spi@ff1d0000/flash@0"; stdout-path = "serial2:1500000n8"; u-boot,spl-boot-order = "same-as-spl", "/mmc@fe330000", "/mmc@fe320000"; }; Fixes: d57e16c7e712 ("rockchip: find U-boot proper boot device by inverting the logic that sets it") Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Dragan Simic <[email protected]>
2024-04-26rockchip: bootrom: Sync bootsource id enum from bootromJason Zhu
Add more bootsource id: 1. BROM_BOOTSOURCE_UNKNOWN 2. BROM_BOOTSOURCE_I2C 3. BROM_BOOTSOURCE_SPI Signed-off-by: Jason Zhu <[email protected]> [[email protected]: Update commit message] Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]>
2024-04-26mmc: arm_pl180: Limit data transfer to U16_MAXMaximilian Brune
Currently fetching files bigger that cause a data transfer greater than U16_MAX fails. The reason is that the specification defines the datalength register as a 16 bit wide register, but in u-boot it is used as if it is an 32 bit register. Therefore values greater than U16_MAX cause an infinite loop inside u-boot. U-boot expects to get more data from interface/hardware then it will ever get and therefore inifintely waits for more data that will never come. Signed-off-by: Maximilian Brune <[email protected]> Cc: Peng Fan <[email protected]> Cc: Jaehoon Chung <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2024-04-26mmc: sdhci: programmable clock calculation needs multiplier +1cmachida
According to the SD Host Controller Simplified Specification v4.20, the multiplier value M is one more than the Clock Multiplier field. Copied code from Linux project. drivers/mmc/host/sdhci.c line 4405 Signed-off-by: cmachida <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]> Reviewed-by: Sean Anderson <[email protected]>
2024-04-26mmc: Add support for the no-mmc-hs400 propJonas Karlman
The linux commit f722e650d965 ("mmc: core: add support for disabling HS400 mode via DT") added support for a no-mmc-hs400 prop. Add support for the no-mmc-hs400 prop to disable HS400 host caps. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2024-04-26mmc: Imply HS200 cap with mmc-hs400 prop to match linuxJonas Karlman
eMMC nodes in linux device tree files typically only contain a mmc-hs400 prop to signal support for both HS400 and HS200. However, U-Boot require an explicit mmc-hs200 prop to signal support for the HS200 mode. Fix this by follow linux and imply HS200 cap when HS400 cap is signaled using a mmc-hs400 prop. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2024-04-26mmc: Support 32-bit only ADMA on 64-bit platformsGreg Malysa
Some arm64 platforms may include SDIO host controllers that only support 32-bit ADMA. While the Linux kernel detects which size is supported and adjusts the descriptor size used dynamically, the previous u-boot implementation statically selected between the two depending on whether DMA_ADDR_T_64BIT was defined. Because the static selection is already in place and effective for most platforms, this patch logically separates "64 bit addresses are used for DMA on this platform" and "64 bit addresses are used by the SDIO host controller for ADMA" in order to support the small number of platforms where these statements are not equivalent. Using 32 bits is opt-in and existing 64 bit platforms should be unaffected by this change. Co-developed-by: Nathan Barrett-Morrison <[email protected]> Signed-off-by: Nathan Barrett-Morrison <[email protected]> Co-developed-by: Ian Roberts <[email protected]> Signed-off-by: Ian Roberts <[email protected]> Signed-off-by: Greg Malysa <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2024-04-26mmc: sdhci: Fix potential ADMA descriptor table overflowIan Roberts
Change ADMA_TABLE_NO_ENTRIES to round the division up to fully contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow of the ADMA descriptor table. sdhci_prepare_adma_table() expecitily states it does _not_ check for overflow as the descriptor table size is dependent on CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES calculation does not round up the divison, so with the current u-boot defaults: max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) = 65535 * 512 = 33553920 bytes. ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN = 33553920 / 65532, which does not divide cleanly. actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 * 65532 = 33552384, which is smaller than max_mmc_transfer. This can cause sdhci_prepare_adma_table() to write one extra descriptor, overflowing the table when a transaction larger than actual_max_transfer is issued. Co-developed-by: Nathan Barrett-Morrison <[email protected]> Signed-off-by: Nathan Barrett-Morrison <[email protected]> Signed-off-by: Greg Malysa <[email protected]> Signed-off-by: Ian Roberts <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2024-04-26mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_opsIan Roberts
Add this hook so that it can be overridden with driver specific implementations. We also let the original sdhci_adma_write_desc() accept &desc so that the function can set its new value. Then export the function so that it could be reused by driver's specific implementations. The above is a port of Linux kernel commit 54552e4948cbf In addition, allow drivers to allocate their own ADMA descriptor tables if additional space is required. Finally, fix the assignment of adma_addr to fix compiler warning on 64-bit platforms that still use 32-bit DMA addressing. Co-developed-by: Nathan Barrett-Morrison <[email protected]> Signed-off-by: Nathan Barrett-Morrison <[email protected]> Co-developed-by: Greg Malysa <[email protected]> Signed-off-by: Greg Malysa <[email protected]> Signed-off-by: Ian Roberts <[email protected]>
2024-04-26MAINTAINERS: add entries for tee-related orphaned filesIgor Opaniuk
Add orphaned TEE/OP-TEE-related files to TEE subsystem entry in MAINTAINERS. This includes: - optee_rpmb cmd and test for it - Misc. OP-TEE tests - OP-TEE SCMI agent implementation - Documentation, including device tree bindings Signed-off-by: Igor Opaniuk <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]> Signed-off-by: Ilias Apalodimas <[email protected]>
2024-04-26tee: sandbox: check for buffer sizeIgor Opaniuk
Add additional check for buffer size when reading out persistent storage value and provide back actual value size. Signed-off-by: Igor Opaniuk <[email protected]> Reviewed-by: Oleksandr Suvorov <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]> Signed-off-by: Ilias Apalodimas <[email protected]>
2024-04-23Merge tag 'fsl-qoriq-2024-4-24' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq - move to OF_UPSTREAM for sl28