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Only setup_boottargets differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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Only setup_iodomain() and setup_boottargets differ from the original
misc_init_r from Rockchip mach code, so let's use
rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Dragan Simic <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Dragan Simic <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Dragan Simic <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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Most Rockchip boards who override misc_init_r do it only to call another
function and keep the rest unchanged. Therefore to allow for less
duplication, let's just add a weak function symbol that is called inside
misc_init_r.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Dragan Simic <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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The expected length of the cpuid, as passed with cpuid_length,
determines the size of cpuid_str string. Therefore, care should be taken
to make sure nothing is accessing data out-of-bounds.
Instead of using hardcoded values, derive them from cpuid_length.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Dragan Simic <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
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When copying the build system for Linux we missed to replace some
instances of 'Documentation' by 'doc'.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Python 3.6 introduced a DeprecationWarning for invalid escape sequences.
This is upgraded to a SyntaxWarning in Python 3.12, and will eventually
be a syntax error.
Fix these now to get ahead of it before it's an error.
Signed-off-by: Benjamin Gray <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Jonathan Corbet <[email protected]>
Adapted for U-Boot
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Use proper binary artifact names for HSFS devices.
Do not use the *_unsigned binaries.
Signed-off-by: Wadim Egorov <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
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When using the previous prototype you got a compiler warning like this:
warning: initialization of 'int (*)(struct cmd_tbl *, int, int, char * const*)' from incompatible pointer type 'int (*)(struct cmd_tbl *, int, int, const char **)' [-Wincompatible-pointer-types]
Fixes: 3d9640f55cb2 ("doc: expand README.commands")
Signed-off-by: Alexander Dahl <[email protected]>
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Moving the efi_carve_out_dt_rsv() call in commit 1be415b21b2d
("efi_loader: create memory reservations in ACPI case")
broke boards that create additional memory reservations in
ft_board_setup() since it is now called before those additional
memory reservations are made. This is the case for the rk3588
boards and breaks booting OpenBSD on those boards.
Move the call back to its original location and add a call in
the code path used for ACPI.
Fixes: 1be415b21b2d ("efi_loader: create memory reservations in ACPI case")
Signed-off-by: Mark Kettenis <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Signed-off-by: Thomas Weißschuh <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Describe usb wakeup interrupt.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/d8109a218f70c257e4fc52b5032b7df68fc00786.1709887312.git.michal.simek@amd.com
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Based on dt schema there is no need to specify flash via additional
compatible string and generic are enough.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/54e77ad480c5de8703cb5b22408dc3bf72f3f431.1709887280.git.michal.simek@amd.com
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All gpio-key descriptionos with dt-schema.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a67884f4fad98b94198123eef45ffdad511b0dc6.1709887234.git.michal.simek@amd.com
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ZynqMP CG series devices only have two cpus. In this
case the interrupt-affinity property has to adapted, because
cpu3 and cpu4 are missing. By adding a label to the pmu fwnode the
interrupt-affinity can be adapted in a device specific DT.
Signed-off-by: Lukas Funke <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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The below exception observed on QEMU, as it doesn't support
NAND controller.
"Synchronous Abort" handler, esr 0x96000005, far 0x17acfc878
elr: 000000000803ad40 lr : 000000000805f438 (reloc)
elr: 000000007fcb4d40 lr : 000000007fcd9438
x0 : 000000007bbfc880 x1 : 00000000ff100000
x2 : 000000007fcf059c x3 : 000000007bbfc870
x4 : 000000007fd9a388 x5 : 000000017acfc870
x6 : 0000000000000000 x7 : 000000007bbfd0e0
x8 : 0000000000003dd4 x9 : 000000007bbeec0c
x10: 0000000000000001 x11: 0000000000003f8c
x12: 000000007bbeecfc x13: 000000007bbeeeb0
x14: 000000007bbeeeb0 x15: 000000007bbee474
x16: 000000007fcef18c x17: 0000000000000000
x18: 000000007bbf9d70 x19: 000000007bbfc888
x20: 000000007bbfc870 x21: 000000007fd68ddb
x22: 00000000ffffffed x23: 000000007bbfc878
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 000000007bbeed10
Code: 927ff8c1 924000c6 8b010065 f9400887 (f94004a2)
Resetting CPU ...
The crash is caused by the use after free.
Updating the correct return codes rather than hardcoding.
Fixes: 3dd0f8cccd6d ("mtd: nand: Remove hardcoded base address of nand")
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Currently only hw ecc is supported in U-Boot. If any other ecc mode is
given in DT, it simply through an error. So better print
what is being done.
Revert this patch once soft ecc support is fixed in future.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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USB4 has been added to the boot targets and
also add support to enable JTAG.
Signed-off-by: Shubhangi Shrikrushna Mahalle <[email protected]>
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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* riscv: lib: improve extension detection
* riscv: sbi: fix display format and global variable storage
* sifive: fu740: reduce DDR speed
* board: starfive vf2: switch to standard boot and fix DTS
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Add PCIe driver file to visionfive2 board MAINTAINERS list.
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Update the maintainer of Starfive VisionFive v2 board.
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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The 'PolarFire Hart Software Services' SBI implementation returns the
version of the incorporated OpenSBI. Format the number accordingly.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
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For an unknown implementation ID an output like
SBI 1.0Unknown implementation ID 16777216
Extensions:
sbi_set_timer
...
was shown. The number 16777216 is not the implementation ID.
* Show the correct number
* Use a hexadecimal output format
* Add a missing line feed
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Dan Carpenter <[email protected]>
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Previously PLL node was missing from SPL dts. This caused BUS_ROOT
to stay on OSC clock (24Mhz). As a result, all peripherals have to
run at a much lower frequency, and loading from sdcard/emmc is slow.
Thus, enabling PLL node in dts to fix this.
Signed-off-by: Bo Gan <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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The first multi-letter extension after the single-letter extensions does
not have to be preceded by an underscore, which could cause the parser
to mistakenly find a single-letter extension after the start of the
multi-letter portion of the string.
Three letters precede multi-letter extensions (s, x & z), none of which
are valid single-letter extensions. The dt-binding also allows
multi-letter extensions starting with h, but no such extension have been
frozen or ratified, and the unprivileged spec no longer uses "h" as a
prefix for multi-letter hypervisor extensions, having moved to "sh"
instead. For that reason, modify the parser to stop at s, x & z to prevent
this overrun, ignoring h.
Signed-off-by: Conor Dooley <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Signed-off-by: Leon M. Busch-George <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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U-Boot SPL loads the device-tree directly behind main U-Boot overlapping
the .bss section. reserve_fdt() is called in board_init_f() to relocate the
device-tree to a safe location.
Debug UARTs are enabled before board_init_f(). With sbi_dbcn_available in
the .bss section the device-tree is corrupted when _debug_uart_init() is
called in the SBI serial driver. Move the variable to the .data section.
Link: https://bugs.launchpad.net/ubuntu/+source/u-boot/+bug/2054091
Fixes: dfe08374943c ("risc-v: implement DBCN based debug console")
Signed-off-by: Heinrich Schuchardt <[email protected]>
Tested-by: Aurelien Jarno <[email protected]>
Tested-by: Conor Dooley <[email protected]>
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It appears that there is some timing marginality either in the
board layout or the SoC that results in occasional data corruption
on some boards.
We observed this issue on some of the new HiFive Unmatched RevB
boards during volume production as well as some of the original
HiFive Unmatched boards from 2021 in our possession. This means
that there are other boards out there that might have the issue
too.
We have done some limited testing with DDR4 at 1600MT/s and
faulty boards (failing at 1866MT/s) passed.
We plan further testing after we procure a temperature chamber.
Signed-off-by: Thomas Perrot <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Distro boot scripts are deprecated. Use standard boot instead.
Signed-off-by: Nam Cao <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Prepare v2024.04-rc4
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Signed-off-by: Tom Rini <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Use TF-A on imx8mp_beacon to fix boot regression.
- Use latest 6.8 dts for imx8mp_beacon.
- Fix the RAM initialization for phycore_imx8mp PCL-070 rev 1.
- Describe the 0087 i.mx8m mini product variant in tdx-cfg-block.
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <[email protected]>
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The device tree has evolved over time, so re-sync. This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver. However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.
Signed-off-by: Adam Ford <[email protected]>
Acked-by: Peng Fan <[email protected]>
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Add new product id 0087 Verdin iMX8M Mini Quad 2GB IT.
Signed-off-by: Joao Paulo Goncalves <[email protected]>
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When the board was originally added, it enabled some features which
allowed it to bypass Trusted Firmware, but as the feature set of
Linux grew and more features became available, the U-Boot config
options which bypassed TF-A caused issues, so it needs to return
to the standard operating mode of using TF-A or the system no
longer boots.
Fixes: ab53bd43dbde ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.
Signed-off-by: Benjamin Hahn <[email protected]>
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Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.
Signed-off-by: Benjamin Hahn <[email protected]>
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- Singular quirk DT property rename.
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In case the PHY is fully described in DT, use PHY MDIO address
from DT directly instead of always using auto-detection. This
also fixes the behavior of 'mdio list' in such DT setup, which
now prints the PHY connected to the MAC correctly.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Paul Barker <[email protected]>
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- Add phytec am64x platform, update am65-cpsw and a few other assorted
fixes.
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Drop old implementation and use hash_command() instead, as
how it's currently done for crc32 and sha1sum cmds.
Test:
=> md5sum 0x60000000 0x200
md5 for 60000000 ... 600001ff ==> e6bbbe95f5b41996f4a9b9af7bbd4050
Signed-off-by: Igor Opaniuk <[email protected]>
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Return value of a function 'malloc_cache_aligned'
is dereferenced at autoboot.c:207 without checking for NULL,
but it is usually checked for this function.
Found by RASU JSC.
Signed-off-by: Maks Mishin <[email protected]>
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It is found that when DM is enabled, only generic init function is
called in .probe(). Baudrate is never honored. Add a function call
to .setbrg() when probing so that we can update the baudrate of the
serial device.
Signed-off-by: Yang Xiwen <[email protected]>
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Add a new Kconfig symbol MDIO_TI_CPSW for the CPSW MDIO
driver and build it with proper DM support if enabled.
If MDIO_TI_CPSW is not enabled then we continue to
behave like before.
Clean up MDIO custom handling in am65-cpsw and use
dm_eth_phy_connect() to get the PHY.
Signed-off-by: Roger Quadros <[email protected]>
Tested-by: Ravi Gunasekaran <[email protected]>
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Some platforms have bus level Reset controlled
by a GPIO line. If available then handle bus reset
via GPIO.
Signed-off-by: Roger Quadros <[email protected]>
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Add documentation for PHYTEC phyCORE-AM64x SoM.
Signed-off-by: Wadim Egorov <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
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