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Add temporarily bootph-all property in usart2 and syscfg nodes
to allows stm32mp215f-dk board to boot.
When DT kernel series [1] will be merged and synchronized in U-Boot
this patch will be reverted.
[1] https://lore.kernel.org/linux-arm-kernel/[email protected]/
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add U-Boot specific file for stm32mp215f-dk board
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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STM32MP21 application processors (STM32 MPUs) based on a single
Arm Cortex®-A35 core running up to 1.5 GHz and Cortex®-M33 core
running at 300 MHz.
It is pin-compatible with the STM32MP2 series in the VFBGA361
10×10 mm package: the STM32MP21 uses a subset of the STM32MP23
pinout, which itself is a subset of the STM32MP25.
More details available here :
https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add cmd_stm32key support for STM32MP21x SoCs family.
Signed-off-by: Yann Gautier <[email protected]>
Signed-off-by: Nicolas Le Bayon <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add "st,stm32mp21-syscfg" compatible.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Implement STM32MP21 reset drivers using stm32-core-reset API.
Signed-off-by: Gabriel Fernandez <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add clock driver support for STM32MP21 SoCs.
Signed-off-by: Nicolas Le Bayon <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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boot_get_fdt_fit_into_buffer() calls fdt_open_into() for both the
base FDT and overlay DTO blobs loaded from a FIT image.
Those blobs come from FIT payload data. In the overlay path,
fit_image_load() is called with FIT_LOAD_IGNORED, so the IH_TYPE_FLATDT
header check in fit_image_load() is skipped. This leaves fdt_open_into()
to consume header-derived offsets/sizes from unvalidated input.
Validate the full blob against the payload length first with
fdt_check_full(fdtsrcbuf, srclen), then proceed with fdt_totalsize() and
fdt_open_into(). This fixes Coverity CID 644638 (TAINTED_SCALAR).
Fixes: 5ebf0c55a23 ("image: fit: Apply overlays using aligned writable FDT copies")
Link: https://lore.kernel.org/all/20260223195109.GG3233182@bill-the-cat/
Signed-off-by: James Hilliard <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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spl_enable_cache()
commit ba20b2443c29 ("arm: mach-k3: common: Reserve video memory from
end of the RAM") switched spl_enable_cache() to use gd->ram_top directly
but omitted the board_get_usable_ram_top() call that limits RAM
configuration and provides updated RAM end address per memory map
used by board and impacts subsequent allocations and reservations.
For e.g. here it impacts how high the TLB may be placed.
On Verdin AM62 (512 MiB), the raw end of RAM (0xA0000000) is inside
OP-TEE's region. board_get_usable_ram_top() in verdin-am62.c returns
0x9C000000 to keep relocations below it, but spl_enable_cache() never
called it. commit 42b3ee7fa524 ("arm: mach-k3: am62x: Enable memory
firewall support") then enforced the OP-TEE firewall, turning the silent
corruption into a hard hang.
Fix by calling board_get_usable_ram_top() after computing raw ram_top,
consistent with setup_dest_addr() in board_f.c. A weak default is
provided for boards that do not need to restrict the RAM top.
Fixes: ba20b2443c29 ("arm: mach-k3: common: Reserve video memory from end of the RAM")
Reported-by: Francesco Dolcini <[email protected]>
Link: https://lore.kernel.org/all/20260224102121.GB340942@francesco-nb/
Signed-off-by: Devarsh Thakkar <[email protected]>
Tested-by: Francesco Dolcini <[email protected]> # Verdin AM62 512MB
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Commit 9ebdbbc43e5f ("arm: armv8: invalidate dcache entries on
dcache_enable") broke Apple Silicon machines in certain scenarios.
If the MMU is currently not enabled we need to flush the TLB
before we enable it to prevent stale TLB entries from becoming
active again. So move the __asm_invalidate_tlb_all() back
immediately before the mmu_setup() call.
Fixes: 9ebdbbc43e5f ("arm: armv8: invalidate dcache entries on dcache_enable")
Signed-off-by: Mark Kettenis <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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class_get_device_by_driver()'s return value is not checked, in case of BSEC
driver is not probed, dev is not set and used just after as parameter of
misc_read() which leads to a Synchronous Abort.
Add uclass_get_device_by_driver()'s return value check to fix it.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add board identifier for STM32MP21 discovery board = MB2059.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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On 1GB board, in particular cases, a prefetch operation is done just above
the 1GB boundary. The DDR size is 1GB (0x80000000 to 0xc0000000), there is
an access on 0xc00017c0 (ie 0x800017c0).
As beginning of DDR is protected by MMU until CONFIG_TEXT_BASE
(0x80000000 to 0x84000000), it triggers the following IAC:
E/TC:0 stm32_iac_itr:192 IAC exceptions [159:128]: 0x200
E/TC:0 stm32_iac_itr:197 IAC exception ID: 137
I/TC:
DUMPING DATA FOR risaf@420d0000
I/TC: =====================================================
I/TC: Status register (IAESR0): 0x11
I/TC: -----------------------------------------------------
I/TC: Faulty address (IADDR0): 0xc00017c0
I/TC: =====================================================
E/TC:0 Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-gitvalid.8>
E/TC:0 TEE load address @ 0x82000000
E/TC:0 Call stack:
E/TC:0 0x82007f30
E/TC:0 0x820444b4
E/TC:0 0x8202dc54
E/TC:0 0x82041fe0
E/TC:0 0x820143b8
By default, in MMU table, the DDR size is set to 4GB, but not all
STM32MP2 based board embeds 4GB, some has only 1 or 2GB of DDR.
The MMU table entry dedicated to DDR need to be updated with the real
DDR size previously read from DT.
After relocation, in enable_caches(), update the MMU table between the
dcache_disable() / dcache_enable() with the real DDR size.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Fix index check against array size. If that index is equal
to the array size, we'll access one-past-the-end of the array.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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No more need to test if a fsbl partition is present on NOR when booting
from serial or USB. Now MTD devices are automatically populated with
partition information found in DT. Remove fsbl_nor_detected boolean from
stm32prog_data struct and all code using it.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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The hardware denies any access from the U-Boot non-secure world to the
secure-protected pins. Hence, prevent any driver to configure such a pin.
Identify the secure pins with "NO ACCESS" through the 'pinmux status -a'
command.
Use a driver data structure to identify which hardware versions support
this feature.
Signed-off-by: Fabien Dessenne <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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The hardware denies any access from the U-Boot non-secure world to the
secure-protected pins. Hence, prevent any driver to request such a pin.
Signed-off-by: Fabien Dessenne <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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As explained in commit 03d2d5fc003f ("board: sifive: unmatched: set
fdtfile with unquoted variable.") using the syntax of
'fdtfile=CONFIG_DEFAULT_FDT_FILE' in the plain text environment files
will lead to extraneous and problematic "s in the output. This is fixed
by using fdtfile=DEFAULT_FDT_FILE which was introduced recently.
Acked-by: Peng Fan <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Christian Marangi <[email protected]> says:
This small series consolidate header usage of mdio-mt7531-mmio driver
and improve usage in preparation for support of OF PHY autoprobe.
This driver is still not used (as it will be used by AN7581/AN7583)
in the OF mode (it's used by MT7988 for the MDIO functions)
For OF PHY to be correctly autoprobed, the MDIO driver needs to attached
to the MDIO node (the parent of the PHY nodes)
With such change the MDIO driver can be binded with the MDIO node instead
of the switch node as previously required.
Link: https://lore.kernel.org/r/[email protected]
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The MDIO node is ALWAYS a parent of the MT7531 switch node and the MDIO
registers are in the MT7531 register space (in the context of MT7988
it's all memory-mapped)
With these assumption, we can simplify and permit better usage of PHY OF
automatic probing by binding the mt7531-mdio-mmio driver with the MDIO
node instead of the switch node.
For OF PHY to be correctly autoprobed, the MDIO driver needs to attached
to the MDIO node (the parent of the PHY nodes).
The driver will reach the parent node (the switch node) and will parse
the register address from there.
Signed-off-by: Christian Marangi <[email protected]>
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Instead of having duplicate priv struct for mdio-mt7531-mmio driver in
both driver and header, use the one exposed by the header directly.
This make sure we have consistent priv struct if the driver will be
updated in the future.
Signed-off-by: Christian Marangi <[email protected]>
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Paresh Bhagat <[email protected]> says:
This series enables SPI flash support for the AM62DX EVM platform.
The first patch enables the required SPI flash configuration options in
both A53 and R5 defconfigs, including Cadence QSPI driver support, SFDP
support, and Spansion S28HX-T flash compatibility.
The second patch adds the necessary device tree configuration for the R5
SPL to support OSPI flash access during the boot process.
Boot logs
https://gist.github.com/paresh-bhagat12/ca9a05aa443c71e8baf6d8506f6ccc22
Link: https://lore.kernel.org/r/[email protected]
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Enable SPI flash support for AM62DX EVM by adding Cadence QSPI driver,
configuring 25MHz speed, and enabling SFDP support with Spansion
S28HX-T flash compatibility. Enable required SPI and MTD configs for
both A53 and R5 configurations to allow booting from SPI flash.
Signed-off-by: Paresh Bhagat <[email protected]>
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Enable WKUP UART0 for DM firmware logs, configure DMA controllers with
TI SCI references, and update OSPI0 register mapping.
Signed-off-by: Paresh Bhagat <[email protected]>
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Prepare v2026.04-rc3
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Signed-off-by: Tom Rini <[email protected]>
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sqfs_frag_lookup() reads a 16-bit metadata block header whose lower
15 bits encode the data size. Unlike sqfs_read_metablock() in
sqfs_inode.c, this function does not validate that the decoded size is
within SQFS_METADATA_BLOCK_SIZE (8192). A malformed SquashFS image can
set the size field to any value up to 32767, causing memcpy to write
past the 8192-byte 'entries' heap buffer.
Add the same bounds check used by sqfs_read_metablock(): reject any
metadata block header with SQFS_METADATA_SIZE(header) exceeding
SQFS_METADATA_BLOCK_SIZE.
Found by fuzzing with libFuzzer + AddressSanitizer.
Signed-off-by: Eric Kilmer <[email protected]>
Reviewed-by: Miquel Raynal <[email protected]>
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Flashing U-Boot for Exynos 7870 requires creating a stub device tree,
where certain properties and nodes are defined which are populated by
the previous bootloader in the phones.
Since these properties are now available in the U-Boot device tree, it's
now possible to use the same blob generated by U-Boot in place of the
stub, when creating boot images. Update the build documentation to
reflect the same.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add properties in the DTSI file which is required for S-BOOT when used
an external device tree when booting into U-Boot. S-BOOT is Samsung's
proprietary bootloader, which chainloads U-Boot.
Since this device has multiple bank nodes, add memory nodes for each RAM
bank. This is the format S-BOOT recognizes, and (re)populates it with
the correct bank sizes.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add properties in the DTSI file which is required for S-BOOT when used
an external device tree when booting into U-Boot. S-BOOT is Samsung's
proprietary bootloader, which chainloads U-Boot.
Since this device has multiple bank nodes, add memory nodes for each RAM
bank. This is the format S-BOOT recognizes, and (re)populates it with
the correct bank sizes.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add properties in the DTSI file which is required for S-BOOT when used
an external device tree when booting into U-Boot. S-BOOT is Samsung's
proprietary bootloader, which chainloads U-Boot.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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U-Boot for this board is programmed to use the external DTB if an
internal device tree is not available. This makes it safe to build boot
images using the non-DTB U-Boot binary, while taking up less space.
Reflect this change in documentation.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Since there is only one internal device tree allowed in U-Boot, the
DEVICE_TREE flag is required for building images for various devices.
Document it in the build guide.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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OF_UPSTREAM_BUILD_VENDOR
Since the build documentation recommends using the DEVICE_TREE= make
flag, and the "board" supports multiple devices, remove the default
device tree option so as to enforce the make flag during build.
OF_UPSTREAM_BUILD_VENDOR is added so as to build all device trees
associated with the vendor with their U-Boot includes.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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OF_BOARD allows to choose the internal device tree in runtime. Use it to
pass the external FDT as an internal one if it is not present. This
approach is also used by qcom-phone, and it reduces boot image size. It
is expected that an external FDT is present as U-Boot is packaged as an
Android boot image.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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MULTI_DTB_FIT allowed a single U-Boot image to be booted in multiple
devices, but it was not a scalable solution; as more devices are added,
the U-Boot binary is bound to increase, space taken up by devicetrees
which are not even used.
The other approach is to be able to build separate images for multiple
devices using the same "board" defined in U-Boot. This is used by
qcom_phone to support muitiple devices.
Follow the said approach for Exynos devices as well, disable
MULTI_DTB_FIT for this board.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Move environment variable setup procedure to exynos_env_setup(). This
function is independent of data from exynos_board_info as it is due for
removal in the succeding commits.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Remove the baked-in bank addresses used for figuring out RAM banks from
device tree. Instead, sequentially fill in the bank addresses and sizes,
and doing away with an extra array for specifying bases.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Currently when CONFIG_SPL_STACK_R and CONFIG_SPL_SYS_MALLOC_SIMPLE is
enabled then spl_relocate_stack_gd() will setup a layout where the stack
lays inside the heap and grows down to heap start. Also the global data
is part of the heap. This can lead to corruption of stack and global
data. The current layout is:
0x0 +-------------+
. .
. .
gd->malloc_base +- - - - - - -+
| |\
| HEAP/STACK | \
| | } SPL_STACK_R_MALLOC_SIMPLE_LEN
gd->start_addr_sp +- - - - - - -+ / (gd->malloc_limit)
| GLOBAL DATA |/
CONFIG_SPL_STACK_R_ADDR +-------------+
The above broken layout was actually introduced with commit adc421e4cee8
("arm: move gd handling outside of C code").
This commit changes the layout so that the stack is below the heap and
the global data. It is now similar to the one before relocation:
0x0+-------------+
. .
. .
+- - - - - - -+
| |
| STACK |
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gd->start_addr_sp +-------------+
| GLOBAL DATA |
gd->malloc_base +-------------+
| |\
| HEAP | } SPL_STACK_R_MALLOC_SIMPLE_LEN
| |/ (gd->malloc_limit)
CONFIG_SPL_STACK_R_ADDR +-------------+
Fixes: adc421e4cee8 ("arm: move gd handling outside of C code")
Cc: Tom Rini <[email protected]>
Cc: Anshul Dalal <[email protected]>
Cc: Leo Yu-Chi Liang <[email protected]>
Cc: Dhruva Gole <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Signed-off-by: Ronald Wahl <[email protected]>
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These three platforms set CONFIG_SPL_LDSCRIPT value to what the default
value for the question is, once evaluated. Remove this unnecessary line.
Reviewed-by: Heiko Schocher <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Update am62ax and am62dx tifs-rm-cfg with allocation entries for C7x
core to match with their rm-cfg. Following updates are added for C7x:
- Share split BCDMA tx and rx channels between DM R5 and C7x.
- Share rings for split BCDMA tx and rx channels between DM R5 and C7x.
- Add global events and virtual interrupts for C7x.
Fixes: 01e01277538a ("am62a: yaml: Add board configs for AM62ax")
Signed-off-by: Sparsh Kumar <[email protected]>
Signed-off-by: Paresh Bhagat <[email protected]>
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This patch adds support for the ISSI IS25WP02GG QSPI NOR flash device.
Tested on the Versal VMK180
board in dual-parallel QSPI configuration.
Signed-off-by: jeffrey yu <[email protected]>
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This part is an FRAM, but can be used through the spi-nor generic code.
Signed-off-by: [email protected]
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We currently provide default board names for each board in their
respective evm.c file. However for custom boards, this behaviour
overwrites the default DT as set in the defconfig
(CONFIG_DEFAULT_FDT_FILE or CONFIG_DEFAULT_DEVICE_TREE).
This patch changes the default name to be NULL which prevents this
overwrite and allows ti_set_fdt_env to instead fallback to the correct
DT as set in Kconfig.
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
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Update dev-data and clk-data to include wake-up I2C device for J722s.
Signed-off-by: Chintan Vankar <[email protected]>
Tested-by: Richard Genoud <[email protected]>
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Add IMX8QXP SoCs specific implementation of fb_mmc_get_boot_offset()
This is needed as bootloader offset is different dependent on SoC
revision!
For revision B0 the bootloader starts at 32k offset. On offset
0x0 the bootloaders environment is stored.
On C0 revisions of the SoC bootloader image starts at offset 0x0
Signed-off-by: Adrian Freihofer <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Acked-by: Fabio Estevam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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i.MX8QXP rev C.0 requires boot container stored at offset 0KB
for eMMC, while i.MX8QXP pre C.0 requires boot container stored
at offset 32KB for eMMC.
To use one U-Boot binary to support different chip revisions,
introduce fb_mmc_get_boot_offset() to allow override the default
offset when writing to eMMC boot partitions.
This enables support for devices with non-standard boot partition
layouts, such as those requiring an offset for correct bootloader
placement.
Signed-off-by: Adrian Freihofer <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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single-word support"
Niko Mauno <[email protected]> says:
In this series, we first introduce a clean-up where we switch to use
predefined bit masks instead of hard-coded values for count and magic
halves in the single-word (32-bit) boot count scheme.
Then we fix a case of missing boot count value masking in single-word
scenario in bootcount.c, which allowed clobbering of the magic half
when storing the value. With this change the clobbering preventing
behavior becomes consistent with existing single word bootcount storing
implementations in bootcount_at91.c and bootcount_davinci.c.
Finally, we enable the DM I2C bootcount driver to work also in single
word (4 byte) mode, in addition to the pre-existing half-word (2 byte)
mode. By default the driver still operates in half word mode as so far,
but can now be used alternatively in single word mode by adding
'size = <0x4>;' in the associated device tree node.
Link: https://lore.kernel.org/r/[email protected]
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In addition to pre-existing half-word (2 byte) mode, add support for
the driver to work also in single word (4 byte) mode by adding
'size = <0x4>;' in the device tree node.
Signed-off-by: Niko Mauno <[email protected]>
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When storing the single word bootcount value, apply the bootcount count
mask to prevent clobbering the magic half of the value.
Signed-off-by: Niko Mauno <[email protected]>
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