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Introduce per SoC capabilities in sunxi_nand_spl.c
Prepare for the H616 support that has quite a lot of differences in
registers offset and capabilities.
Start with the 512 bytes ECC capability.
No functional change.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Introduce NDFC Pattern ID Register in capability structure
The H6/H616 pattern ID register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps.
No functional change.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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NFC_ECC_MODE register offset moved in H616, so let's make it a SoC cap
No functional change.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Introduce has_ecc_block_512 capability
The H616 controller can't handle 512 bytes ECC block size. The
NFC_ECC_BLOCK_512 bit disappeared in H6, and NDFC_RANDOM_EN took its
place.
So, add has_ecc_block_512 capability to only set this bit on SoC having
it.
On the way, let's drop NFC_ECC_BLOCK_SIZE_MSK which was just a mask for
the very same bit.
No functional change.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Move ECC_PAT_FOUND register in SoC capabilities structure
This register offset moved in H616, it's now its own register (@0x3c,
bits 0-31), not shared with NFC_ECC_ST any more (was @0x38 bits 16-31).
Push that specificity in caps structure.
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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USER_DATA register offset moved in H616, so let's make it a SoC cap
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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ECC_ERR_CNT register offset moved in H616, so let's make it a SoC cap
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Introduce per SoC capabilities in sunxi_nand.c
This prepares for the H616 support that has quite a lot differences in
registers offset and capabilities.
Start with the ECC strength table.
No functional change.
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Merge common register definitions from sunxi_nand{,_spl}.c
The Allwinner NAND controller registers where in both files, so let's
just merge all that in a header, it will be easier for maintenance.
NB: the defines are also harmonized with Linux driver
No functional change
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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The sunxi_ccm_reg is legacy, drop its usage from nand related code
For that, CCU_NAND0_CLK_CFG and CCU_AHB_GATE1 are added to the clock
files when missing.
And clock code in sunxi_nand{,_spl}.c and board.c are changed to use the
new scheme.
Moreover, drop AHB_DIV_1 in favor of the more readable CCM_NAND_CTRL_M/N
Suggested-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Remove unneeded definitions NFC_CMD_R* in sunxi_nand_spl.c
No need to define NFC_CMD_RNDOUTSTART, NFC_CMD_RNDOUT and
NFC_CMD_READSTART here since they are already in linux/mtd/rawnand.h
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Harmonize registers definition in sunxi_nand{,_spl}.c files
This is a first step to then include the same file from both
sunxi_nand{,_spl}.c files
Unused defines are also removed
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Fix pointer from interget warning when compiling for ARM64
When compiling for arm64, we get this error:
error: passing argument 2 of ‘__memcpy_fromio’ makes pointer from
integer without a cast [-Wint-conversion]
Moreover the copy should be made with dedicated readl(), like for any
register access on this peripheral, since they are 32bit wide.
So, instead of memcpy_fromio(), just use a readl() loop.
Introduce nand_readlcpy() to implement this loop.
Fixes: 6ddbb1e936c7 ("spl: nand: sunxi: use PIO instead of DMA")
Suggested-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Remove 'complete' member from struct sunxi_nfc
The 'complete' member isn't part of the structure, let's remove it.
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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When compiled with FTRACE=1 U-boot will crash as %rdi is clobbered
in board_init_f_alloc_reserve() and board_init_f_init_reserve() will
memset the .text segment instead of the global_data struct.
According to the System V AMD64 ABI %rdi is not preserved and the
existing code only worked as board_init_f_alloc_reserve() was small
enough to not use %rdi.
Fix that by always passing the correct argument to
board_init_f_init_reserve().
TEST=Can boot on qemu-q35 with FTRACE=1 enabled during build.
Signed-off-by: Patrick Rudolph <[email protected]>
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The else if branch uses the is_zimage boolean which is initialized to 0
and never set before being tested here.
remove the test on is_zimage to make this code reachable.
Signed-off-by: Guillaume Ranquet <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Allow the system to reset the CPU without calling the reset
controller. This patch also removed the default SYSRESET controller
for MT7628, as it is now optional.
Signed-off-by: Shiji Yang <[email protected]>
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Mediatek MT7620 u-boot does not have PINCONF implementation.
Signed-off-by: Shiji Yang <[email protected]>
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Excessive default value causes crash on hardware: x86 baytrail E3845
It is unclear where the data is being populated being 'BLOBLISTT_TCPA_LOG'
is not found elsewhere in the u-boot tree. This leads to confusion about
how much space for TPM log is actually needed.
This was tested on hardware using TPMv1.
Signed-off-by: Eric Schikschneit <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-mmc
- Add DMA support for mediatek mmc
- Cleanup mmc cmd
- Fix typos in mmc
[trini: Fix "quoted string split across lines" checkpatch warning]
Signed-off-by: Tom Rini <[email protected]>
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My Linaro email address is no longer valid. Update entries in the
MAINTAINERS file, and add a mapping in the mailmap file.
Signed-off-by: Sughosh Ganu <[email protected]>
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Return symbolic value CMD_RET_FAILURE instead of literal "1" when
failing to switch the partition to improve readability.
Signed-off-by: Yao Zi <[email protected]>
Tested-by: Anshul Dalal <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Currently when any of speed_mode, part, or dev fails to be parse as a
number, no error is reported. In this case __init_mmc_device() is called
with weird arguments, probably zeroes if there's no digit prefixing the
argument, which is especially confusing when the invocation occasionally
succeeds.
Let's check whether arguments are valid numbers without trailing
characters. This is quite helpful for speed_mode: it requires an index
instead of a mode name, one may easily pass in a string, which will be
parsed as zero (MMC_LEGACY), without carefully reading the
documentation, then finds the MMC device is under an unexpected mode.
Signed-off-by: Yao Zi <[email protected]>
Tested-by: Anshul Dalal <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Replace the big if-else block in do_mmc_dev() with switch-case and use
fallthrough to remove the duplicated code for parsing dev and part.
Signed-off-by: Yao Zi <[email protected]>
Tested-by: Anshul Dalal <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Fix the following typos in drivers/mmc/mmc.c:
- "neiter" -> "neither" in __mmc_switch() comment
- "witdh" -> "width" in bus_width() warning message
- "enver" -> "never" in mmc_select_mode_and_width() comment
Signed-off-by: Tanmay Kathpalia <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Implement DMA support in the MediaTek MMC driver to enhance data
transfer speed.
- Define DMA control and configuration registers
- Implement functions for starting, stopping, and completing DMA
transfers
- Modify data transfer logic to utilize DMA when enabled
- Ensure proper cache management during DMA operations
Signed-off-by: Wenbin Mei <[email protected]>
Signed-off-by: ht.lin <[email protected]>
Signed-off-by: Julien Masson <[email protected]>
Signed-off-by: Macpaul Lin <[email protected]>
Signed-off-by: David Lechner <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Indent a brace for proper code style.
Signed-off-by: David Lechner <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Replace separate mask and shift definitions with GENMASK and FIELD_*
macros for better readability and maintainability.
All macros ending in _M have the suffix dropped. The value remains the
same but is now generated with GENMASK. All macros ending in _S are
removed and their uses replaced with FIELD_PREP and FIELD_GET macros.
Signed-off-by: David Lechner <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The parameter 'alpha' is declared as an unsigned type so cannot be
negative. The code to test it as being less than zero will always fail
and so is redundant and should be removed.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <[email protected]>
Reviewed-by: Stefan Bosch <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Kuan-Wei Chiu <[email protected]> says:
Add support for the QEMU 'virt' machine on the m68k architecture. The
QEMU virt machine models a generic system utilizing Goldfish virtual
peripherals and is capable of emulating various classic 68k CPUs.
Currently, U-Boot's m68k architecture support focuses on ColdFire
variants. This series expands support to include the classic M680x0
architecture, implementing the necessary exception vectors, startup
code, and a bootinfo parser compatible with the QEMU interface.
Drivers for Goldfish peripherals (TTY, Timer, RTC) and the QEMU
Virtual System Controller (sysreset) are also added to enable serial
console, timekeeping, and system reset functionality.
The implementation has been verified on QEMU targeting the M68040 CPU,
confirming successful hardware initialization and boot to the U-Boot
command shell. Additionally, the CI configuration was verified locally
using gitlab-ci-local "qemu_m68k_virt test.py", resulting in
PASS qemu_m68k_virt test.py.
Link: https://lore.kernel.org/r/[email protected]
[trini: Re-sort MAINTAINERS entries]
Signed-off-by: Tom Rini <[email protected]>
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Rename the "COLDFIRE" entry to "M68K" to reflect that the architecture
support now encompasses traditional m680x0 CPUs (e.g., M68040) in
addition to ColdFire platforms.
Remove Huan Wang from the maintainers list as she is no longer active,
as suggested by Angelo Dureghello.
Add myself as a co-maintainer to assist with reviewing and testing
m68k-related patches.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Acked-by: Angelo Dureghello <[email protected]>
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Enable CI testing for the newly introduced QEMU m68k 'virt' board on
both GitLab CI and Azure Pipelines. This ensures the new M68040
architecture support is built and booted correctly in the emulated
environment.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add support for the QEMU 'virt' machine on the m68k architecture. This
board emulates a generic machine based on the Motorola 68040 CPU
equipped with Goldfish virtual peripherals.
Introduce the necessary board configuration and initialization
infrastructure. The implementation includes logic to parse the QEMU
bootinfo interface, enabling dynamic detection of system RAM size to
adapt to the virtual machine's configuration.
Enable the Goldfish TTY driver for serial console output. Additionally,
enable Goldfish RTC and timer drivers to support real-time clock
functionality and nanosecond-resolution delays. Include comprehensive
documentation covering build instructions and usage examples.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Tested-by: Daniel Palmer <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add support for the Motorola 68040 architecture. Currently, m68k
support in U-Boot is primarily focused on ColdFire variants. Introduce
the necessary infrastructure to support the classic M680x0 series,
specifically targeting the M68040 as emulated by QEMU.
The implementation includes exception vectors, early startup code, and
minimal CPU initialization and relocation stubs. It also defines the
standard m68k boot information structure used for passing hardware
information to the operating system. To ensure compatibility, ColdFire-
specific library objects such as cache and interrupt handling are
excluded from the build when M68040 is selected.
Additionally, apply a specific workaround during the early memory
reservation stage. Use a manual loop to clear global data instead of
the standard memset() function, as utilizing memset() at this point was
observed to cause a hang on the QEMU platform.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Acked-by: Angelo Dureghello <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Introduce a new sysreset driver for the QEMU Virtual System Controller.
This device is found on QEMU "virt" machines (such as the m68k virt
target) and provides a mechanism to trigger system reset and power-off
events.
The driver maps U-Boot sysreset types to the corresponding controller
commands:
- SYSRESET_WARM / SYSRESET_COLD -> VIRT_CTRL_CMD_RESET
- SYSRESET_POWER_OFF -> VIRT_CTRL_CMD_HALT
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Currently, the Goldfish RTC driver exclusively relies on device tree
to retrieve the base address, failing immediately if dev_read_addr()
returns FDT_ADDR_T_NONE. This restriction prevents the driver from
being used on platforms that instantiate devices via U_BOOT_DRVINFO()
instead of device tree, such as the QEMU m68k virt machine.
Add support for platform data to address this limitation. Introduce a
new .of_to_plat hook to handle device tree parsing and populate the
platform data. Update the probe function to rely exclusively on this
platform data, enabling support for both Device Tree and manual
instantiation.
Introduce a new header file include/goldfish_rtc.h to define the
platform data structure.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Add support for the Goldfish timer driver. This driver utilizes the
Goldfish RTC hardware to provide a nanosecond-resolution timer. This
virtual device is commonly found in QEMU virtual machines (such as the
m68k virt machine) and Android emulators.
The driver implements the standard U-Boot timer UCLASS interface,
exposing a 64-bit monotonically increasing counter with a 1GHz clock
rate derived from the RTC registers.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Tested-by: Daniel Palmer <[email protected]>
Reviewed-by: Yao Zi <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Angelo Dureghello <[email protected]>
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Add support for the Google Goldfish TTY serial device. This virtual
device is commonly used in QEMU virtual machines (such as the m68k
virt machine) and Android emulators.
The driver implements basic console output and input polling using the
Goldfish MMIO interface.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Reviewed-by: Yao Zi <[email protected]>
Tested-by: Daniel Palmer <[email protected]>
Acked-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Angelo Dureghello <[email protected]>
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device for non SPLs"
This series from Dominik Haller <[email protected]> provides a way for
TI K3 platforms to determine their boot device outside of SPL and then
adds support for the PHYTEC phyCORE-AM68x/TDA4x SoM.
Link: https://lore.kernel.org/r/[email protected]
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Add documentation for the PHYTEC phyCORE-AM68x/TDA4x (J721S2 family) SoM.
Signed-off-by: Dominik Haller <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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Add support for the PHYTEC phyCORE-AM68x/TDA4x (J721S2 family) SoM.
Supported features:
- 4GB LPDDR4 RAM
- eMMC
- SD-Card
- Ethernet
- OSPI
- AVS
- debug UART
Signed-off-by: Dominik Haller <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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Introduce get_boot_device() to obtain the booting device. Make it also
available for non SPL builds so u-boot can also know the device it
is booting from.
Signed-off-by: Dominik Haller <[email protected]>
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Unless specified otherwise using the mkimage -B n option, align
DTs in fitImage external data to 8 Bytes, and retain alignment
of everything else to 4 Bytes. This should fulfill the DTspec
requirement, that DTs must be placed at 8 Byte aligned addresses,
even for DTs that are part of fitImage with external data. For
fitImage with embedded data, there is nothing we can do, as the
embedded data are aligned to 4 Bytes, just like any other DT
property.
Replace fdtdec_get_child_count() counting of images with counting
of padding using fdt_for_each_subnode(). This is much more useful,
as the added up padding can be passed directly to calloc() when
allocating the buffer which holds the external data. The image
count is no longer needed.
Adjust the image layouting such, that buf_ptr is incremented to
place the next image at align_size aligned offset. This is done
at the beginning of the loop, once the align_size for current
image can be determined from the current image type.
Update binman test to validate the new 8 Byte alignment.
Signed-off-by: Marek Vasut <[email protected]>
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THe variable 'node' is assigned a value of an int, tested for being less
than or equal to zero then passed as an argument to a function that
takes an int so 'node' should not be unsigned. Fix it.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <[email protected]>
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Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Print the actual error code in a couple of places in boot_get_fdt_fit().
These are FDT error codes, not errno, so printing the string is more
helpful than printing the numeric value.
The only caller of boot_get_fdt_fit() unconditionally replaces the
returned error code (fdt_noffset) with ENOENT so the actual error would
otherwise be lost.
Signed-off-by: David Lechner <[email protected]>
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Rockchip RK3288 and RK3506 contain two DWC2 USB controllers, typically
one controller use dr_mode=otg and the other one use dr_mode=host.
With USB_GADGET_DWC2_OTG, DM_USB_GADGET and USB_DWC2 enabled this result
in the dwc2-udc-otg driver binding to both controllers, however only one
will probe due to use of dr_mode=host on the other one.
After the commit 6668b8e7cc68 ("dm: core: Support multiple drivers with
same compatibles") it is possible to bind one controller to the
dwc2-udc-otg driver and the other one to the dwc2_usb driver.
Move the dr_mode check from of_to_plat() to bind() to allow dm core to
bind the dwc2 host driver to dr_mode=host controllers.
Before this:
=> dm tree
...
usb_gadget 0 [ ] dwc2-udc-otg | |-- usb@ff740000
usb_gadget 1 [ ] dwc2-udc-otg | |-- usb@ff780000
=> usb start
starting USB...
No USB controllers found
After this:
dwc2-udc-otg usb@ff780000: Invalid dr_mode 1
=> dm tree
...
usb_gadget 0 [ ] dwc2-udc-otg | |-- usb@ff740000
usb 0 [ ] dwc2_usb | |-- usb@ff780000
=> usb start
starting USB...
USB DWC2
Bus usb@ff780000: 1 USB Device(s) found
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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According to Synopsys Databook, we shouldn't be
relying on GCTL.CORESOFTRESET bit as that's only for
debugging purposes. Instead, let's use DCTL.CSFTRST
if we're OTG or PERIPHERAL mode.
Host side block will be reset by XHCI driver if
necessary. Note that this reduces amount of time
spent on dwc3_probe() by a long margin.
We're still gonna wait for reset to finish for a
long time (default to 1ms max), but tests show that
the reset polling loop executed at most 19 times
(modprobe dwc3 && modprobe -r dwc3 executed 1000
times in a row).
Note that this patch was submitted to Linux in 2016 [1], however I can
confirm it is needed to support gadget mode in U-Boot on my device.
While I am referencing this patch from Linux I am in fact taking the
full existing dwc3_core_soft_reset() function from Linux as it exists
in v6.19-rc5, so it may differ slightly from the information in the
2016 patch.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/drivers/usb/dwc3?id=f59dcab176293b646e1358144c93c58c3cda2813
Suggested-by: Mian Yousaf Kaukab <[email protected]>
Signed-off-by: Felipe Balbi <[email protected]>
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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