| Age | Commit message (Collapse) | Author |
|---|
|
Add support for the Goldfish timer driver. This driver utilizes the
Goldfish RTC hardware to provide a nanosecond-resolution timer. This
virtual device is commonly found in QEMU virtual machines (such as the
m68k virt machine) and Android emulators.
The driver implements the standard U-Boot timer UCLASS interface,
exposing a 64-bit monotonically increasing counter with a 1GHz clock
rate derived from the RTC registers.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Tested-by: Daniel Palmer <[email protected]>
Reviewed-by: Yao Zi <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Angelo Dureghello <[email protected]>
|
|
Add support for the Google Goldfish TTY serial device. This virtual
device is commonly used in QEMU virtual machines (such as the m68k
virt machine) and Android emulators.
The driver implements basic console output and input polling using the
Goldfish MMIO interface.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Reviewed-by: Yao Zi <[email protected]>
Tested-by: Daniel Palmer <[email protected]>
Acked-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Angelo Dureghello <[email protected]>
|
|
device for non SPLs"
This series from Dominik Haller <[email protected]> provides a way for
TI K3 platforms to determine their boot device outside of SPL and then
adds support for the PHYTEC phyCORE-AM68x/TDA4x SoM.
Link: https://lore.kernel.org/r/[email protected]
|
|
Add documentation for the PHYTEC phyCORE-AM68x/TDA4x (J721S2 family) SoM.
Signed-off-by: Dominik Haller <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
|
|
Add support for the PHYTEC phyCORE-AM68x/TDA4x (J721S2 family) SoM.
Supported features:
- 4GB LPDDR4 RAM
- eMMC
- SD-Card
- Ethernet
- OSPI
- AVS
- debug UART
Signed-off-by: Dominik Haller <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
|
|
Introduce get_boot_device() to obtain the booting device. Make it also
available for non SPL builds so u-boot can also know the device it
is booting from.
Signed-off-by: Dominik Haller <[email protected]>
|
|
Unless specified otherwise using the mkimage -B n option, align
DTs in fitImage external data to 8 Bytes, and retain alignment
of everything else to 4 Bytes. This should fulfill the DTspec
requirement, that DTs must be placed at 8 Byte aligned addresses,
even for DTs that are part of fitImage with external data. For
fitImage with embedded data, there is nothing we can do, as the
embedded data are aligned to 4 Bytes, just like any other DT
property.
Replace fdtdec_get_child_count() counting of images with counting
of padding using fdt_for_each_subnode(). This is much more useful,
as the added up padding can be passed directly to calloc() when
allocating the buffer which holds the external data. The image
count is no longer needed.
Adjust the image layouting such, that buf_ptr is incremented to
place the next image at align_size aligned offset. This is done
at the beginning of the loop, once the align_size for current
image can be determined from the current image type.
Update binman test to validate the new 8 Byte alignment.
Signed-off-by: Marek Vasut <[email protected]>
|
|
THe variable 'node' is assigned a value of an int, tested for being less
than or equal to zero then passed as an argument to a function that
takes an int so 'node' should not be unsigned. Fix it.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <[email protected]>
|
|
Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
|
|
Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
|
|
Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
|
|
Print the actual error code in a couple of places in boot_get_fdt_fit().
These are FDT error codes, not errno, so printing the string is more
helpful than printing the numeric value.
The only caller of boot_get_fdt_fit() unconditionally replaces the
returned error code (fdt_noffset) with ENOENT so the actual error would
otherwise be lost.
Signed-off-by: David Lechner <[email protected]>
|
|
Rockchip RK3288 and RK3506 contain two DWC2 USB controllers, typically
one controller use dr_mode=otg and the other one use dr_mode=host.
With USB_GADGET_DWC2_OTG, DM_USB_GADGET and USB_DWC2 enabled this result
in the dwc2-udc-otg driver binding to both controllers, however only one
will probe due to use of dr_mode=host on the other one.
After the commit 6668b8e7cc68 ("dm: core: Support multiple drivers with
same compatibles") it is possible to bind one controller to the
dwc2-udc-otg driver and the other one to the dwc2_usb driver.
Move the dr_mode check from of_to_plat() to bind() to allow dm core to
bind the dwc2 host driver to dr_mode=host controllers.
Before this:
=> dm tree
...
usb_gadget 0 [ ] dwc2-udc-otg | |-- usb@ff740000
usb_gadget 1 [ ] dwc2-udc-otg | |-- usb@ff780000
=> usb start
starting USB...
No USB controllers found
After this:
dwc2-udc-otg usb@ff780000: Invalid dr_mode 1
=> dm tree
...
usb_gadget 0 [ ] dwc2-udc-otg | |-- usb@ff740000
usb 0 [ ] dwc2_usb | |-- usb@ff780000
=> usb start
starting USB...
USB DWC2
Bus usb@ff780000: 1 USB Device(s) found
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
|
|
According to Synopsys Databook, we shouldn't be
relying on GCTL.CORESOFTRESET bit as that's only for
debugging purposes. Instead, let's use DCTL.CSFTRST
if we're OTG or PERIPHERAL mode.
Host side block will be reset by XHCI driver if
necessary. Note that this reduces amount of time
spent on dwc3_probe() by a long margin.
We're still gonna wait for reset to finish for a
long time (default to 1ms max), but tests show that
the reset polling loop executed at most 19 times
(modprobe dwc3 && modprobe -r dwc3 executed 1000
times in a row).
Note that this patch was submitted to Linux in 2016 [1], however I can
confirm it is needed to support gadget mode in U-Boot on my device.
While I am referencing this patch from Linux I am in fact taking the
full existing dwc3_core_soft_reset() function from Linux as it exists
in v6.19-rc5, so it may differ slightly from the information in the
2016 patch.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/drivers/usb/dwc3?id=f59dcab176293b646e1358144c93c58c3cda2813
Suggested-by: Mian Yousaf Kaukab <[email protected]>
Signed-off-by: Felipe Balbi <[email protected]>
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
|
|
DCTL.ULSTCHNGREQ is a write-only field. When doing a read-modify-write
to DCTL, the driver must make sure that there's no unintended link state
change request from whatever is read from DCTL.ULSTCHNGREQ. Set link
state change to no-action when the driver writes to DCTL.
Note that this patch was submitted upstream in Linux in 2020 [1],
and I've confirmed I need it in U-Boot to enable gadget mode.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/drivers/usb/dwc3?id=5b738211fb59e114727381d07c647a77c0010996
Signed-off-by: Thinh Nguyen <[email protected]>
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
|
|
Since EP0 transactions need to be completed before the controller halt
sequence is finished, this may take some time depending on the host and the
enabled functions. Increase the controller halt timeout, so that we give
the controller sufficient time to handle EP0 transfers.
This patch was originally submitted to Linux in 2022, but is required to
use USB gadget mode on my device in U-Boot.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=461ee467507cb98a348fa91ff8460908bb0ea423
Signed-off-by: Wesley Cheng <[email protected]>
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
|
|
Add support for the ip and version_type fields from the Linux
version of the dwc3 driver. Included in this is support for a
few additional macros in the header from Linux as well.
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
|
|
When the cyclic function video_idle() takes too long, a message like the
following is displayed:
cyclic function video_init took too long: 87707us vs 5000us max
The text "video_init" is misleading. Replace it by "video_idle".
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
When building Exynos boards, configure OF_UPSTREAM_VENDOR to build all
device trees in:
- "samsung/" for 32-bit ARM platforms.
- "exynos/" for 64-bit ARM platforms.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
With the support for common speed grade configuration added in commit
65a6b83a9b7f ("mach-k3: refactor A53 speed grade clock-rate fixup"),
this patch extends the support to AM64x SoCs.
Signed-off-by: Anshul Dalal <[email protected]>
|
|
Enable the MMC command on the MediaTek MT8365 EVK. This is useful since
the primary boot device is an eMMC.
A few partition commands are also enabled since the mmc command alone
is not enough to read all partitions on the eMMC.
Signed-off-by: David Lechner <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-stm
- spi: stm32: OSPI and QSPI optimization
- Update stm32 clock drivers to restore boot for STM32MP13/STM32MP2
board family
- Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot
- Use CONFIG_STM32MP15X to discern STM32MP15xx on DH STM32MP15xx DHSOM
- Reinstate missing SPL configs for DH STM32MP15xx DHSOM
- stm32mp2 boards: read boot index from backup register
- video: simple_panel: add support for "rocktech,rk043fn48h" display
- Add .of_to_plat callback in stm32_ltdc driver
|
|
This symbol is used on a number of PowerPC platforms as well, so make it
available there again.
Fixes: 424b324165ea ("armv7: Add CPLD support via IFC to the ls1021a-iot board.")
Acked-by: Peng Fan <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
Add the compatible "rocktech,rk043fn48h" for simple-panel driver.
Signed-off-by: Raphael Gallais-Pou <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Following the 'commit 95b5a7de30f6 ("FWU: STM32MP1: Add support to
read boot index from backup register")', this patch enables reading
the boot index from backup registers on STM32MP2 platforms.
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Re-enable missing configs for DH STM32MP15xx DHSOM, to allow those
devices to successfully boot again.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Use plain CONFIG_STM32MP15X to discern code which is specific to
STM32MP15xx in DH STM32MP1 DHSOM board files.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Drivers should extract device-tree data before probing via the
.of_to_plat hook.
Implement it for stm32_ltdc driver. No functional change.
Signed-off-by: Raphael Gallais-Pou <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Add bootph-all property in ltdc node in stm32mp257f-ev1-u-boot.dtsi
to fix the following issue :
Video device 'display-controller@48010000' cannot allocate frame buffer
memory - ensure the device is set up beforen
stm32_rifsc bus@42080000: display-controller@48010000 failed to bind on
bus (-28)
stm32_rifsc bus@42080000: Some child failed to bind (-28)
initcall_run_r(): initcall initr_dm() failed
ERROR ### Please RESET the board ###
Fixes: 29ab19c2bead ("Subtree merge tag 'v6.18-dts' of dts repo [1] into dts/upstream")
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
During clock's registration, clock's name are used to establish parent -
child relation. On STM32MP13 and STM32MP25, most of SCMI clocks are parent
clocks.
Since commit fdb1bffe2827 ("clk: scmi: Postpone clock name resolution"),
all scmi clocks are named by default "scmi-%zu" until they are enabled,
it breaks clocks registration and boot process for STM32MP13/25
platforms.
Rework the STM32 core clock driver and STM32MP13/25 clock description
to use clock index instead of their real name.
Introduce struct clk_parent_data which allows to identify parent clock
either by index or by name. Name is only used for particular clocks
provided by IP which are clock provider as i2s/i2s_ckin, usb0/ck_usbo_48m,
and ltdc/ck_ker_ltdc.
STM32_GATE() and STM32_COMPOSITE_NOMUX macros are updated in order to
use parent clock index.
As STM32MP13 supports both SPL and SCMI boot, keep using an array
with clock's name for SPL.
Fixes: fdb1bffe2827 ("clk: scmi: Postpone clock name resolution")
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
Add SCMI clocks. These clocks are used as parent clocks and are
referenced by their rcc's node position in clk-stm32mp13.c
Fixes: fdb1bffe2827 ("clk: scmi: Postpone clock name resolution")
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
Reorder include following rules available here :
https://docs.u-boot.org/en/latest/develop/codingstyle.html#include-files
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
FIFO accesses uses u8 only for read/write.
In order to optimize throughput, add u16 or u32 read/write
accesses when possible.
Set FIFO threshold level value accordingly.
Test performed by writing and reading 64MB on sNOR on
stm32mp157c-ev1 board:
before after ratio
Write : 428 KB/s 719 KB/s +68%
Read : 520 KB/s 3200 KB/s +615%
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
When WATCHDOG_RESET() was replaced by schedule() in commit
29caf9305b6f ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
we not only reset the watchdog but also call the cyclic infrastructure
which takes time and has impact on read accesses performances.
Move schedule() from _stm32_qspi_read_fifo() to _stm32_qspi_poll()
and call schedule() only every 1MB chunk of data.
Test performed by reading 64MB on sNOR on stm32mp157c-ev1 board:
before after ratio
Read : 201 KB/s 520KB/s +258%
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
Schedule() is called every u8/u16 or u32 read accesses which is overkill.
Move schedule() from stm32_ospi_read_fifo() to stm32_ospi_tx_poll()
and call schedule() only every 1MB chunk of data.
Test performed by reading 64MB on sNOR on stm32mp257f-ev1 board:
before after ratio
Read : 10.6MB/s 14.2MB/s +34%
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request doc-2026-04-rc2
Documentation:
* describe QEMU VGA emulation
* development process
- Move the existing block about patch application
- Rework the custodian feedback section
- Explain when/how Custodians may edit patches
- Move Custodians section
- Make "Work flow of a Custodian" a subsection
- Document using b4 and patchwork for custodians
* develop: codingstyle: Update b4 external link
* develop: sending_patches: Update link to patchwork
|
|
Vishal Mahaveer <[email protected]> says:
Add 32k crystal initialization support for am62x, am62ax and am62px TI boards.
Link: https://lore.kernel.org/r/[email protected]
|
|
Enable 32k crystal on the board. If external 32k source is not
used, 32k rc-osc comes into play, which is accurate to +-20%.
Signed-off-by: Vishal Mahaveer <[email protected]>
|
|
Enable 32k crystal on the board. If external 32k source is not
used, 32k rc-osc comes into play, which is accurate to +-20%.
Signed-off-by: Vishal Mahaveer <[email protected]>
|
|
Enable 32k crystal on the board. If external 32k source is not
used, 32k rc-osc comes into play, which is accurate to +-20%.
Signed-off-by: Vishal Mahaveer <[email protected]>
|
|
Add a common helper function for doing the basic configuration
required for enabling the 32k crystal on some of the TI boards.
Signed-off-by: Vishal Mahaveer <[email protected]>
|
|
If realloc fails, list->strings was set to NULL and
it would create a leak. This commit ensures that if we cannot
add a string to the list, the list stays in a good state.
Signed-off-by: Francois Berder <[email protected]>
|
|
It can be useful in xPL to access symbols from binman, such as the
offset/position and size of a binman entry.
Place these binman symbols together at the end of the xPL binary for
ARMv8, similar to ARM and RISC-V.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Julien Stephan <[email protected]> says:
The driver is based on the kernel driver for mt8188.
While at it, also add pinmux_property_set ops for mediatek pinctrl framework.
Link: https://lore.kernel.org/r/20260122-add-mt8188-pinctrl-support-v2-0-324b4c8f2b64@baylibre.com
|
|
Add pinmux_property_set ops for mediatek pinctrl framework
Signed-off-by: Julien Masson <[email protected]>
Signed-off-by: Vitor Sato Eschholz <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Tested-by: David Lechner <[email protected]>
|
|
Add pinctrl driver for mt8188. The driver is based on the kernel driver.
Signed-off-by: Chris-QJ Chen <[email protected]>
Signed-off-by: Jill.Wu <[email protected]>
Signed-off-by: Vitor Sato Eschholz <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
|
|
- We already have good custodian documentation for patchwork, add a
reference and then link to it here.
- Add a reference to the existing b4 documentation, and reference it
here.
- Note and link to patchwork integration, am/shazam and ty features of
b4 as these are the most likely useful portions. Be specific about
keeping the default ${summary} as that includes important information.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
Make use of an anonymous reference for the external link here, per rST
best practices.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
Rather than pointing at the source code for b4, point the the official
documentation. Also, use an anonymous reference for the link, per rST
best practices.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
Make the "Work flow of a Custodian" section be a subsection of the
Custodians section.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
|
