| Age | Commit message (Collapse) | Author |
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When building with GCC 15.2 the following warning show up:
scripts/dtc/libfdt/fdt_overlay.c:422:21: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
422 | sep = memchr(fixup_str, ':', fixup_len);
| ^
scripts/dtc/libfdt/fdt_overlay.c:432:21: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
432 | sep = memchr(name, ':', fixup_len);
| ^
Define sep as const char *.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Building with GCC 15.2 results in warnings:
tools/asn1_compiler.c: In function ‘tokenise’:
tools/asn1_compiler.c:442:37: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
442 | dir = bsearch(&tokens[tix], directives,
| ^
tools/asn1_compiler.c: In function ‘main’:
tools/asn1_compiler.c:632:11: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
632 | p = strchr(grammar_name, '.');
| ^
bsearch() is defined as
void *bsearch(size_t n, size_t size;
const void key[size], const void base[size * n],
size_t n, size_t size,
typeof(int (const void [size], const void [size]))
*compar);
* Use the correct type for dir.
strchr() is defined as
char *strchr(const char *s, int c).
* Use a conversion for the assignment to p.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The net_loop() returns 1 on success, but update_load() returns 0 on
success. Do not assign rv which is the return value of update_load()
to net_loop(), instead assign net_loop() return value to a temporary
variable and then update rv only if the temporary variable is negative.
This way the update_load() now correctly returns 0 on tftp success and
1 only on failure.
Signed-off-by: Marek Vasut <[email protected]>
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It might still be a positive number due to the call to sqfs_disk_read.
This only happens when reading a file from an uncompressed squashfs.
I found this by trying to boot using the extlinux bootmethod, where
positive values are treated as errors.
Signed-off-by: Michael Zimmermann <[email protected]>
Acked-by: Richard Genoud <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Javier has left Linaro. Forward to his new email address.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Javier Tia <[email protected]>
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Change the SUPPORTS_FW_LOADER option to be enabled by default.
This is a dependency-only option intended to be used like:
depends on SUPPORTS_FW_LOADER
Instead of having to always remember to do both:
depends on CMDLINE
depends on ENV_SUPPORT
In order to actually work though, the option has to be enabled.
Reported-by: Weijie Gao <[email protected]>
Closes: https://lore.kernel.org/u-boot/[email protected]/
Fixes: 4ed440e6be80 ("fw_loader: Introduce SUPPORTS_FW_LOADER symbol")
Signed-off-by: David Lechner <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Tested-by: Weijie Gao <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2026.07-rc1 v3. The biggest part is new
pcie driver for Versal Gen 2 SOC. Others are small fixes and
adjustments.
versal2:
- Wire PCIe IP
cmd/fpga:
- Fix loadb help text guarding
- Add support for skipping fpga ID check
zynqmp:
- Describe missing devices/IDs
- Fix issue around zu63dr_SE
clk/versal:
- Fix out-of-bounds parent id for DUMMY_PARENT
net/gem:
- Add support for 10GBE
- Clear stale speed bits in NWCFG
net/axi_emac:
- Filter out broadcast and multicast packets
pci:
- Add driver for AMD PCIe IP based on DesignWare core
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Commit ecba4380ad26 ("net: zynq_gem: Update the MDC clock divisor in the
probe function") changed zynq_gem_init() from a direct register write to
a read-modify-write pattern in order to preserve MDC clock divider bits.
However, the old speed selection bits (SPEED100/SPEED1000) are never
cleared before OR-ing in the new value.
When the PHY renegotiates at a different speed between successive calls
to zynq_gem_init() (e.g. link flapping from 1 Gbps to 100 Mbps on a
marginal cable), both SPEED100 and SPEED1000 end up set simultaneously
in NWCFG. This confuses the GEM hardware and no frames are received.
Fix by explicitly clearing both speed bits before merging the new
configuration, so only the currently negotiated speed is ever active.
Fixes: ecba4380ad26 ("net: zynq_gem: Update the MDC clock divisor in the probe function")
Signed-off-by: Rafał Hibner <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add environment variable 'fpga_skip_idcheck' that when set to '1' or
'y' allows bypassing the device ID validation during bitstream loading.
This is useful for loading bitstreams on devices whose ID codes are not
yet recorded in the SOC driver.
Usage: setenv fpga_skip_idcheck 1
fpga loadb 0 ${loadaddr} ${filesize}
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/d0f11d0a8d48b284683f00d20dfbe323c11f2943.1776360720.git.michal.simek@amd.com
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Reinitialize RX BDs and rewrite rxqbase on every init instead of only
on the first init. This ensures a clean BD state on every init for all
GEM configurations.
For AMD Versal Gen 2 10GBE this is required since the USX block
resets the RX DMA pointer to rxqbase on each init, so BDs must be
rebuilt each time to stay in sync with hardware.
Signed-off-by: Pranav Tilak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Set 128-bit AXI bus width in network config for 10GBE. The default 64-bit
setting causes DMA data corruption.
Signed-off-by: Pranav Tilak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add SPEED_10000 case in the speed switch with the fixed 150 MHz
tx_clk rate. Without this, clk_rate stays 0 for 10000 Mbps and
clk_set_rate(0) on a fixed clock aborts initialization.
Signed-off-by: Pranav Tilak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The help text for the "fpga loadb" command was incorrectly guarded by
CONFIG_CMD_FPGA_LOADP instead of CONFIG_CMD_FPGA_LOADB. This meant the
loadb help text would only be shown when LOADP was enabled, rather than
when LOADB was enabled.
Fix the preprocessor condition to use the correct config option.
Fixes: f8f378877b8f ("fpga: add new symbol for fpga_loadb")
Reviewed-by: Alexander Dahl <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/366dfe78e2028f53a6274da75547fb68844764cc.1775549229.git.michal.simek@amd.com
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The zu63dr_SE and zu67dr_SE devices share the same silicon ID code
0x046D7093 and cannot be distinguished at runtime. The SOC driver
reports zu67dr_SE for this ID, which causes fpga loadb to reject
zu63dr_SE bitstreams.
Register zu63dr_SE as an alternate FPGA device when zu67dr_SE is
detected. This allows users to load either bitstream by selecting
the appropriate device number:
- Device 0 (zu67dr_SE): fpga loadb 0 ${loadaddr} ${filesize}
- Device 1 (zu63dr_SE): fpga loadb 1 ${loadaddr} ${filesize}
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/591134b1c66701fa14a21fecac4f7a772ddba876.1775558062.git.michal.simek@amd.com
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Add ID codes for the following ZynqMP devices:
- XCZU1EG_LR (0x0468A093)
- XCZU42DR (0x046D4093)
- XCZU55DR (0x046D2093)
- XCZU57DR (0x046D3093)
- XCZU58DR (0x047F9093)
- XCZU59DR (0x047FC093)
- XCZU63DR (0x046D5093)
- XCZU64DR (0x046D6093)
- XCZU65DR (0x046D1093)
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/330098196cc84115899ea7a14665a8df7e279fae.1775557948.git.michal.simek@amd.com
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Enable the AMD Versal Gen 2 DW PCIe host controller and NVMe storage
in the virtual platform defconfig:
- CONFIG_PCI / CONFIG_CMD_PCI: core PCI stack and pci command
- CONFIG_PCIE_DW_AMD: AMD Versal Gen 2 PCIe host driver
- CONFIG_NVME_PCI: NVMe-over-PCIe storage driver
- CONFIG_CMD_LSBLK: block device listing command
- CONFIG_DM_PCA953X: GPIO expander driver for PERST# control
Add BOOT_TARGET_DEVICES_NVME to amd_versal2.h so NVMe is included
in the distro boot target list when CONFIG_NVME is enabled.
Signed-off-by: Pranav Sanwal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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The AMD Versal Gen 2 PCIe host controller places its DBI registers
(0x100000000000, 1 MB) and config space (0x100000100000, 255 MB)
above 1 TB. Without MMU entries covering these ranges, U-Boot faults
when the PCIe driver accesses them.
The two regions are merged into a single entry as these are
contiguous and share identical MMU attributes. Add this
entry under a CONFIG_IS_ENABLED(PCIE_DW_AMD) guard so it is only
included when the PCIe driver is configured. VERSAL2_MEM_MAP_USED is
adjusted from 5 to 6 accordingly, keeping the DRAM bank index correct.
Signed-off-by: Pranav Sanwal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Add support for the DesignWare-based PCIe host controller found in
AMD Versal2 SoCs. This enables PCIe functionality (e.g. NVMe storage)
on boards such as the VEK385.
The driver builds on the existing pcie_dw_common infrastructure and
adds Versal2-specific handling: it maps the SLCR register region to
mask and clear TLP interrupt status bits, parses dbi/config/atu/slcr
register regions from device tree, and supports an optional PERST#
GPIO on child nodes for endpoint reset sequencing. The outbound iATU
is programmed for the non-prefetchable memory window from device tree
ranges.
Signed-off-by: Pranav Sanwal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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When a clock parent entry is DUMMY_PARENT (0xFFFFFFFE), masking it
with CLK_PARENTS_ID_MASK (0xFFFF) produces the value 0xFFFE (65534).
This value is stored in parent->id and later used as a clock array
index in versal_clock_get_parentid(). Since clock_max_idx is
typically 228, accessing clock[65534] is out-of-bounds, and the
garbage value read is used as a clock ID in subsequent clock rate
calculations, eventually causing U-Boot to crash. This is observed
as a crash during "clk dump" on AMD Versal Gen 2.
Fix this by setting parent->id = 0 for DUMMY_PARENT entries.
Fixes: 95105089afe2 ("clk: versal: Add clock driver support")
Signed-off-by: Padmarao Begari <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Set the XAE_RAF_BCSTREJ_MASK bit in the Reset and Address Filter (RAF)
register during hardware initialization to make the MAC drop incoming
frames with broadcast destination address. This avoids unnecessary
broadcast traffic processing by the CPU.
Additionally, when IPv6 is not enabled (CONFIG_IPV6), also set the
XAE_RAF_MCSTREJ_MASK bit to reject multicast frames. Multicast
rejection is skipped when IPv6 is configured because IPv6 Neighbor
Discovery and DHCPv6 rely on multicast.
Expose the RAF register (offset 0x0) in struct axi_regs which was
previously hidden in a reserved array.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/07ad94eb8a3a9d80273a16a7ac8c7caaba607fe2.1774282153.git.michal.simek@amd.com
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Simon Glass <[email protected]> says:
This series reworks the FIT test (test_fit.py) to make it easier to
maintain and extend. It fixes the buildconfigspec so the test actually
runs on sandbox, avoids unnecessary U-Boot restarts, renames the main
test for easier selection, adds a missing-kernel check, fixes Python
warnings, converts the test to use a class, splits into separate test
functions, and adds Sphinx documentation.
Link: https://lore.kernel.org/r/[email protected]
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Add a Sphinx automodule page for test_fit.py so it appears in the pytest
documentation alongside the other test modules. The index already uses a
glob pattern, so this is picked up automatically.
Signed-off-by: Simon Glass <[email protected]>
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Create an 'fsetup' fixture which sets up files and parameters, and a
prepare() helper which builds a FIT with given parameter overrides.
Update check_equal() and check_not_equal() to look up filenames from a
params dict by key, reducing the number of local variables needed.
Split the single test_fit_operations() into individual test functions so
that each appears separately in the results.
Signed-off-by: Simon Glass <[email protected]>
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Move this test over to use a class instead of a function, so we can
easily split it into some related tests.
Move the TODO so it is part of the comment for the class.
Tidy up some function comments while we are here.
Signed-off-by: Simon Glass <[email protected]>
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Fix some warnings and disable one that cannot be fixed.
Signed-off-by: Simon Glass <[email protected]>
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U-Boot should complain if the kernel is missing, so add a check for this
in test_fit_base()
Signed-off-by: Simon Glass <[email protected]>
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The current name is uses as a root name by a few other tests, such as
test_fit_ecdsa() which makes it hard to run just this test.
Rename it to test_fit_base()
Signed-off-by: Simon Glass <[email protected]>
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We don't actually need to use the test FDT as the control FDT. It slows
down the test since U-Boot needs to be restarted each time.
Instead of restarting, update the test to clear memory before it loads
the FIT.
Rename the data-variable to fdt_data since is it no-longer the control
FDT.
Signed-off-by: Simon Glass <[email protected]>
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The test_fit test requires buildconfigspec('fit_signature') but does
not exercise signature verification. The ITS template includes a
signature-1 node, but mkimage only needs TOOLS_FIT_SIGNATURE (a host
tool option) to handle it, not CONFIG_FIT_SIGNATURE in the U-Boot
binary.
Since sandbox does not enable CONFIG_FIT_SIGNATURE, the test is silently
skipped on every run. Change the marker to buildconfigspec('fit') which
is all the test actually needs.
Signed-off-by: Simon Glass <[email protected]>
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Currently there is no possibility to flush stdin after autocommands are
executed. If in the bootcmd the stdin is changed, e.g. from nulldev to
serial, it could happen that junk characters sit in the fifo and appear
on the cli.
Add a option to clear stdin before starting the CLI.
Signed-off-by: Gregor Herburger <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add a common helper console_flush_stdin() to drain all pending
characters from stdin. This consolidates the open-coded
while (tstc()) getchar() pattern that appeared in multiple places
across the tree.
Signed-off-by: Gregor Herburger <[email protected]>
Reviewed-by: Alexander Sverdlin <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Some extension boards have EEPROM part numbers that do not directly match
their devicetree overlay filenames. Introduce a static name_mapping table
and a set_cape_overlay() helper that translates the part number and version
strings read from the EEPROM into the correct overlay filename.
When no entry matches, fall back to the existing behavior of constructing
the overlay name as "<part_number>-<version>.dtbo" directly from the
EEPROM content.
Add an initial entry mapping BB-GREEN-HDMI revision 00A0 to
am335x-bone-hdmi-00a0.dtbo.
Signed-off-by: Kory Maincent (TI) <[email protected]>
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Set CONFIG_ENV_MMC_EMMC_HW_PARTITION=1 to store the environment in the
eMMC first hardware boot partition instead of defaulting to 0 (user
data area), where the rootfs and data partitions normally reside,
risking corruption. This keeps the full boot stack self-contained in
the eMMC hardware boot partition.
Enable CONFIG_ENV_RELOC_GD_ENV_ADDR so that gd->env_addr is adjusted by
the relocation offset during U-Boot relocation. Without it, gd->env_addr
keeps pointing to the pre-relocation address of the default
environment, leading to incorrect environment access before env_load()
completes.
Fixes: 3f0528882c0d ("board: toradex: add aquila am69 support")
Signed-off-by: Vitor Soares <[email protected]>
Acked-by: Francesco Dolcini <[email protected]>
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Although less common, ADSP SoM boards can be operated standalone without
a carrier board. The SoM can be powered over USB-C by moving the jumper
on JP1.
The board configuration needs to be heavily refactored to reduce the
number of defconfigs and leverage the devicetree. The TI DP83867
support, which is dependent on that configuration, needs to be removed.
Until then this change allows the same U-Boot binary to work correctly
both with carrier boards and the standalone SoM.
The carrier board initialization code in somcrr_ezkit.c and
somcrr_ezlite.c calls gpio_hog_lookup_name() to find ethernet
control GPIOs, but does not check if the lookup succeeds before
using the returned pointers.
When running on a standalone SoM without a carrier board, these
GPIO hogs do not exist in the device tree. The gpio_hog_lookup_name()
function returns -ENODEV and sets the pointer to NULL, but the code
continues to call dm_gpio_set_value() with uninitialized pointers,
causing a synchronous abort exception:
"Synchronous Abort" handler, esr 0x96000004
elr: 00000000960326c4 lr : 0000000096038d5c (reloc)
Signed-off-by: Philip Molloy <[email protected]>
Reviewed-by: Greg Malysa <[email protected]>
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The current gzwrite() implementation is limited to 4 GiB compressed
input buffer size due to struct z_stream_s { uInt avail_in } member,
which is of type unsigned int. Current gzwrite() implementation sets
the entire input buffer size as avail_in and performs decompression
of the whole compressed input buffer in one round, which limits the
size of input buffer to 4 GiB.
Rework the decompression loop to use chunked approach, and decompress
the input buffer in up to 4 GiB - 1 kiB avail_in chunks, possibly in
multiple decompression rounds. This way, the compressed input buffer
size is limited by gzwrite() function 'len' parameter type, which is
unsigned long.
In case of sandbox build, include parsing of 'gzwrite_chunk'
environment variable, so the chunked approach can be thoroughly tested
with non default chunk size. For non-sandbox builds, the chunk size is
4 GiB - 1 kiB.
The gzwrite test case is extended to test various chunk sizes during
gzwrite decompression test.
Signed-off-by: Marek Vasut <[email protected]>
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Currently, virtio_mmio_probe() returns 0 when it encounters an invalid
magic value, an unsupported version, or a dummy device (ID 0). In
U-Boot's driver model, returning 0 indicates a successful probe. This
causes the system to incorrectly register and activate invalid or
placeholder devices, potentially leading to undefined behavior or
crashes later on.
Update the probe function to return appropriate error codes (-ENODEV
for invalid magic values and dummy devices, and -ENXIO for unsupported
versions). This fix correctly instructs the DM to abort the binding
process.
Fixes: fdc4aca89ecb ("virtio: Add virtio over mmio transport driver")
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Acked-by: Daniel Palmer <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29880
- Convert TQMA7 boards to SPL.
- Use second Ethernet MAC also from fuse on i.MX dhelectronics boards.
- Add support for Toradex Verdin iMX95.
- Drop SPL_POWER_LEGACY from imx8m boards.
- Increase the Aquantia Ethernet PHY reset timeout.
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Everything is in place to allow this board to support EFI Capsule updates.
Enable everything needed to support Capsule updates, as well as Capsule
on Disk. All this allows updating U-Boot on eMMC directly from linux using
fwupd. Also enable DFU_MMC, which is a requirement for EFI Capsule flashing
to eMMC/SD to work.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Ferass El Hafidi <[email protected]>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-4-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <[email protected]>
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Everything is already in place for EFI capsule updates, so enabling
Capsule on Disk is fairly trivial. This allows updating U-Boot on SPI
flash from Linux using fwupd's Capsule support.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Ferass El Hafidi <[email protected]>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-3-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <[email protected]>
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Previously, Amlogic SoCs defined their own reset_cpu() implementation
that essentially just did what the sysreset PSCI driver already
supports. To reduce duplication (and allow for EFI Capsule on Disk
support), make use of it instead of a board-specific reset_cpu.
This does not affect SPL, as in that stage we do not actually have PSCI
(BL31 is not loaded yet at that point). Also, boards that don't select
PSCI support in their config will not have it enabled.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Ferass El Hafidi <[email protected]>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-2-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <[email protected]>
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This is in preparation of enabling SYSRESET across all Amlogic boards by
default. SYSRESET brings its own reset_cpu implementation which will
conflict with the one defined in board-common.c.
SPL however will not have SYSRESET enabled (due to overhead in the final
image, as we have very little space to work with), and thus will still
need that reset_cpu to be defined. Furthermore, some boards do not enable
PSCI support in U-Boot, so they may still need this implementation.
Guard reset_cpu inside #ifdef to only compile it in when SYSRESET is not
enabled.
Signed-off-by: Ferass El Hafidi <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-1-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <[email protected]>
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Since Linux v7.0, the MMC controllers has the following properties:
assigned-clocks = <&clkc CLKID_SD_EMMC_x_CLK0>;
assigned-clock-rates = <24000000>;
Which causes mmc controllers to fail in probe.
Make sure we do not fail until we properly implement rate setup.
Tested-by: Ferass El Hafidi <[email protected]> # on lepotato
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Synchronize line reset configuration with SDK 4.28 parameters.
These values are programmed into the PHY.
Signed-off-by: Marek Vasut <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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The ufshcd_read_string_desc() can perform out of bounds write and
corrupt heap in case the input utf-16 string contains code points
which convert to anything more than plain 7-bit ASCII string.
This occurs because utf16_to_utf8(dst, src, size) in U-Boot behaves
differently than Linux utf16s_to_utf8s(..., maxlen), but the porting
process did not take that into consideration. The U-Boot variant of
the function converts up to $size utf-16 fixed-length 16-bit input
characters into as many 1..4 Byte long variable-length utf-8 output
characters. That means for 16 Byte input, the output can be up to 64
Bytes long. The Linux variant converts up utf-16 input into up to
$maxlen Bytes worth of utf-8 output, but stops at the $maxlen limit.
That means for 16 Byte input with maxlen=32, the processing will stop
after writing 32 output Bytes.
In case of U-Boot, use of utf16_to_utf8() leads to potential corruption
of data past the $size Bytes and therefore corruption of surrounding
content on the heap.
The fix is as simple, allocate buffer that is sufficient to fit the
utf-8 string. The rest of the code in ufshcd_read_string_desc() does
correctly limit the buffer to fit into the DMA descriptor afterward.
Signed-off-by: Marek Vasut <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Assert Rockchip UFS controller resets during initialization and HCE
enable, as it is done by the Linux driver.
This is required to make some UFS chips, such as Foresee FEUDNN064G-C2G0,
work properly.
Note that the resets were already requested in the probe function, just
not used.
Signed-off-by: Alexey Charkov <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Switch the Phanbell i.MX8MQ SPL to full Driver Model (DM) boot flow by
moving early device initialization into devicetree and enabling the
required SPL DM subsystems.
Mark GPIO, USDHC, pinctrl, and regulator nodes with bootph-pre-ram so
they are available during SPL. With DM handling MMC and power rails,
remove legacy board-specific USDHC, GPIO, and pad setup code from SPL.
Update the SPL initialization sequence to use spl_early_init(), clears
BSS earlier, and explicitly enables USDHC clocks before handing off to
board_init_r().
Signed-off-by: Peng Fan <[email protected]>
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Migrate the Kontron PITX-IMX8M board from the legacy power framework
to the DM PMIC infrastructure.
The SPL power initialization is converted to use DM_PMIC_PFUZE100,
dropping all legacy I2C, GPIO, pinmux, and MMC setup code that is
now handled through the device tree and driver model instead.
Key changes:
- Switch PFUZE100 access to DM PMIC APIs
- Enable SPL OF_CONTROL and mark required nodes with bootph*
- Remove legacy I2C and power configuration
- Enable SPL DM, pinctrl, regulator, and PMIC support
- Adjust SPL stack placement for DM usage
Signed-off-by: Peng Fan <[email protected]>
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This board does not have any code to call legacy power API, so drop the
selection of CONFIG_SPL_POWER_LEGACY.
Signed-off-by: Peng Fan <[email protected]>
|
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This board does not have any code to call legacy power API, so drop the
selection of CONFIG_SPL_POWER_LEGACY.
Signed-off-by: Peng Fan <[email protected]>
|
|
This board does not have any code to call legacy power API, so drop the
selection of CONFIG_SPL_POWER_LEGACY.
Signed-off-by: Peng Fan <[email protected]>
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