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Remove register macros for registers which are not used by this driver.
This makes it easier to get an overview of which registers are really
used by the driver. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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The PFC offset is no longer used directly in the driver since commit
fbf26bea3964 ("gpio: renesas: Migrate to pinctrl GPIO accessors")
Drop the pfc_offset parsing.
Fixes: fbf26bea3964 ("gpio: renesas: Migrate to pinctrl GPIO accessors")
Signed-off-by: Marek Vasut <[email protected]>
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Add PHY driver for Multi-Protocol PHY present on Renesas R-Car X5H
R8A78000 SoC. Currently, the PHY driver only supports configuring
the MPPHY for ethernet operation.
Signed-off-by: Thanh Quan <[email protected]>
Signed-off-by: Phong Hoang <[email protected]>
Signed-off-by: Hai Pham <[email protected]> #Fix License-Identifier
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Clean up macros, indent, clock and reset handling in probe,
rename the driver and add r8a78000- into compatible string,
update commit message.]
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Add support for the Ethernet Physical Coding Sublayer (PCS) controller
on R-Car Gen5 SoCs, specifically the Renesas R-Car X5H R8A78000.
The controller is based on the SERDES infrastructure used in previous
R-Car generations, with updates for Gen5 register layout and features.
Because majority of this driver is SoC-specific register programming,
the majority of this driver is different enough from R8A779F0 SerDes
driver to justify its own driver. Deduplication of the remaining bits
of code does not yield any improvement.
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Phong Hoang <[email protected]>
Signed-off-by: Tam Nguyen <[email protected]>
Signed-off-by: Thanh Quan <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Add missing clk_bulk_disable() in fail path.
Drop always-true aneg_on setting.
Reduce poll delay from 100s to 100ms.
Use bulk reset operations to finalize reset handling.]
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Add support for the Renesas Ethernet Switch3 (RSW3) controller,
present in R-Car Gen5 SoCs such as R-Car X5H (R8A78000). The
hardware offset differences are handled via driver match data.
The driver newly detects whether the switch prot is connected
to xPCS or not, and if so, turns on MIOC bit 3. This is new on
R-Car X5H. GWCKSC register is also programmed only on X5H. The
rest of the operation is identical to RSwitch2.
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Tam Nguyen <[email protected]>
Signed-off-by: Phong Hoang <[email protected]>
Signed-off-by: Thanh Quan <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
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The MPIC_MDC_CLK clock setting value differs between R-Car S4
and R-Car X5H. Parametrize the value in preparation for R-Car
X5H addition into this driver. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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The GWDCBAC0, GWDCBAC1, FWPBFCSDC, CABPIRM register offsets changed
between R-Car S4 and R-Car X5H. Parametrize their offsets in preparation
for R-Car X5H addition into this driver. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Inline FWRO, CARO, GWRO, TARO, RMRO macros directly into the
follow up register macros. FWRO, CARO, GWRO, TARO are already
zero, drop them. RMRO is 0x1000, increment all registers which
add RMRO by 0x1000 directly. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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The forwarding engine CSD register offset changed between the
R-Car S4 and R-Car X5H. Parametrize this offset in preparation
for R-Car X5H addition into this driver. Clean up the macro
parameter names and make them more obvious. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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The total port counts differ across variants of this IP in
R-Car S4 and R-Car X5H. Parametrize port count in preparation
for R-Car X5H addition into this driver. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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The COMA, ETHA, GWCA offsets differ across variants of this IP in
R-Car S4 and R-Car X5H. Parametrize these offsets in preparation
for R-Car X5H addition into this driver. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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This IP does support operating MII and SerDes via different ports.
Currently, the driver assumes that MII and SerDes are always bound
together on the same port, but this may not be the case. Implement
support for controlling MII and SerDes separately.
While the change is extensive, the gist of the change is to pass
pointer to the selected port registers to MII or SerDes functions,
depending on which port and operations should be done on that port.
Each combined ETHA instance contains both MII and SerDes register
pointers, which may not point to the same port, and passes those
registers to MII and SerDes functions respectively to control the
MII or SerDes of each port.
Signed-off-by: Marek Vasut <[email protected]>
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The new version of RSwitch3 in Renesas R-Car Gen5 uses multiple
clock to supply the IP. Convert the driver to bulk clock API to
cater for both single clock of R-Car S4 and multiple clock of
R-Car Gen5. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Empty RX DMA descriptor must contain .die_dt field set to DT_FEMPTY,
because hardware DMA overwrites this field to non-DT_FEMPTY when data
are received, and the .recv callback tests the content of RX descriptor
.die_dt field to determine whether hardware did receive any data and
updated the .die_dt field, and based on that information, receives a
packet or not. Fix the incorrect RX DMA descriptor initialization to
assure the .recv callback always works correctly.
Signed-off-by: Marek Vasut <[email protected]>
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Remove macros which are not used in the driver. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Fix indent from multiple spaces to tabs, to be consistent with
coding style and the rest of the driver. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Add support for jumping to Linux kernel through OPTEE-OS on ARMv7a to SPL.
This is already supported on ARMv8a, this patch adds the ARMv7a support.
Extend the SPL fitImage loader to record OPTEE-OS load address and in case
the load address is non-zero, use the same bootm-optee.S code used by the
U-Boot fitImage jump code to start OPTEE-OS first and jump to Linux next.
Signed-off-by: Marek Vasut <[email protected]>
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Add support for jumping to Linux kernel through OPTEE-OS on ARMv7a.
This is only supported if U-Boot runs in PL1 secure. This change adds
two components, one is fitImage OPTEE-OS loadable handler, which makes
a note of OPTEE-OS being loaded and stores the load address for later
jump to it. The second part is the actual jump to Linux through OPTEE-OS.
The jump through OPTEE-OS requires set up of multiple CPU registers, r1
and r2 are passed through, r0 and r3 have to be set to 0, lr is set to
Linux kernel entry point. This setup is done by new assembler function
boot_jump_linux_via_optee().
The boot_jump_linux_via_optee() also includes STM32MP13xx late TZC
configuration write, this cannot be moved easily, hence the ifdef.
Signed-off-by: Marek Vasut <[email protected]>
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Make sure to pass Clang flags to the KBUILD_CPPFLAGS as well, as this
variable is used for flags during compiling for target
Skipping this leads to Clang being invoked with args for target, but
without target indication, thus defaulting to host arch:
LDS u-boot.lds
clang: error: ... '-mabi=' for target 'x86_64-suse-linux'
clang: error: ... '-mno-thumb' for target 'x86_64-suse-linux'
clang: error: ... '-mno-unaligned-access' for target 'x86_64-suse-linux'
clang: error: ... '-ffixed-r9' for target 'x86_64-suse-linux'
clang: error: ... '-mno-movt' for target 'x86_64-suse-linux'
make: *** [Makefile:2345: u-boot.lds] Fehler 1
Signed-off-by: Dmitrii Sharshakov <[email protected]>
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This option is not available for 32-bit ARM targets and causes an error
when building with Clang:
clang: error: unsupported option '-mgeneral-regs-only' for
target 'arm-none-eabi'
This fixes the following patch (also seems to only concern AArch64):
Link: https://lists.denx.de/pipermail/u-boot/2021-August/458067.html
Signed-off-by: Dmitrii Sharshakov <[email protected]>
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When spl boot device list has multiple FAT devices, any previousely
registered FAT device should be deregistered before registering
next FAT boot device, otherwise the function may not attempt boot
from next FAT device.One of the situations where this issue can be
observed is when the boot device list has two FAT partitions of a
memory device and if booting fails on first partition (because of
file or partition related errors), boot from next partition actually
gets attempted on previous boot device only, as the previous device
has remained marked as registered. Call the function that invalidates
cached boot device in case of failure in booting from current FAT
boot device.
Signed-off-by: Prasad Kale <[email protected]>
Cc: Dan Murphy <[email protected]>
Cc: Sean Anderson <[email protected]>
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Align the implementation to rsa_add_verify_data() by writing the modulus
and r-squared properties with the same length as the key itself. This
fixes signature verification issues when one of the parameters has
leading zeros.
Reported-by: Hans Gfirtner (Nokia) <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
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Technically, commit 24bf44cf88e7 ("spl: fit: Do not fail immediately if
an overlay is not available") introduced that regression as the code
will never advance if spl_fit_get_image_name() will return an error. But
at that time, spl_fit_get_image_node() was used in spl_fit_append_fdt()
which calls fdt_subnode_offset() to get the image node. And I presume
the commit was about the latter failing gracefully and trying the next
one.
But with commit b13eaf3bb4e6 ("spl: fit: Add board level function to
decide application of DTO") that behavior changed and the loop in
spl_fit_append_fdt() no longer uses spl_fit_get_image_node() but
spl_fit_get_image_name() directly. Thus it doesn't make any sense to not
break the loop if that fails.
Also, the original use case of commit 24bf44cf88e7 ("spl: fit: Do not
fail immediately if an overlay is not available") is preserved because
spl_subnode_offset() is now called within the loop and errors are
handled gracefully (and advancing the index).
Fixes: b13eaf3bb4e6 ("spl: fit: Add board level function to decide application of DTO")
Signed-off-by: Michael Walle <[email protected]>
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The U-Boot project has been assigned the vendor ID 'UBOO' [1]. Use this
vendor ID and our release version in the ACPI table headers.
[1] ACPI ID Registry
https://uefi.org/ACPI_ID_List
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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In Azure, older pipelines such as ours do not default to a shallow fetch
but rather do a complete clone. This introduces a marginal time increase
in each task, but also more importantly takes up significant disk space.
We are now getting warnings in some cases about using more than 95% of
our available disk space so take this as a first easy step to resolve
that problem.
Signed-off-by: Tom Rini <[email protected]>
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Rockchip boards may depend on a working MMC regulator in SPL to
successfully load FIT payload from MMC. Typically, these boards only
include the vmmc-supply regulator and not its vin-supply in SPL control
FDT.
The commit f98d812e5353 ("power: regulator: Add vin-supply for GPIO and
Fixed regulators") breaks loading FIT from MMC in SPL on some of these
boards due to now requiring the vin-supply to be included in the SPL
control FDT.
The commit also strangely enables any found vin-supply in
regulator_common_of_to_plat() and not when a regulator is enabled or as
part of regulator_autoset().
Revert the commit to fix FIT loading in SPL on broken boards.
If a board needs to have its vin-supply enabled, two options come to
mind:
- Add regulator-always-on prop to the regulator in the -u-boot.dtsi for
any board.
- Implement full support for reference counting of regulators and then
update the regulator-uclass to enable any found vin-supply when a
regulator is enabled.
This reverts commit f98d812e5353408ef77a46bad1f1cdc793ff8a03.
Reported-by: Dang Huynh <[email protected]>
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Dragan Simic <[email protected]>
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If CONFIG_GPIO_HOG is not set, then gpio_hog_lookup_name() is empty,
and thus does not initialize any of its parameters. It does still
return 0 though, and so any calling function might assume that the
parameters have been initialized successfully.
Change the return value to -ENODEV in this case, as the function
would in the case when CONFIG_GPIO_HOG is set but the gpio hog
could not be found.
Signed-off-by: Wolfgang Wallner <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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In devices where the U-Boot is used as a secondary bootloader, we rely
on the device's primary bootloader to implement CNTFRQ_EL0. However,
this reliance may lead to a non-functional timer in broken firmware.
For instance, some versions of Samsung's S-Boot don't implement it. It's
also not possible to set it in the U-Boot, because it's booted in a lower
exception level. CNTFRQ_EL0 is reported to be 0.
Use gd->arch.timer_rate_hz to override the queried value if set. This
setting needs to be done in the board file, preferrably in timer_init().
This feature is present only when the CONFIG_ARMV8_CNTFRQ_BROKEN is
enabled.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
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When previously using script based bootflows, the U-Boot
environment variable bootargs was used to customize the kernel
commandline at boot time.
In order to get the same behaviour, concatenate the bootflow
commandline with the contents the bootargs environment variable.
Signed-off-by: Nicolas Belin (TI.com) <[email protected]>
Signed-off-by: Guillaume La Roque (TI.com) <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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Introduces support for Device Firmware Upgrade (DFU) over PCIe in
U-Boot. Traditionally, the DFU protocol is used over USB, where a
device enters DFU mode and allows a host to upload firmware or binary
images directly via the USB interface. This is a widely adopted and
convenient method for updating firmware.
In the context of Texas Instruments (TI) SoCs, PCIe can be used as a
boot interface in a manner that differs from the conventional
"PCIe Boot" process, which typically refers to booting an OS or
firmware image from an NVMe SSD or other PCIe-attached storage devices.
Instead, TI SoCs can be configured as a PCIe Endpoint, allowing a
connected PCIe Root Complex (host) to transfer images directly into the
device’s memory over the PCIe bus for boot purposes. This mechanism is
analogous to DFU over USB, but leverages the high-speed PCIe link and
does not depend on traditional storage devices.
By extending the DFU framework in U-Boot to support PCIe, it will be
possible to flash images over PCIe. While this implementation is
motivated by TI SoC use cases, the framework is generic and can be
adopted by everyone for platforms that support PCIe Endpoint mode.
Platforms with hardware support for PCIe-based memory loading can use
this to implement PCIe as a boot mode, as well as to enable flashing
and recovery scenarios similar to DFU over USB.
In summary, enable support for:
- DFU-style flashing of firmware/images over PCIe, analogous to existing
USB DFU workflows
- PCIe as a boot mode where a host can load images directly into device
memory using DFU over PCIe
Signed-off-by: Hrushikesh Salunke <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/28144
- Extend USB support for the i.MX9 family.
- Update memory controller for imx6ulz_smm_m2.
- Add remoteproc support for several i.MX boards.
- Add support for iMX95 15x15 EVK.
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Now that we have a test for QEMU using transfer list from the previous
stage, there are two platforms testing this particular infrastructure. A
problem with the vexpress_fvp platform emulation in Gitlab is that we
often run it on hosts that are fast enough that we run in to a race
condition when trying to acquire the console and the test fails. Remove
both vexpress_fvp tests from Gitlab (they can remain in Azure) to remove
these spurious failures.
Signed-off-by: Tom Rini <[email protected]>
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This also incorporates the following commits to the Dockerfile:
da7942de29f7 Dockerfile: remove Python 2.7
183299d9a400 docker: add OP-TEE and TF-A build for testing Firmware Handoff
Signed-off-by: Tom Rini <[email protected]>
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We don't use Python 2 anywhere. Remove the package from our Docker image.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Raymond Mao <[email protected]> says:
This patch series enable Firmware Handoff [1] CI tests on qemu_arm64 by:
1. fetch MbedTLS (v3.6), OP-TEE (v4.7.0) and TF-A (v2.13.0);
2. build bl1 and fip with both Firmware Handoff and Measured Boot
enabled;
3. pytest to validate the Firmware Handoff feature via bloblist by
checking the existence of expected FDT nodes and TPM events generated
and handed over from TF-A/OP-TEE.
[1] https://github.com/FirmwareHandoff/firmware_handoff
Link: https://lore.kernel.org/r/[email protected]
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Add qemu_arm64_tfa_fw_handoff test entries to azure and gitlab
pipelines.
Signed-off-by: Raymond Mao <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Check the existence of bl1 and fip from:
1. /opt/tf-a/${board_type}_${board_ident}, if not exist, then;
2. /opt/tf-a/${board_type}
This change allows to test with TF-A with specified board ID only.
Signed-off-by: Raymond Mao <[email protected]>
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Firmware Handoff tests will leverage the same board type 'qemu_arm64'
with a new board ID 'fw_handoff_tfa_optee', thus select CMD_BLOBLIST
in qemu_arm64_defconfig for running the test.
Signed-off-by: Raymond Mao <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add test cases to validate FDT and TPM eventlog handoff from TF-A
and OP-TEE via bloblist.
For FDT, the nodes 'reserved-memory' and 'firmware' appended by
OP-TEE indicates a successful handoff.
For TPM eventlog, the events 'SECURE_RT_EL3', 'SECURE_RT_EL1_OPTEE'
and 'SECURE_RT_EL1_OPTEE_EXTRA1' created by TF-A indicates a
successful handoff.
Signed-off-by: Raymond Mao <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Fetch OP-TEE (4.7.0), TF-A (v2.13.0), MbedTLS (v3.6) and build
bl1 and fip with both Firmware Handoff and Measured Boot enabled.
Signed-off-by: Raymond Mao <[email protected]>
Acked-by: Jerome Forissier <[email protected]>
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mem_map_from_dram_banks calls fdtdec_setup_memory_banksize to setup the
dram banks though that is expected to be done by dram_init_banksize as
part of board_r sequence.
This has the side effect of modifying gd->bd->bi_dram as well, therefore
this patch removes the call and updates spl_enable_cache for K3 to call
dram_init_banksize.
Signed-off-by: Anshul Dalal <[email protected]>
Reported-by: Francesco Dolcini <[email protected]>
Closes: https://lore.kernel.org/u-boot/20251027165225.GA71553@francesco-nb/
Fixes: fe2647f2a0d4 ("arm: armv8: mmu: add mem_map_from_dram_banks")
Tested-by: Emanuele Ghidoli <[email protected]>
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Add boot support and peripherals like eMMC/SD, UART, I2C, GPIO, ENETC0/1
and PCIE0/1 for iMX95 15x15 LPDDR4X EVK.
Updated doc for build instructions.
Signed-off-by: Ye Li <[email protected]>
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Add -u-boot.dtsi for iMX95 15x15 EVK used by SPL and binman.
iMX95 15x15 EVK uses LPDDR4X which needs dedicated DDR FW.
Signed-off-by: Ye Li <[email protected]>
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Rename the env file to imx95_evk.env to share it with iMX95 15x15 EVK
Signed-off-by: Ye Li <[email protected]>
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The factory provides a CPU UID in the OTPs and the SoM module
and the carrier board might provide additional UIDs in the GP
registers of the OTPs. Load these values in the following order
and create a serial number string:
* Board UID (GP2)
* SoM UID (GP1)
* CPU UID (UNIQUE_ID)
The string is stored in the "serial#" env variable and
exported to Linux. Further this prints the used UID to the
console which looks like this
ID: 0042152331 (Board)
or:
ID: 0030124840 (SoM)
or:
ID: 4696668CD9516886 (CPU)
Signed-off-by: Frieder Schrempf <[email protected]>
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The factory provides a CPU UID in the OTPs and the SoM module
and the carrier board might provide additional UIDs in the GP
registers of the OTPs. Load these values in the following order
and create a serial number string:
* Board UID (GP2)
* SoM UID (GP1)
* CPU UID (UNIQUE_ID)
The string is stored in the "serial#" env variable and
exported to Linux. Further this prints the used UID to the
console which looks like this
ID: 0042152331 (Board)
or:
ID: 0030124840 (SoM)
or:
ID: 4696668CD9516886 (CPU)
Signed-off-by: Frieder Schrempf <[email protected]>
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The factory provides a CPU UID in the OTPs and the SoM module
and the carrier board might provide additional UIDs in the GP
registers of the OTPs.
Provide a common function to load UIDs from arbitrary OTP
registers and generate a serial number string that is saved
in the "serial#" env variable.
Signed-off-by: Frieder Schrempf <[email protected]>
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Recently code was added in board_late_init() to autostart fastboot
in case of booting from USB OTG. This change was ineffective as
enabling CONFIG_BOARD_LATE_INIT got lost during upstreaming.
Fixes: 410d9ccc0388 ("imx: kontron-sl-mx6ul: Autostart fastboot if booted from USB")
Signed-off-by: Frieder Schrempf <[email protected]>
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This allows to print user-friendly names for the boot device
probed by SPL to the console.
Signed-off-by: Frieder Schrempf <[email protected]>
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The image offset on SD/MMC devices is 33 KiB, except for eMMC boot if
fastboot is enabled. In this case it is 1 KiB. In order to make the
the bootloader universal, check the fastboot OTP boot fuse and adjust
the offset.
Signed-off-by: Frieder Schrempf <[email protected]>
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