| Age | Commit message (Collapse) | Author |
|---|
|
The UEFI specification concerning Uart() device path nodes has been
clarified:
Parity and stop bits can either both use keywords or both use
numbers but numbers and keywords should not be mixed.
Let's go for keywords as this is what EDK II does. For illegal
values fall back to numbers.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
For printing an unsigned value we should use %u and not %d.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
efi_uintnt_t is an unsigned type. We should avoid showing negative numbers.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
The printing of a file path node must properly handle:
* odd length of the device path node
* UTF-16 character only partially contained in device path node
* buffer overflow due to very long file path
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
Check that snprintf() returns the correct required buffer length and prints
the correct string for UTF-16 strings.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
snprintf() must return the required buffer length.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
The test for the RISCV_EFI_BOOT_PROTOCOL retrieves the boot hart id via the
protocol and compares it to the value of the boot hart id in the device
tree. The boot hart id is already retrieved from the device tree in the FDT
test.
Merge the two tests to avoid code duplication.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
Add a test for the RISCV_EFI_BOOT_PROTOCOL.
Signed-off-by: Sunil V L <[email protected]>
|
|
The size of the board file is limited to 520192 bytes. This conflicts with
the size requirement for the UEFI code.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Acked-by: Marcel Ziswiler <[email protected]>
|
|
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Christoph Niedermaier <[email protected]>
Cc: Stefano Babic <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
The Kontron pitx-imx8m is an NXP i.MX8MQ based board in the pITX form factor.
Signed-off-by: Heiko Thiery <[email protected]>
|
|
SION (Software Input On Field) - force the select mode input path
Signed-off-by: Angus Ainslie <[email protected]>
|
|
Update to the 5.16 imx8mq dts files and dt bindings
Changes since v1:
Dropped rfkill.h that is not in linux mainline yet.
Signed-off-by: Angus Ainslie <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Commit 97c16dc8bf098 ("imx: mx6ull: update the REFTOP_VBGADJ setting")
made this macro unused. Then remove it.
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
The previous code wrote the contents of the fuse as is in the
REFTOP_VBGADJ[2:0], but this was wrong if you consider the contents of
the table in the code comment. This table is also different from the
table in the commit description. But then, which of the two is correct?
If it is assumed that an unprogrammed fuse has a value of 0 then for
backward compatibility of the code REFTOP_VBGADJ[2:0] must be set to
6 (b'110). Therefore, the table in the code comment can be considered
correct as well as this patch.
Fixes: 97c16dc8bf098 ("imx: mx6ull: update the REFTOP_VBGADJ setting")
Signed-off-by: Dario Binacchi <[email protected]>
|
|
This option is selected implicitly when [SPL_]CLK_IMXRT10{20|50} is selected.
Signed-off-by: Heiko Thiery <[email protected]>
Reviewed-by: Giulio Benetti <[email protected]>
|
|
The clock composite is required when using the clock framework. So
select it automatically.
Signed-off-by: Heiko Thiery <[email protected]>
Reviewed-by: Giulio Benetti <[email protected]>
|
|
Add the PCIe support on i.MX8MM platforms.
Signed-off-by: Richard Zhu <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Tim Harvey <[email protected]>
Tested-by: Tim Harvey <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # Pick from Linux 854a4766ac12 ("arm64: dts: imx8mm: Add the pcie support")
|
|
Add the PCIe PHY support on iMX8MM platforms.
Signed-off-by: Richard Zhu <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Tim Harvey <[email protected]>
Tested-by: Tim Harvey <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # Pick from Linux b9ec888f636f ("arm64: dts: imx8mm: Add the pcie phy support")
|
|
Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.
Signed-off-by: Richard Zhu <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Tim Harvey <[email protected]>
Tested-by: Tim Harvey <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # Pick from Linux f6f787874aa5 ("dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy")
|
|
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing. Remove
the superfluous one.
Signed-off-by: Adam Ford <[email protected]>
|
|
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing. Remove
the superfluous one.
Signed-off-by: Adam Ford <[email protected]>
|
|
The Linux Kernel Image size for arm64 is still growing.
A Kernel with 54 MB at load address 0x80280000 overlaps
with fdt_addr at 0x83000000. So let's increase it to 0x84000000
Signed-off-by: Oliver Graute <[email protected]>
|
|
Increase CONFIG_SYS_BOOTM_LEN to 64MB
Signed-off-by: Oliver Graute <[email protected]>
|
|
The i.MX8M Nano can boot over USB using the boot ROM instead of
adding extra code to SPL to support USB drivers, etc. However,
when booting from USB, the environment doesnt' know where to load
and causes a hang. Fix this hang by supporting CONFIG_ENV_IS_NOWHERE=y.
It only falls back to this condition when booting from USB, so it
does not impact MMC booting.
Suggested-by: Michael Nazzareno Trimarchi <[email protected]>
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Add board dts for Advantech's imx8mp-rsb3720-a1
Signed-off-by: Darren Huang <[email protected]>
Signed-off-by: Kevin12.Chen <[email protected]>
Signed-off-by: Phill.Liu <[email protected]>
Signed-off-by: Tim Liang <[email protected]>
Signed-off-by: wei.zeng <[email protected]>
Signed-off-by: Ying-Chun Liu (PaulLiu) <[email protected]>
Cc: uboot-imx <[email protected]>
|
|
The i.MX8M Mini Application Processor Reference Manual, Rev. 3, 11/2020
documents AF MX8MM_IOMUXC_NAND_READY_B_SD3_RESET_B , add it into the
pinmux tables.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Fix address of the pad control register
(IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2. This seems
to be a typo but it leads to an exception when pinctrl is applied due to
wrong memory address access.
Signed-off-by: Oliver Stäbler <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Acked-by: Rob Herring <[email protected]>
Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
Fixes: 748f908cc882 ("arm64: add basic DTS for i.MX8MQ")
Signed-off-by: Shawn Guo <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # Picked from Linux 5cfad4f45806f ("arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0")
|
|
Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options for iMX8M SoCs
in case they should be operated faster, e.g. to improve boot time.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
Linux uses slightly different divider settings for the 1.2 GHz PLL
configuration, adjust the coefficients to match Linux.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
When regulator consumer attempts to set enabled DVS regulator voltage,
the driver aborts with "Only DVS bucks can be changed when enabled".
In case the regulator is already set to specified voltage, do nothing
instead of failing outright.
When regulator consumer attempts to set enables regulator which cannot
be controlled because it is already always enabled, the driver aborts
with -EINVAL. Again, do nothing in such case and return 0, because the
request is really fulfilled, the regulator is enabled.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Matti Vaittinen <[email protected]>
|
|
According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock
bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in
order to avoid AXI bus errors when GPU is enabled on the platform.
TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable
derivatives, but is missing a lock settings to be applied.
Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have
it implemented.
Since we're here, provide also names to bits from TRM instead of using
BIT() macro in the code.
Fixes: deca6cfbf5d7 ("imx8mn: set BYPASS ID SWAP to avoid AXI bus errors")
Fixes: a07c7181296f ("imx8mp: set BYPASS ID SWAP to avoid AXI bus errors")
Signed-off-by: Andrey Zhizhikin <[email protected]>
Cc: Peng Fan <[email protected]>
|
|
When the board was added, enabling tzc380 was left off by
mistake.
Signed-off-by: Adam Ford <[email protected]>
|
|
With the updated device tree's having USB support, enable in
U-Boot. This also requires the addition of the imx8m power
domain, since the USB is gated by the power domain controller.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Resync the SOM and baseboar files with the device trees that will
be included in 5.17-RC1 when it's cut. This will improve pinmuxing
for USDHC1 and add USB functionality.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Sync with the latest DDR initialization from Phytec, which
uses version 1.2 of NXP's i.MX7D DRAM Register Programming Aid
spreadsheet.
This updated DDR initialization fixes occasional system freeze.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
As suggested in commit 028abfd9b157 ("imx8mm-evk: Generate a single
bootable flash.bin again") for imx8mm_evk, it is possible to produce
single bootable image via binman. This restores the original behavior in
distros, where only one boot container is used to create target image.
Perform similar adaptions in order to provide single bootable image for
imx8mn-ddr4-evk derivate.
Update documentation to drop additional step of copying u-boot.itb
Fixes: 353dfe4b4359 ("imx8mn-ddr4-evk: switch to use binman")
Signed-off-by: Andrey Zhizhikin <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Commit 72d81360aabd ("global: Convert CONFIG_LOADADDR to
CONFIG_SYS_LOADADDR") dropped the usage of LOADADDR and replaced it with
SYS_LOADADDR.
Use the correct macro in environment by replacing CONFIG_LOADADDR with
CONFIG_SYS_LOADADDR.
Fixes: d75ebf3482c3 ("imx: ventana: fix splash logo drawing")
Signed-off-by: Andrey Zhizhikin <[email protected]>
Cc: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Acked-By: Tim Harvey <[email protected]>
|
|
Add fdt_addr_r fdtfile which used by distro boot, and cleanup legacy
environment variables.
Signed-off-by: Andrey Zhizhikin <[email protected]>
|
|
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.
Signed-off-by: Patrick Wildt <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Some of the nodes were named using a underscore, so rectify this and
consistenly use dashes.
Signed-off-by: Patrick Wildt <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Marcel Ziswiler <[email protected]>
|
|
Explicitly add SPL aka u-boot-spl.bin filename.
Signed-off-by: Patrick Wildt <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Alphabetically re-order properties.
Signed-off-by: Patrick Wildt <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.
Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Patrick Wildt <[email protected]>
|
|
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.
Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Patrick Wildt <[email protected]>
|
|
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.
Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Patrick Wildt <[email protected]>
|
|
When using a board variant that selects the lvds specific dtb the
*.u-boot.dtsi file will not be included. To have a lvds dtb specific
u-boot.dtsi file move this part to a common board u-boot.dtsi file and
include this in the board base u-boot.dtsi and create an additional one
for the lvds variant.
Signed-off-by: Heiko Thiery <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
|
|
CONFIG_SPL_MMC and CONFIG_SPL_SERIAL
Signed-off-by: Heiko Thiery <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
|
|
Without this patch the bcb struct could be located at an odd address
which resulted in data not being copied to the buffer.
Here was the repro steps (from Mattijs):
=> mmc dev 1
=> bcb load 1 misc
=> bcb dump command
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=> part start mmc 1 misc misc_start
=> mmc read ${loadaddr} ${misc_start} 4
=> bcb load 1 misc
=> bcb dump command
00000000: 62 6f 6f 74 6f 6e 63 65 2d 62 6f 6f 74 6c 6f 61
00000010: 64 65 72 00 00 00 00 00 00 00 00 00 00 00 00 00
This behavior was observed on an Amlogic A311D (ARM64) platform with a
recent GCC toolchain (11.2.0) but is most likely affecting other
platforms.
To avoid issues the structure is aligned on DMA minimum alignment value
as it is passed directly to the read function.
Signed-off-by: Gary Bisson <[email protected]>
Tested-by: Mattijs Korpershoek <[email protected]> # on khadas vim3
|
|
We changed to single flash.bin now. So dfu_alt_info should be modified
to reflect this change.
Signed-off-by: Ying-Chun Liu (PaulLiu) <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
