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Add dts binding header for rk3568, files origin from kernel.
Signed-off-by: Elaine Zhang <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Enable the SDMMC2 device tree node, as well as the pins it uses, in
U-Boot SPL.
Signed-off-by: Grzegorz Szymaszek <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.
Signed-off-by: Grzegorz Szymaszek <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
corresponding Linux kernel device tree, the supply is set to v3v3
(buck4), which is wrong.
Signed-off-by: Grzegorz Szymaszek <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
bus width from four to eight.
Signed-off-by: Grzegorz Szymaszek <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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The SDMMC2 interface hosts an eMMC. Replace the interface properties
that would only apply to SD cards—“broken-cd” and “disable-wp”—with
relevant ones: “non-removable”, “no-sd” and “no-sdio”.
Signed-off-by: Grzegorz Szymaszek <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-atmel into next
First set of u-boot-atmel features for the 2021.10 cycle:
This feature set converts the boards pm9261 and pm9263 Ethernet support
to DM; enables hash command for all SAM boards; fixes the NAND pmecc
bit-flips correction; adds Falcon boot for sama5d3_xplained board; and
other minor adjustments.
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into next
- K210 updates
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- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release,
mmc, usb, env, etc for Layerscape boards
- powerpc: Update Maintainers for some boards.
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- ae350 related dts fixes.
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Add Priyanka Jain as MAINTAINER for
T2080RDB_revD_defconfig,
T2080RDB_revD_NAND_defconfig,
T2080RDB_revD_SDCARD_defconfig and
T2080RDB_revD_SPIFLASH_defconfig
Signed-off-by: Priyanka Jain <[email protected]>
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Change the USB erratum number A-050106 to A-050204 as A-050106 is
a duplicate and never be published.
Fixes 0cfa00cdb94 (“armv8: Add workaround for USB erratum A-050106”)
Signed-off-by: Ran Wang <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
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Under DM, we rely on u-boot's device tree to provide the correct PHY
addresses. The board_fix_fdt callback is intended to be used for
device tree fixups before relocation. Unfortunately, this isn't an
option when booting from flash since the device tree isn't writable
before relocation.
This patch introduces the CONFIG_T2080RDB_REV_D option to signal that a
board revision D or up is the target. The config option is used to set
the correct Aquantia PHY address in the board's u-boot device tree.
Defconfig files with the option enable explicitly are added for
convenience.
Signed-off-by: Camelia Groza <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The T2080RDB boards revisions D and up have updated 10G Aquantia PHYs
connected to MAC1 and MAC2. The second Aquantia PHY is located at a
different address on the MDIO bus compared to rev C (0x8 instead of 0x1).
Fix-up the Linux device tree to update the PHY address for the second
Aquantia PHY on boards revisions D and up. Also rename the PHY node to
reflect the changes.
Signed-off-by: Camelia Groza <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
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Detect and print the board revision version based on the CPLD registers.
Signed-off-by: Camelia Groza <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Both DM_ETH and DM_PCI are enabled for the T2080RDB board. Remove the
board_eth_init() callback and the non-DM_ETH code paths since they are not
needed anymore.
Signed-off-by: Camelia Groza <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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A system clock of 66MHz was chosen for the pg-wcom-ls102xa.
Compared to the Evalboard, this corresponds to a reduction of 1/3.
The system counter clock should have been reduced accordingly,
but that was not the case, so we had a system time that was
1/3 behind the real time.
This patch corrects the system counter clock to
8.333MHz = 66.667MHz / 8.
Signed-off-by: Rainer Boschung <[email protected]>
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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This patch adds the front led initialization and the application
buffer enable to the eraly board inititlaization.
Signed-off-by: Rainer Boschung <[email protected]>
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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In order to improve power consumption ls102x allows to disable peripherals
that are not in use.
This patch follows SELI8 HW design description and disables peripherals
that are not in use in our designs, the same configuration is applicable
and for EXPU1.
This patch uses available hwconfig option for updating ls102x device
disable configuration.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The default behavior in the latest u-boot revisions is to rotate the
active net device to the next available if the requested link is not
established.
For our ls102x based devices this would mean that if active debug net
device is not available, u-boot will rotate and set the next net device
that is one of the estar adapters.
To return from this situation manual action to set correct ethact
adapter will be needed and this can be annoying when working in
debug mode.
Setting ethrotate=no will disable net adapter rotation and will make sure
that the primary adapter is always used.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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This is most probably a typo, and in older u-uboot versions is same as
'saveenv', in the newer uboot versions there is a separate 'save' command
that is different from 'saveenv'.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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In our designs we reserve PRAM area at the end of the RAM, and in order
this area to be visible and taken into account by the u-boot memory mgmt
CONFIG_PRAM has to be defined.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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From production view this is standard test executed during production on
all linux based foxmc cards.
On CENT2 HW defined memory region is zero means that some DDR accesses are
done by memory_post_dataline and memory_post_addrline but pattern tests
are skipped that's why mem_regions is fast there.
On ls102x for the complete DDR region of 1GiB memory_regions_post_test
takes approx. 4min and this is too much for production, so this patch
defines only 1MiB region as compromise.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The EXPU1 design is a new 40G capable ethernet service unit card for
Hitachi-Powergrids wired-com product lines.
The base SoC is same as for already added SELI8 card, consequently the
already added u-boot support for SELI8 is reused.
Signed-off-by: Rainer Boschung <[email protected]>
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
[Fixed new line error at EOF]
Signed-off-by: Priyanka Jain <[email protected]>
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Add "Priyanka Jain <[email protected]>" as
MAINTAINER for t102xrdb board.
Signed-off-by: Priyanka Jain <[email protected]>
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Add "Priyanka Jain <[email protected]>" as
MAINTAINER for p2041rdb board.
Signed-off-by: Priyanka Jain <[email protected]>
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Add "Priyanka Jain <[email protected]>" as
MAINTAINER for p1_p2_rdb_pc board.
Signed-off-by: Priyanka Jain <[email protected]>
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Add "Priyanka Jain <[email protected]>" as
MAINTAINER for t4rdb board.
Signed-off-by: Priyanka Jain <[email protected]>
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Address and size cells on SOC are set to 1. But gpio nodes are specified
with 2 cells. This fixes the gpio nodes to correct cells.
Signed-off-by: Lasse Klok Mikkelsen <[email protected]>
Reviewed-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Current tsec adapter sets adapter gigabit capabilities by default, and in
reality this must not always be the case.
It is possible that tsec adapter is used for 100Mbps connection, and in
this case setting 1000Mbps capabilities can lead to some side effects such
longer autoneg process.
In our ls102x designs this problem leads to long autoneg times (> 4 sec)
in case board rgmii link is 100Mbps capable only.
Limiting the rgmii link capabilities provides faster and smoother
link establishment.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Vladimir Oltean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Commit df86d32 breaks linux kernel and product application boot.
Linux kernel and our product application scripts are expecting 0x prefix
for hexadecimal values, while env_set_hex writes them without a prefix.
This patch partially revert env_set_hex usage for affected env variables.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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During the mainlining of the board this was by mistake set to sector size.
Our user space env scripts are expecting envsize of 0x4000, and setting
this differently will break our cross-platform compatibility.
Signed-off-by: Aleksandar Gerasimovski <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
is used instead.
Signed-off-by: Yangbo Lu <[email protected]>
Acked-by: Michael Walle <[email protected]> [for kontron-sl28]
Reviewed-by: Priyanka Jain <[email protected]>
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There is no i.MX board using such option. Drop it.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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For eSDHC, power supply is through peripheral circuit.
Some eSDHC versions have value 0 of the bit but that
does not reflect the truth. 3.3V is common for SD/MMC,
and is supported for all boards with eSDHC in current
u-boot. So, make 3.3V is supported in default in code.
CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled if
future board does not support 3.3V.
This is also a fix-up for one previous patch, which converted
to use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
that is not a Kconfig option.
Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()")
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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These boards, according to the schematic and per the board I own, use an
M24256-BWDW6TP I2C EEPROM which requires two address bytes.
This fixes the 'mac' command which is used to program, among other
things, the MAC addresses for the ethernet interfaces on the board.
Signed-off-by: Matt Merhar <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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IFC NOR flash base address of ls2088a is 0x580000000,
and offset of env crc is 0x500000, so fix the macro
CONFIG_ENV_ADDR to fix synchronous exception(access illegal address)
Fixes: 59071804c1 ("configs: ls2080a: Correct ENV_ADDR value")
Signed-off-by: Biwen Li <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Signed-off-by: Kuldeep Singh <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Add properties related to eMMC HS400 mode for esdhc1.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Stop to initialize the PCIe controller if it's disabled by RCW.
Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver")
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Read Linux PPFE firmware from flash partition and pass it to Linux through
FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs.
(FDT may increase at max by 64KB)
Signed-off-by: Chaitanya Sakinam <[email protected]>
Signed-off-by: Anji J <[email protected]>
Signed-off-by: Biwen Li <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Enable eMMC HS400 workarounds for LX2160A/LX2162A.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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For cpu release command, check whether PSCI is supported firstly,
if supported, use PSCI to kick off secondary cores, otherwise still
use spin table.
Signed-off-by: Jiafei Pan <[email protected]>
[Fixed checkpatch alignment CHECKs]
Signed-off-by: Priyanka Jain <[email protected]>
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Add check for return value of adjust_vdd()
Signed-off-by: Biwen Li <[email protected]>
Signed-off-by: Priyanka Singh <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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This adds the unit test for the K210 PLL to the sandbox defconfigs.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Now that the k210 clock driver does not depend on CCF, we should no longer
imply it (and probably should not have in the first place). We can also
reduce the pre-relocation malloc arena back to something sensible.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Linux has had some stability issues when using AISRAM with a different
frequency from SRAM. Mirror their change here now that we relocate into
AISRAM.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Now that we have only one clock driver, we don't need to have our own
subdirectory. Move the driver back with the rest of the clock drivers.
The MAINTAINERS for kendryte pinctrl is also fixed since it has always been
wrong.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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This driver no longer serves a purpose now that we have moved away from
CCF. Drop it.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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This speeds up boot by preventing multiple reconfigurations of the PLLs.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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