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2026-03-23include: env: ti: move board specific scripts out of ti_commonAnshul Dalal
bootcmd_ti_mmc had cpsw0_qsgmii_phyinit related scripts even though this was only relevant for the j721e/j7200 SoCs. This patch instead factors out those scripts into a generic 'board_init' which is called as part of bootcmd_ti_mmc. This allows boards to more easily add custom behaviour to the ti_mmc bootflow instead of having to modify the ti_common.env file. Signed-off-by: Anshul Dalal <[email protected]>
2026-03-23Merge tag 'fsl-qoriq-for-2026.04-rc5' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29615 - Fix SPI flash clock for ls102xa
2026-03-23board/BuR/zynq: don't select non-existent SPL_BINMAN_FDTHeinrich Schuchardt
Symbol CONFIG_SPL_BINMAN_FDT does not exist. Don't select it. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Wolfgang Wallner <[email protected]> Tested-by: Wolfgang Wallner <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2026-03-23serial: Enable SYS_NS16550 on incorrectly migrated platformsTom Rini
With the migration to DM_SERIAL in commit 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL") a number of platforms were incorrectly migrated and did not enable SYS_NS16550 despite previously having enabled the non-DM NS16650 serial driver. Enable these now. Fixes: 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL") Reported-by: Michael Walle <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2026-03-23microblaze: Rework TARGET_MICROBLAZE_GENERIC implementationTom Rini
As exposed by "make randconfig", some symbols such as XILINX_MICROBLAZE0_PVR can be set without TARGET_MICROBLAZE_GENERIC but have a transitive dependency on it. The easiest path of resolution here is that since there is only one valid microblaze "board", rework that symbol to be non-optional. Signed-off-by: Tom Rini <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2026-03-23timer: Correct Kconfig entry for XILINX_TIMERTom Rini
As exposed by "make randconfig", we have an issue with the dependencies for XILINX_TIMER. This symbol is a case where we have one that covers both main U-Boot and SPL. In this case, we need to select SPL_REGMAP not when SPL is enabled but rather when SPL_TIMER is enabled (and in turn, SPL_DM). Signed-off-by: Tom Rini <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2026-03-23arm64: versal2: Fix UFS boot command sequencePadmarao Begari
The BOOTENV_DEV_UFS macro is incomplete - it only initializes UFS and scans SCSI devices but does not actually boot anything. This causes the boot sequence to stop after scsi scan without loading a kernel. Update BOOTENV_DEV_UFS to set the devnum environment variable to the UFS instance number, initialize the device using $devnum, and delegate the boot process to the shared scsi_boot script. Remove the explicit scsi scan, as it is already handled by scsi_boot. This matches the pattern used by other boot device macros and ensures that UFS devices can successfully boot using the distro boot framework. Signed-off-by: Padmarao Begari <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/5447ce1d5c4a21b0b62ce76ad642296110364041.1772801284.git.michal.simek@amd.com
2026-03-23net: zynq_gem: Add support for dma-coherent flagMichal Simek
When dma-coherent DT property is passed there is no need to do any cache operations. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/10c7a40364162cc8d3c82cb3e64e043f49a5153e.1772437409.git.michal.simek@amd.com
2026-03-23net: zynq_gem: clear TXSR transfer completePadmarao Begari
The Zynq GEM TX status register retains the transfer‑complete bit until it is explicitly cleared. The current flow waits for transfer‑complete but never clears it, so on the next send the wait loop returns immediately because transfer‑complete is already high. This causes the driver to report TX completion before the new DMA transfer has actually finished, which breaks back‑to‑back transmissions. This issue causes timeouts during LWIP TFTP transfers when cache coherency is enabled. Fix this by explicitly clearing transfer‑complete (write‑to‑clear) after the wait completes, so each transmit starts with a clean TXSR. Co-developed-by: Harini Katakam <[email protected]> Signed-off-by: Harini Katakam <[email protected]> Co-developed-by: Michal Simek <[email protected]> Signed-off-by: Padmarao Begari <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/f354680d43fba0f590a6fae693848e5bf7114ba5.1772437409.git.michal.simek@amd.com
2026-03-23net: zynq_gem: Disable broadcast packetsMichal Simek
There is no reason to react on broadcast packets that's why just ignore them not to waste cycles on packets which are not for the platform. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/6e10793b7d72668343756edb66221f1415570250.1772437409.git.michal.simek@amd.com
2026-03-23spi: cadence_qspi: pulse controller reset at probePadmarao Begari
The driver previously only deasserted the optional bulk reset, leaving the controller in whatever state earlier stages left it and risking failed probes or bad transfers. Assert the reset first, wait 10 µs, and then deassert so the OSPI block starts from a known state. Signed-off-by: Padmarao Begari <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2026-03-23arm64: versal2: Enable GIC600 supportPadmarao Begari
Add and enable the GIC600 support configuration by default for Versal Gen 2. Signed-off-by: Padmarao Begari <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/e3135eee33282281572fbc960aa45b5d0f355158.1772098079.git.michal.simek@amd.com
2026-03-23spi: cadence_qspi: Disable the DAC mode in indirect readVenkatesh Yadav Abbarapu
Hang has been observed on QEMU, as it starts with indac read and fills sram, but after dma is triggered, it tries dac read instead (based on priority) which gets blocked. Disable the DAC mode in indirect DMA read and enable back for writes as DAC mode is used. Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Tested-by: Padmarao Begari <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2026-03-23xilinx: Enable GPIO delay driver on Versal platformsMichal Simek
GPIO delay driver is necessary to use to extend delay times for USB hubs. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/6744d3a93f48658178a53d218a4a6ca2fbb050dd.1771325431.git.michal.simek@amd.com
2026-03-23i2c: muxes: pca954x: Add support for pca9848Michal Simek
Add support for PCA9848 chip. Reviewed-by: Heiko Schocher <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/72cadba2a21e9d5723d54994b898d8a6880042e0.1771229639.git.michal.simek@amd.com
2026-03-23armv7: ls102xa: fix SPI flash clockMichael Walle
Commit bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value") broke the SPI boot on the LS1021ATSN board (ls1021atsn_qspi_defconfig) at least. The commit message reads Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5 which means ClusterPLL/16 The original submitted patch had the following description: Value 0xC is reserved. Replace it with correct value 0x5 which is ClusterPLL/16 Unfortunatly, the little information which was there, was stripped even further. Why is 0x5 the "correct" value? In fact, it seems that the upper bit is just ignored and thus the value 0xC translates to 0x4 which is ClusterPLL/20. This, will result in a SPI clock of 60MHz (if the PLL is clocked at 1.2GHz). But even that is too much for the (default) 03h read opcode (max 50MHz). Set the value to ClusterPLL/24 which is 50MHz. Link: https://lore.kernel.org/r/[email protected]/ Fixes: bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value") Signed-off-by: Michael Walle <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23configs: ls1021atsn: enable serial driverMichael Walle
Switching to DM_SERIAL disabled any serial driver. Re-enable it again. Fixes: 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL") Signed-off-by: Michael Walle <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23arm: dts: ls1021a-tsn: add default serial outputMichael Walle
Since switching to DM_SERIAL 'stdout-path' seems to be necessary. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23dm: regulator: fix missing quote in error messageDavid Lechner
Fix a missing closing quote in the error message when a regulator name is not unique. Signed-off-by: David Lechner <[email protected]> Reviewed-by: Julien Stephan <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23mmc: Add support for eMMC 5.1B specificationHan Xu
Add support for eMMC specification version 5.1B by defining MMC_VERSION_5_1B and including it in the version array. eMMC 5.1B (JESD84-B51B) is a minor revision of the 5.1 specification that primarily addresses MDT (Manufacturing Date) adjustment for dates beyond 2025. This aligns with the Linux kernel commit 9996707822f82 ("mmc: core: Adjust MDT beyond 2025"). Since the manufacturing date field is not currently used in U-Boot, this change has no functional impact beyond proper device recognition. It allows the driver to correctly identify and initialize eMMC devices that report version 5.1B in their Extended CSD register. Signed-off-by: Han Xu <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23scmi: pinctrl: add pinctrl driver for SCMIDan Carpenter
This driver adds the base support of pinctrl over SCMI. The driver does two main things. First, it allows you to configure the initial pin states. Secondly, it's used a base to build a GPIO driver on top of it. To configure the states then add a pinmux config to the scmi_pinctrl section: scmi_pinctrl: protocol@19 { reg = <0x19>; pinmux1: pinmux_test { pinmux = <0 1 0xFFFFFFFF 18 1 0 2 0xFFFFFFFF 18 1 0 3 0xFFFFFFFF 18 1>; function = "f_gpio1"; groups = "grp_1", "grp_3"; }; }; Under linux the pinctrl subsystem will parse the function and group properties and use that to handle muxing. However, under u-boot the pin muxing is done using the "pinmux" property, which feeds raw SCMI pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server. The numbers are: selector, identifier, function_id, config_type, and config_value. In the example above, it sets pins 1, 2, and 3 to 1. The linux-kernel ignores this pinmux property. Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Peng Fan <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23scmi: update comments for scmi_pinctrl_config_set_in()Dan Carpenter
Delete some extra space characters to make checkpatch.pl happy: WARNING: please, no space before tabs Signed-off-by: Dan Carpenter <[email protected]> Acked-by: Peng Fan <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23scmi: pinctrl: add pinctrl message IDsDan Carpenter
Add all the pinctrl message IDs. I renamed SCMI_MSG_PINCTRL_CONFIG_SET to SCMI_PINCTRL_SETTINGS_CONFIGURE so the naming matches the spec better. Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23scmi: Rework SCMI_FIRMWARE implementationTom Rini
As exposed by "make randconfig", how we have SCMI_FIRMWARE today is incomplete, and in one case, used incorrectly. First, SCMI_FIRMWARE has a build-time dependency on OF_CONTROL being enabled, so add that. Second, RESET_SCMI depends on SCMI_FIRMWARE being enabled, it should not select that symbol. In turn, a number of platforms need to now enable SCMI_FIRMWARE explicitly and not rely on RESET_SCMI to enable it for them. Signed-off-by: Tom Rini <[email protected]> Acked-by: Peng Fan <[email protected]> Acked-by: Anshul Dalal <[email protected]> Acked-by: Michal Simek <[email protected]> # Versal Gen 2 Reviewed-by: Patrice Chotard <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-22tests: FIT: Add "clone" image attack image testTom Rini
Related to the problem resolved with commit 2092322b31cc ("boot: Add fit_config_get_hash_list() to build signed node list"), add a testcase for the problem as well. Reported-by: Apple Security Engineering and Architecture (SEAR) Signed-off-by: Tom Rini <[email protected]>
2026-03-22power: pmic: enable sysreset function with device tree propertySvyatoslav Ryhel
Add a condition to enable the PMIC sysreset function via the system-power-controller device tree property in addition to the existing Kconfig dependency, provided the PMIC supports it. Signed-off-by: Svyatoslav Ryhel <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> # RK8xx
2026-03-22board: lg: star: make panel fix optionalSvyatoslav Ryhel
Currently, U-Boot fails with an FDT patching error if the LG Optimus 2X device tree lacks a panel node. Since the panel is optional hardware, patching should be optional as well. Fix this by allowing bootflow to continue if the panel node is missing. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22ARM: tegra: rename sdhci nodes to mmcSvyatoslav Ryhel
Align with existing Linux Tegra device trees to simplify using U-Boot device trees as a base for future Linux adaptations. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22ARM: tegra: remove unsupported properties from the max8907 nodeSvyatoslav Ryhel
Remove interrupt and GPIO controller properties from MAX8907 node since the PMIC does not have any GPIO cells and does not expose any interrupt features. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22ARM: tegra: mot: change backlight LED sourceSvyatoslav Ryhel
Mot based devices use LM3532 LED controller with 3 sources. Panel backlight uses LED 0 while keypad uses LED 1 and 2. Adjust device tree accordingly. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22ARM: tegra: surface-2: fix panel supplySvyatoslav Ryhel
Rename vdd-supply to power-supply according to the latest schema. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22ARM: tegra: lg-x3: fix panel propertySvyatoslav Ryhel
Rename renesas,inversion to renesas,column-inversion according to latest schema. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22video: ltl106hl02: adjust power supply nameSvyatoslav Ryhel
Rename vdd-supply to power-supply according to the latest schema. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22video: r61307: adjust property nameSvyatoslav Ryhel
Rename renesas,inversion to renesas,column-inversion according to latest schema. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22input: cpcap_pwrbutton: simplify parent verificationSvyatoslav Ryhel
Check for 'cpcap' within the compatible string, as various CPCAP compositions always include this component. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22input: cpcap_pwrbutton: set default keycode fallbackSvyatoslav Ryhel
Set a default fallback value if no keycode is defined Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22power: cpcap: make regulator node names case independentSvyatoslav Ryhel
The Linux kernel CPCAP driver uses uppercase regulator node names, while this driver uses lowercase. Since regulator names can be case-insensitive, update the driver to support both uppercase and lowercase node names. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22power: pmic: cpcap: add Mapphone and Mot compatiblesSvyatoslav Ryhel
Add Mapphone and Mot compatibles supported by Linux kernel. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22power: regulator: cpcap: remove bit_offset_from_cpcap_lowest_voltageSvyatoslav Ryhel
The bit_offset_from_cpcap_lowest_voltage value was inherited from the downstream kernel as a quirk. With the correct voltage table, it is no longer needed. An additional benefit is that SW1, SW2, and SW4 now share the same voltage table. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22pwm: tegra: properly calculate pulse and frequency divider fieldsIon Agorria
The pulse width field requires better precision during calculation. Add a proper frequency divider calculation based on the PWM clock instead of hardcoding it to 1. Signed-off-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22pwm: tegra: fix pulse_width calculationJonas Schwöbel
The pulse_width is expressed as N/256. A 100% duty cycle is only possible when multiplied by 256 instead of 255. Signed-off-by: Jonas Schwöbel <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22pwm: tegra: add set_invert PWM operationJonas Schwöbel
Add active-low support to the PWM controller, useful for active-low pwm-leds. Signed-off-by: Jonas Schwöbel <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-22pwm: tegra: add probe functionJonas Schwöbel
When PWM config was updated the clock was restarted which caused loss of previous configuration of other channels. Further this fixes a bug/hang that can happen when set_enable was called before set_config. Signed-off-by: Jonas Schwöbel <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-20ARM: tegra: ap: add debug prints for unknown SKUIon Agorria
Add debug log prints with a message that SKU is unknown. Signed-off-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-20ARM: tegra: ap: add default fallback for Tegra20 SKUIon Agorria
Until now all Tegra chips except Tegra20 had a fallback if SKU is not known. This caused issues previously when certain SKU wasn't known. Add a fallback for Tegra20 aligning it with other Tegra SoC generations. Signed-off-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-20ARM: tegra: ap: add support T20 A04 SKU idIon Agorria
Add definition for Tegra20 SKU 0x4 / A04 found in Sony Tablet P. Signed-off-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-20doc: board: tegra: improve documentationSvyatoslav Ryhel
Remove redundant chapters, clarify and reword confusing sections. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2026-03-18Merge patch series "bootm: Clean up arch-specific, pre-OS clean-up"Tom Rini
Simon Glass <[email protected]> says: Each arch does something slightly different before booting the OS. Some archs even do different things depending on the CPU type. It is quite hard to know what actually happens in the final milliseconds before the OS boot. This series attempts to start cleaning up U-Boot in this area. The basic intent is to create a new bootm_final() function which can be called by all archs. It provides some flags for a couple of necessary variations but otherwise it is generic. All architectures are converted over to use this new function. board_quiesce_devices() is moved into bootm_final() so that all archs benefit from it. This series fixes a bug in device_remove() is fixed where removing a parent with specialised flags (e.g. DM_REMOVE_ACTIVE_ALL) could leave children activated, since they do not match the flags. This fixes is needed to avoid bootm_final() causing test failures on sandbox. Future work could take this a little further: - Convert EFI loader to use the same function - Improve comments for cleanup_before_linux() across architectures - Support fake-run tracing on all archs Link: https://lore.kernel.org/r/[email protected]
2026-03-18sandbox: Call bootm_final()Simon Glass
Add a call to bootm_final() before the simulated kernel jump. This adds the "Starting kernel" message, bootstage tracking, board_quiesce_devices() and dm_remove_devices_active() which were not previously called on sandbox. Signed-off-by: Simon Glass <[email protected]>
2026-03-18xtensa: Call bootm_final()Simon Glass
Add a call to bootm_final() before jumping to the kernel. This adds the "Starting kernel" message, bootstage tracking, board_quiesce_devices() and dm_remove_devices_active() which were not previously called on Xtensa. Signed-off-by: Simon Glass <[email protected]>