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The STM32MP13xx has only 128 kiB of SYSRAM starting at address 0x2ffe0000 .
The STM32MP15xx has 256 kiB of SYSRAM starting at address 0x2ffc0000 . Make
sure both SoCs configure ARMV7_SECURE_BASE correctly . Define the SYSRAM
base in stm32.h to be consistent with the STM32MP15xx macro.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Drop a space after tab, no functional change.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Due activation of SCMI, we need to increase SYS_MALLOC_F_LEN value
to avoid following message:
U-Boot 2025.04-01224-g75b77a2a6d31-dirty (Apr 25 2025 - 11:23:30 +0200)
alloc space exhausted ptr 400040 limit 400000
alloc space exhausted ptr 400020 limit 400000
alloc space exhausted ptr 400060 limit 400000
alloc space exhausted ptr 400060 limit 400000
Set SYS_MALLOC_F_LEN to 0x60000 to fix this issue.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Due SCMI update to protocol v2.0, we need to increase
SYS_MALLOC_F_LEN value to avoid following message:
alloc space exhausted ptr 200040 limit 200000
Set SYS_MALLOC_F_LEN to 0x210000 to fix this issue.
Signed-off-by: Patrice Chotard <[email protected]>
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SCMI clocks are now available, switch from fixed to SCMI clocks.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Implement STM32MP25 reset drivers using stm32-core-reset API.
This reset stm32-reset-core API and will be able to use DT binding
index started from 0.
This patch also moves legacy reset into stm32 directory reset.
Signed-off-by: Gabriel Fernandez <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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In RCC the ops of the CCF registered CLK device can be called directly,
this patch avoid recursive call of clk_ function done by CCF clock
framework which update the clock information, for example
clk_enable is called 2 times, clkp->enable_count is increased 2 times.
Signed-off-by: Gabriel Fernandez <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add private uclass data for "stm32-usbphyc-clk" as it is not done
by the driver model.
This clk struct is needed by CCF to save the unique id used to identify
each clock.
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Each clock identifier needs to be unique when CCF is activated,
and it is not respected today by SCMI clock driver.
This patch supports a unique clk id by using the uclass API
clk_get_id() / dev_clk_dm() and by activating by default
CONFIG_CLK_AUTO_ID with CCF which adds an offset to the SCMI
clock identifiers.
After this patch, the SCMI clock driver can coexist with other
clock provider without conflict, they can share internal identifier
[0..N] defined in their binding and the clock ID = 0
(reserved for dummy clock) is no more used.
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Update CLK ID to avoid 0 id, used for dummy clock with CCF
and to allow selection by clk_get_by_id, used to
get private data associated to the UCLASS_CLK device
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Update the existing test dm_test_clk_ccf() with new CLK_ID macro.
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Update the sandbox driver to allow support of the
CONFIG_CLK_AUTO_ID by using the new API clk_get_id()
to get the internal SANDBOX identifier.
With CONFIG_CLK_AUTO_ID, clk->id have the also seq identifier.
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add a new config CONFIG_CLK_AUTO_ID to support a unique clk id
for all the clock providers, managed by clk uclass, when the clock
reference arg[0] is the same.
When the CONFIG is activated, the clock id is limited to the lower
CLK_ID_SZ = 24 bits in default clock xlate function
and the sequence number + 1 of the clk provider device is
added for the 8 higher bits.
We use sequence number + 1 to avoid the "dummy" clock id = 0,
used for invalid clock when CCF is activated.
When this config is activated, the new function clk_get_id()
should be used to get back the internal reference to clock
for the each clock provider.
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Check clock security to avoid access at boot time.
Signed-off-by: Gabriel Fernandez <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add clock driver support for STM32MP25 SoCs.
Signed-off-by: Gabriel Fernandez <[email protected]>
Signed-off-by: Valentin Caron <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Since clock protocol 2.0, SCMI specification add an option field
"clock_enable_delay" to CLOCK_ATTRIBUTES command.
scmi_read_resp_from_smt() will return an error ("Buffer too small") as
the message length coming from the SCMI server is not the same as expected.
So implement a condition to SCMI clock protocol version to change the
length of the expected message.
Signed-off-by: Valentin Caron <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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One more board to support, this time Retronix Sparrow Hawk based on
Renesas R-Car V4H SoC . This is board support, so master branch should
be fine. The DT in dts/upstream/ is a backport from Linux, and will
disappear on next DT sync.
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https://source.denx.de/u-boot/custodians/u-boot-tpm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/26601
Updates from Simon cleaning up some tests, with the intention of being used
in sandbox and actual hardware.
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Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0
(R8A779G3) SoC. This is a single-board computer with single gigabit ethernet,
DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports,
micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD,
debug UART and JTAG.
DT is imported from Linux next commit:
a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support")
Signed-off-by: Marek Vasut <[email protected]>
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Introduce weak renesas_dram_init_banksize() function which is meant
to be used to adjust DRAM bank sizes after the common Renesas board
DRAM bank handling code finished. This is mainly meant for boards
which ship with multiple DRAM size options, which can be detected
at runtime. This allows such boards to ship with single U-Boot
binary on all boards.
Signed-off-by: Marek Vasut <[email protected]>
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These tests have been failing for some months. Disable them so that a CI
run can pass on coral. Further work will be needed to see how to make
them pass.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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These don't seem to be needed.
Add a few notes about what to do next. Also mention parallel tests in
at the top of thefile.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Some of the Python tests are a pain because they don't reset the TPM
state before each test. Driver model tests do this, so convert the
tests to C.
This means that these tests won't run on real hardware, but we have
tests which do TPM init, so there is still enough coverage.
Rename and update the Python tpm_init test to use 'tpm autostart',
since this fully initializes the TPM and performs the self tests.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Add support for the self-test continue command in the TPM v1.2 emulator,
to match the functionality in the TPM v2 emulator.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Prepare v2025.07-rc4
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Signed-off-by: Tom Rini <[email protected]>
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Setuptools 78.1.1 shows warnings:
* Pattern 'GPL' did not match any files.
* Pattern 'BSD-2-Clause' did not match any files.
* SetuptoolsDeprecationWarning: License classifiers are deprecated.
Cf. https://packaging.python.org/en/latest/guides/writing-pyproject-toml/#license
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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This reverts commit 159b6f0e119962ce5da645f548cefe9196c8778e.
Since commit 159b6f0e1199 ("caam: Fix CAAM error on startup") the following
regression was reported by Tim Harvey:
"I've found that this patch causes a regression on an imx8mm board
(imx8mm_venice_defconfig) where the first call to caam_rng_read fails
here in jr_dequeue but if you call it again it works. With some
debugging added:
SEC0: RNG instantiated
...
Hit any key to stop autoboot: 0
u-boot=> rng list
RNG #0 - caam-rng
u-boot=> rng 0 10
caam_rng_read caam-rng len=16
run_descriptor_jr_idx idx=0
Error in SEC deq: -1
caam_rng_read_one run_descriptor_jr failed: -1
caam_rng_read caam-rng caam_rng_read_one failed: -5
Reading RNG failed
u-boot=> rng 0 10
caam_rng_read caam-rng len=16
run_descriptor_jr_idx idx=0
00000000: ad 2e ad c0 2a 12 27 c4 65 82 66 19 be ef f6 07 ....*.'.e.f.....
If I revert your patch caam_rng_read works initially and on subsequent
calls."
" I ran into this when I was testing
lwIP HTTPS as it causes anything that uses dm_rng to fail the first
time (such as HTTPS)."
Revert it for now to avoid the regression.
Reported-by: Tim Harvey <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Peng Fan <[email protected]>
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Resync all defconfig files using qconfig.py
Signed-off-by: Tom Rini <[email protected]>
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CONFIG_POSITION_INDEPENDENT to be enabled together"
Yang Xiwen <[email protected]> says:
This patchset also enables CONFIG_POSITION_INDEPENDENT for qemu boards
to avoid similar issues to happen again in the future.
Link: https://lore.kernel.org/r/[email protected]
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Add 'imply CONFIG_POSITION_INDEPENTDENT' for QEMU arm arch. This allows
qemu arm boards to load u-boot.bin at any address. It is skipped by
default when u-boot is loaded by either --bios or --kernel.
To load u-boot.bin at a different address, one can use u-boot
chain-loading or qemu loader device[1].
[1] https://www.qemu.org/docs/master/system/generic-loader.html
Signed-off-by: Yang Xiwen <[email protected]>
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when CONFIG_BLOBLIST is enabled, the section is switched to .data but is
not switched back to .text. It makes all the code below placed in .data
section, also breaks CONFIG_POSITION_INDEPENDENT.
Fix it by adding `.section .text` to switch the section back to .text.
Fixes: 5103e69344d6 ("arm: armv7: save boot arguments")
Signed-off-by: Yang Xiwen <[email protected]>
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into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/26569
- SoC: add SPL support for licheepi4a
- RISC-V: raise SPL_SYS_MALLOC_SIZE to 8 MiB
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Assign myself to develop U-Boot port of T-Head TH1520 SoC, and help
maintain related code and review patches.
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Proper U-Boot for Lichee Pi 4A now runs in S mode instead of M mode,
which means the extra firmware, OpenSBI, must be built and integrated
in the image, and the vendor U-Boot cannot chainload the result image
anymore as it runs in M mode.
Remove redundant information about chainloading and update build steps
to mention OpenSBI firmware.
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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RISC-V software usually expects S mode when leaving the firmware, e.g.
UEFI applications could only run in S mode. Let's convert proper U-Boot
of Lichee Pi 4A port to run in S mode.
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Add an OpenSBI entry to the FIT image. As it expects an FDT to be
passed, corresponding FDT entry is generated with of-list as well.
As SPL now passes a full FDT for following stages, proper U-Boot image
is packed into u-boot-with-spl.bin without a devicetree copy included.
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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These operations rely on a customized M-mode CSR, MHCR, which isn't
available when running in S mode.
Let's fallback to the generic weak stub when running in S mode to avoid
illegal accesses.
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Symbols in spl.c only function correctly in SPL stage. Build the file
for SPL only to avoid weak symbols in proper U-Boot being unexpectedly
reloaded.
Fixes: 5fe9ced3552 ("riscv: cpu: Add TH1520 CPU support")
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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On several RISC-V boards we have seen that 1 MiB is a insufficient value
for CONFIG_SPL_SYS_MALLOC_SIZE.
For instance qemu-riscv32_spl_defconfig fails booting because u-boot.itb
exceeds 1 MiB.
8 MiB is a reasonable value that allows adding FPGA blobs or splash images
to main U-boot.
Reported-by: Simon Glass <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/26117
- Allow to silent TPL/SPL debug console;
- enable exFAT support for Theobroma boards;
- Fix SD power initialization in SPL for rk3399-nanopi4
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https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request doc-2025-07-rc4
Documentation:
* fix typo in gcc.rst
* correct EFI_TCG2_PROTOCOL_MEASURE_DTB description
* Add missing reference to firmware for BB-AI64
* Tidy up the bootefi-command docs
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Fix a typo error in gcc.rst, changing "out-out-tree" to
"out-of-tree" in the Out-of-tree section.
Signed-off-by: BehradElmi <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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There are backslashes in some of the tags which seems to be unnecessary.
Remove then.
Change the word 'either' to 'any' since there are three options.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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The details of the sysfw.itb from the R5 build that
also needs to be copied as part of the target images
is missing, but is included in the image formats a
little further down, so add it to the instructions.
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
Acked-by: Nishanth Menon <[email protected]>
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%s/data that change/data that changes/
%s/cannot be used has/cannot be used for/
%s/Otherwise/Otherwise,/
%s/allows better measurement/allows for better measurement/
Acked-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Tom Rini <[email protected]> says:
Taking inspiration from Heiko's patch[1] this series goes and cleans up
all of the arch/arm/dts/*.h files that can be easily removed. The big
challenge I ran in to here was that for some platforms that aren't using
OF_UPSTREAM were didn't have a sufficiently deep search path to find
files there rather than arch/arm/dts. This also showed that only ARM had
local header files to deal with.
[1]: https://lore.kernel.org/u-boot/[email protected]/
Link: https://lore.kernel.org/r/[email protected]
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We have this file in both arch/arm/dts and
dts/upstream/src/arm64/freescale. This file is identical save for
changes which have been made upstream. Remove our local copy to get in
sync with upstream now.
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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We have these files in both arch/arm/dts and
dts/upstream/src/arm/microchip. These files are identical save for
changes which have been made upstream. Remove our local copy to get in
sync with upstream now.
Reviewed-by: Peter Robinson <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a header that is under the arch/arm/dts directory
and differ in being a strict subset of what is found upstream. We can
remove this now to prevent future conflicts.
Reviewed-by: Peter Robinson <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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