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Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.
Signed-off-by: Marek Vasut <[email protected]>
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Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .
Signed-off-by: Marek Vasut <[email protected]>
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The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.
Signed-off-by: Marek Vasut <[email protected]>
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Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case,
each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively.
Signed-off-by: Marek Vasut <[email protected]>
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The DBSC5 DRAM controller driver needs access to OTP fuses to discern
Renesas R-Car V4H-3, V4H-5 and V4H-7 SoC variants based on OTP fuse
programming. Make OTP block DT node available in U-Boot SPL DT so the
DBSC5 driver can determine its base address and read out the OTP fuses.
Signed-off-by: Marek Vasut <[email protected]>
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The R-Car V4H SPL implementation was originally running on the Cortex-R52
core, but this is no longer the case. Majority of the SPL now runs on the
Cortex-A76 core. Drop the stale description.
Fixes: ec53fdee5bec ("arm64: renesas: Add Renesas R-Car V4H SPL implementation")
Signed-off-by: Marek Vasut <[email protected]>
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Remove stale Makefile description, this used to be valid for the
original Makefile from which the common Makefile was made generic,
but is no longer applicable to the common Makefile.
Fixes: c7d2d7f90a91 ("ARM: renesas: Simplify board Makefiles")
Signed-off-by: Marek Vasut <[email protected]>
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Enable fallback PSCI provider on Renesas R-Car R8A779G0 V4H White Hawk board.
This fallback PSCI provider provides basic PSCI interface which can be used
by the Linux kernel, but does not provide support for bringing up additional
CPU cores or any other functionality, except for SoC level reset.
This fallback PSCI provider is intended as a fallback in case a proper PSCI
provider is not started before the Linux kernel is started. Linux kernel on
ARMv8a will fail to boot in case a PSCI provider is not available, and this
basic fallback PSCI provider assures such a boot failure cannot occur, even
if that means the system will boot in degraded mode with only one CPU core
available, that is still sufficient to perform recovery.
In the common case, a proper PSCI provider should be started as part of
the Linux kernel fitImage, as the BL31 loadable, and replace this basic
fallback PSCI provider before the Linux kernel is started.
Signed-off-by: Marek Vasut <[email protected]>
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Implement custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling in case the TFA was loaded. The loadables handler sets up custom
handoff structure used by Renesas TFA fork in fixed location in DRAM and
indicates the TFA has been loaded.
The custom armv8_switch_to_el2_prep() handling tests whether the TFA BL31
was previously loaded and the custom handoff structure was set up, and if
so, jumps to TFA BL31 which switches from EL3 to EL2 and then returns to
U-Boot just past bl in armv8_switch_to_el2() to finish starting the Linux
kernel.
The jump to Linux through TFA works in such a way that the custom
armv8_switch_to_el2_prep() handler configures the custom handoff structure
such that the target jump address of the TFA BL31 on exit is set to the
armv8_switch_to_el2() + 4, which is just past the bl, and just before the
U-Boot code which implements the Linux kernel boot from either EL. The
registers passed through the TFA BL31 are all the registers passed into
armv8_switch_to_el2_prep() to assure maximum compatibility with all the
boot modes. The armv8_switch_to_el2_prep() handler jumps to the TFA BL31,
which does its setup, drops EL from EL3 to EL2 and finally jumps to the
armv8_switch_to_el2() + 4 entry point, which then allows U-Boot to boot
the Linux kernel the usual way.
In order to build suitable kernel fitImage, build TFA first, upstream
is currently under review:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35799
Or if necessary, downstream repository:
remote: https://github.com/renesas-rcar/arm-trusted-firmware.git
branch: rcar_gen4_v2.7_v4x
```
$ git clean -fqdx
$ MBEDTLS_DIR=/path/to/mbedtls/ make -j$(nproc) bl31 \
PLAT=rcar_gen4 ARCH=aarch64 LSI=V4H SPD=none \
CTX_INCLUDE_AARCH32_REGS=0 MBEDTLS_COMMON_MK=1 \
PTP_NONSECURE_ACCESS=1 LOG_LEVEL=20 DEBUG=0 \
ENABLE_ASSERTIONS=0 E=0
```
Build Linux kernel Image and device tree from current mainline Linux
kernel repository, obtain 'Image' and 'r8a779g0-white-hawk.dtb' .
Bundle the files together using provided fit-image.its fitImage description:
```
$ mkimage -f fit-image.its fitImage
```
To start the kernel fiImage generated in previous step, load fitImage
to DRAM and use the 'bootm' command to start it:
=> load 0x58000000 ... fitImage && bootm 0x58000000
Signed-off-by: Marek Vasut <[email protected]>
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If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.
Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.
Fixes: c2e8c4d09a7a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
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Sync up on test renames
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This fails on samus_tpl as there is no 'net' command.
=> net list
Unknown command 'net' - try 'help' !
Fix it by adding a condition for the test.
Add a blank line to keep pylint happy.
Signed-off-by: Simon Glass <[email protected]>
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It is sometimes tricky to figure out what modules test.py is loading
when it starts up. The result can be a silent failure with no clue as to
what when wrong.
Add a section which lists the modules loaded as well as those not
found.
Signed-off-by: Simon Glass <[email protected]>
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Now that we have a shorter name, we don't need this sort of thing. Just
use ubman instead.
Signed-off-by: Simon Glass <[email protected]>
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Now that we have a shorter name, we don't need this sort of thing.
Drop it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]> # test_android
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We know this is U-Boot so the prefix serves no purpose other than to
make things longer and harder to read. Drop it and rename the files.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]> # test_android / test_dfu
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This fixture name is quite long and results in lots of verbose code.
We know this is U-Boot so the 'u_boot_' part is not necessary.
But it is also a bit of a misnomer, since it provides access to all the
information available to tests. It is not just the console.
It would be too confusing to use con as it would be confused with
config and it is probably too short.
So shorten it to 'ubman'.
Signed-off-by: Simon Glass <[email protected]>
Link: https://lore.kernel.org/u-boot/CAFLszTgPa4aT_J9h9pqeTtLCVn4x2JvLWRcWRD8NaN3uoSAtyA@mail.gmail.com/
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Enable configs for nand boot.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Enable the Kconfig and Makefile for the Cadence-Nand
SPL support in agilex5 family device.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Add support for spl nand to load binary image from NAND
to RAM. Leverage the existing nand_spl_load_image from nand_spl_loaders.c
Signed-off-by: Dinesh Maniyam <[email protected]>
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Leverage linux code to support hardware ECC interface
to verify nand bad block.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Enable the Kconfig and Makefile for the
Cadence NAND driver for the agilex5 family device.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Support NAND_CMD_SET_FEATURES & NAND_CMD_GET_FEATURES.
These commands is one of the basic commands of NAND. The parameters get
from these commands will be used to set timing mode
of NAND data interface.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Support nand reset command for Cadence Nand Driver.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Add support for reading param page of NAND device.
These paramaters are unique and used for identification purpose.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Add support for readid command in Cadence NAND driver.
The id is unique and used for flash identification.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Enable driver for Cadence NAND for the family
device agilex5. This driver is leveraged from the path
/drivers/mtd/nand/raw/cadence-nand-controller.c from the
stable version 6.11.2.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Enable cdns-nand dts setting for the socfpga_agilex5
family device.
Signed-off-by: Dinesh Maniyam <[email protected]>
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The Cadence NAND is a configurable mtd raw block which
supports multiple options for chipsets, clocking and reset structure, and
feature list.
Signed-off-by: Dinesh Maniyam <[email protected]>
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Siddharth Vadapalli <[email protected]> says:
This series adds config fragment for enabling USB MSC boot and USB
Storage devices which are applicable to AM62, AM62A and AM62P SoCs.
Series has been tested on AM62A7-SK, AM625-SK and AM62P5-SK for USB MSC
boot where the bootloaders were generated in the following manner:
1. AM62A7-SK (AM62A SoC):
- tiboot3.bin
=> am62ax_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62ax_evm_a53_defconfig + am62x_a53_usbmsc.config
2. AM625-SK (AM62 SoC):
- tiboot3.bin
=> am62x_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62x_evm_a53_defconfig + am62x_a53_usbmsc.config
3. AM62P5-SK (AM62P SoC):
- tiboot3.bin
=> am62px_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62px_evm_a53_defconfig + am62x_a53_usbmsc.config
The images were flashed to a USB Flash Drive and were connected to the
Type-C interface on each of the boards which supports USB MSC Boot.
Logs corresponding to this series:
1. AM62A7-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/3518cba3edc57bf52d06a7df932928ca
2. AM625-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/098568be7b482436d27fdc8adae15ce4
3. AM62P5-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/50e29073033668e7d904a785bfbc9c0b
The following device-tree changes were made across all of the boards:
https://gist.github.com/Siddharth-Vadapalli-at-TI/2afb913838c1d4005bc059910c09ab4b
Link: https://lore.kernel.org/r/[email protected]
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Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
Signed-off-by: Siddharth Vadapalli <[email protected]>
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Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
Signed-off-by: Siddharth Vadapalli <[email protected]>
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The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.
That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.
Signed-off-by: Dragan Simic <[email protected]>
Acked-by: Soeren Moch <[email protected]> # tbs2910
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Correct the timer node of dts
Signed-off-by: Jim Liu <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-tpm into next
Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this
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Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.
Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defines const variables that it later writes. So hide it behind a Kconfig
option until we sort it out.
It's worth noting that EFI runtime services are not covered by this
patch on purpose. Since the OS can call SetVirtualAddressMap which can
relocate runtime services, we need to set them to RX initially but remap
them as RWX right before ExitBootServices.
Link: https://lore.kernel.org/u-boot/[email protected]/
Link: https://lore.kernel.org/u-boot/[email protected]/
Reviewed-by: Jerome Forissier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions
Tested-by: Neil Armstrong <[email protected]> # on AML-S905X-CC
Signed-off-by: Ilias Apalodimas <[email protected]>
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The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.
Signed-off-by: Ilias Apalodimas <[email protected]>
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Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.
It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.
The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).
The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.
Due to the above ignore EFI for now and fix it later once we have the
rest in place.
Acked-by: Jerome Forissier <[email protected]>
Tested-by: Neil Armstrong <[email protected]> # on AML-S905X-CC
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.
Signed-off-by: Ilias Apalodimas <[email protected]>
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Upcoming patches are mapping memory with RO, RW^X etc permsissions.
Fix the meminfo command to display them properly
Acked-by: Jerome Forissier <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25142
- Support Toradex i.MX6 Apalis/Colibri v1.2 SoM.
- Guard tee.bin inclusion on imx9,
- Remove unneeded regulator entry on DH i.MX6 DHCOM DRC02 devicetree.
- Add i.MX mailbox driver
- Convert ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig.
- Cope with existing optee node on imx8m.
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The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.
Signed-off-by: Marek Vasut <[email protected]>
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Add a new config option under "General setup" to enable the -Werror flag
when building U-Boot. This is useful during development to help catch
mistakes.
This is based on a similar config option added to the Linux kernel by
Linus in 2021 - see Linux commit 3fe617ccafd6 ("Enable '-Werror' by
default for all kernel builds"). The modification of KBUILD_CFLAGS is
done in Makefile.extrawarn, matching where it was moved in the kernel by
Linux commit e88ca24319e4 ("kbuild: consolidate warning flags in
scripts/Makefile.extrawarn").
Signed-off-by: Paul Barker <[email protected]>
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- Check return value of fdt_getprop for NULL.
- Return -EFAULT if 'algo' property is missing.
- Prevent NULL pointer dereference in strcmp."
Triggers found by static analyzer Svace.
Signed-off-by: Anton Moryakov <[email protected]>
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