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The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76
and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU,
Mali-G610 MP4, HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2,
LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0,
PCIe 3.0, SATA 3, Ethernet, SDIO3.0 I2C, UART, SPI, GPIO and PWM.
Add arch core support for it.
Signed-off-by: Jagan Teki <[email protected]>
Signed-off-by: Kever Yang <[email protected]>
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Add IOC unit header include for rk3588.
Signed-off-by: Steven Liu <[email protected]>
Signed-off-by: Joseph Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add RK3588 pll set and get rate clock support.
Signed-off-by: Elaine Zhang <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add GRF header for Rockchip RK3588.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add clock and reset unit header include for rk3588.
Signed-off-by: Elaine Zhang <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Newer DRAM initialization blobs from vendor can encode sdram info in a
new version 3 format. The new format makes use of more bits in sys_reg3
compared to the version 2 format.
Add basic support for detecting the version 3 format and decoding the
high bits used for ddrtype.
This fixes decode of sdram size on my RK3568 boards that have LPDDR4X.
Details on the new format was deciphered from vendor u-boot commit [1].
[1] https://github.com/rockchip-linux/u-boot/commit/c69667e0e2bf4290ab1f408fcde58b8806ac266b
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add support for encryption, decryption and signinig with
non-zero key saving backward compatibility.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
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This implementation allows pwr i2c writing on early SPL
stages when DM is not yet setup.
Such writing is needed to configure main voltages of PMIC
on early SPL for bootloader to boot properly.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF T30
Tested-by: Robert Eckelmann <[email protected]> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <[email protected]> # LG P895 T30
Tested-by: Thierry Reding <[email protected]> # T30 and T124
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
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Late init function allows passing values like identifiers and
perform device specific configurations of pre-boot stage.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <[email protected]> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
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Get periph clock id and its parent from device tree.
This works by looking up the peripheral's 'clocks' node and
reading out the second and fourth cells, which are the
peripheral and PLL clock numbers.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF T30
Tested-by: Robert Eckelmann <[email protected]> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <[email protected]> # HTC One X
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
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This function allows to convert a device tree clock ID to PLL ID.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF T30
Tested-by: Robert Eckelmann <[email protected]> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <[email protected]> # HTC One X
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
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This mappings were missing for some reason.
Tested-by: Svyatoslav Ryhel <[email protected]> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom <[email protected]>
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This converts 6 usages of this option to the non-SPL form, since there is
no SPL_IMX_MODULE_FUSE defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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Enum clock_osc_freq was designed to use only with T20.
This patch remaps it to use additional frequencies, added in
T30+ SoC while maintaining backwards compatibility with T20.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF600T T30
Tested-by: Jonas Schwöbel <[email protected]> # Surface RT T30
Tested-by: Robert Eckelmann <[email protected]> # ASUS TF101 T20
Tested-by: Agneli <[email protected]> # Toshiba AC100 T20
Tested-by: Thierry Reding <[email protected]> # T30, T124, T210
Tested-by: Svyatoslav Ryhel <[email protected]> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
For 2023.04
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- several conversion to DM_SERIAL and DM_I2C
- fixes for Toradex boards
- PSCI
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14965
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When routing UART4 using the ECSPI2 pads, register
IOMUXC_UART4_RXD_SELECT_INPUT (offset 0x050C) should be changed only
when dealing with RX, as its name suggests.
Signed-off-by: Arnaud Ferraris <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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SCFW has fixed a overflow issue in sc_rm_is_pad_owned API. This
requires u-boot to update API implementation, since it will cause
compatible issue. Otherwise all pad checking will have problem and
cause pad setting not continue.
Due to the compatible issue, the new u-boot only works with new
SCFW (API version: 1.21 and later).
old scfw + old u-boot: API overflow issue
old scfw + new u-boot, or new scfw + old u-boot: API compatible issue
new scfw + new u-boot: Working
Signed-off-by: Ye Li <[email protected]>
Reviewed-by : Jason Liu <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-amlogic
- jethub j100: add rescue boot from microSD
- move meson sm command to cmd/meson and add efusedump sub-command
- switch dwc2 otg to DM for G12A, GXL & AXG
- Add new boards:
- Odroid Go Ultra
- Odroid-N2L
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In case U-Boot is the PSCI provider, it is necessary to correctly
program CSU and TZASC registers. Those are poorly documented, so
push in the correct values.
Signed-off-by: Marek Vasut <[email protected]>
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The common code used to bring up secondary cores requires a final
jump location to be stored in some sort of memory location, define
this memory location to be the start of OCRAM, since it is available.
Signed-off-by: Marek Vasut <[email protected]>
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In case U-Boot is a PSCI provider, enable GICv3 support as this
is necessary to bring up secondary cores.
Signed-off-by: Marek Vasut <[email protected]>
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The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.
Signed-off-by: Marek Vasut <[email protected]>
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Add macro representing the PSCI v1.1 .
Signed-off-by: Marek Vasut <[email protected]>
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Commit 56c2dbdabab5 ("imx: bootaux: cleanup code") introduces the
following LTO related warning:
"
arch/arm/mach-imx/imx_bootaux.c:24:31: warning: type of ‘hostmap’ does not match original declaration [-Wlto-type-mismatch]
24 | const __weak struct rproc_att hostmap[] = { };
| ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: array types have different bounds
1590 | const struct rproc_att hostmap[] = {
| ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: ‘hostmap’ was previously declared here
../aarch64-linux-gnu/bin/ld: warning: u-boot has a LOAD segment with RWX permissions
"
This is because the weak empty array of structures "hostmap" is eventually
replaced by non-empty array of structures with different number of elements.
Fix this by avoiding weak variable size array, instead use a weak function
which returns single pointer to the array.
Fixes: 56c2dbdabab5 ("imx: bootaux: cleanup code")
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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The NPCM driver can use on npcm7xx/npcm8xx
so add npcm8xx header for driver.
Signed-off-by: Jim Liu <[email protected]>
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At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks. Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.
Add arch core support for it.
Signed-off-by: Jagan Teki <[email protected]>
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04
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Add GRF header for Rockchip RV1126.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add clock and reset unit header include for rv1126.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add DDR driver for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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add reset type detect and persist setting.
Signed-off-by: Jim Liu <[email protected]>
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This function can be used by other modules. Also add comments.
Signed-off-by: Alexey Romanov <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Select this symbol as needed.
Signed-off-by: Tom Rini <[email protected]>
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A number of CONFIG symbols have crept in that are never referenced in
code, so drop them here. Further, we have two symbols being enabled
in headers while already enabled correctly in Kconfig, so these lines
can also be removed.
Signed-off-by: Tom Rini <[email protected]>
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Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED
Signed-off-by: Tom Rini <[email protected]>
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Perform a simple rename of CONFIG_KSNET_NETCP_BASE to CFG_KSNET_NETCP_BASE
Signed-off-by: Tom Rini <[email protected]>
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Perform a simple rename of CONFIG_KSNET_MAC_ID_BASE to CFG_KSNET_MAC_ID_BASE
Signed-off-by: Tom Rini <[email protected]>
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Perform a simple rename of CONFIG_KSNET_CPSW_NUM_PORTS to CFG_KSNET_CPSW_NUM_PORTS
Signed-off-by: Tom Rini <[email protected]>
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Perform a simple rename of CONFIG_IRAM_BASE to CFG_IRAM_BASE
Signed-off-by: Tom Rini <[email protected]>
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Perform a simple rename of CONFIG_I2C_MVTWSI_BASE1 to CFG_I2C_MVTWSI_BASE1
Signed-off-by: Tom Rini <[email protected]>
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Perform a simple rename of CONFIG_I2C_MVTWSI_BASE0 to CFG_I2C_MVTWSI_BASE0
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_STANDALONE_LOAD_ADDR
Signed-off-by: Tom Rini <[email protected]>
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When the ti814x_evm config was removed most, but not all, of the
relevant support code was remove. Get rid of what was missed.
Fixes: 50b532686849 ("ti814x: Remove platform")
Signed-off-by: Tom Rini <[email protected]>
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This removes the following unreferenced CONFIG symbols:
CONFIG_FDTADDR
CONFIG_FDTFILE
CONFIG_FLASH_SECTOR_SIZE
CONFIG_FSL_CPLD
CONFIG_HDMI_ENCODER_I2C_ADDR
CONFIG_I2C_MVTWSI
CONFIG_I2C_RTC_ADDR
CONFIG_IRAM_END
CONFIG_IRAM_SIZE
CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
CONFIG_L1_INIT_RAM
CONFIG_MACB_SEARCH_PHY
CONFIG_MIU_2BIT_21_7_INTERLEAVED
CONFIG_MTD_NAND_VERIFY_WRITE
CONFIG_MVGBE_PORTS
CONFIG_NETDEV
CONFIG_NUM_DSP_CPUS
CONFIG_PHY_BASE_ADR
CONFIG_PHY_INTERFACE_MODE
CONFIG_PSRAM_SCFG
CONFIG_RAMBOOT_SPIFLASH
CONFIG_RAMBOOT_TEXT_BASE
CONFIG_RD_LVL
CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
CONFIG_SETUP_INITRD_TAG
CONFIG_SH_QSPI_BASE
CONFIG_SMDK5420
CONFIG_SOCRATES
CONFIG_SPI_ADDR
CONFIG_SPI_FLASH_QUAD
CONFIG_SPI_FLASH_SIZE
CONFIG_SPI_HALF_DUPLEX
CONFIG_SPI_N25Q256A_RESET
CONFIG_TEGRA_SLINK_CTRLS
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_UBOOT_SECTOR_COUNT
CONFIG_UBOOT_SECTOR_START
CONFIG_VAR_SIZE_SPL
CONFIG_VERY_BIG_RAM
And also:
BL1_SIZE
PHY_NO
RESERVE_BLOCK_SIZE
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_FLASH_SPANSION_S29WS_N
CONFIG_FLASH_VERIFY
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
CONFIG_FSL_ISBC_KEY_EXT
CONFIG_FSL_TRUST_ARCH_v1
CONFIG_FSL_SDHC_V2_3
CONFIG_MAX_DSP_CPUS
CONFIG_MIU_2BIT_INTERLEAVED
CONFIG_SERIAL_BOOT
CONFIG_SPI_BOOTING
CONFIG_X86EMU_RAW_IO
Signed-off-by: Tom Rini <[email protected]>
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Prepare v2023.01-rc4
Signed-off-by: Tom Rini <[email protected]>
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Add information that will be needed for enabling the UEFI capsule
update feature on the RockPi4 boards. With the feature enabled, it
would be possible to update the idbloader and u-boot.itb images on the
RockPi4B and RockPi4C variants.
Signed-off-by: Sughosh Ganu <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code. Doing this removes some board support code
which was also unused. Finally, this removes some CONFIG symbols that
otherwise needed to be migrated to Kconfig, but were unused in code now.
Signed-off-by: Tom Rini <[email protected]>
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