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The CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is for SPL only, add
condition to limit it not affect TPL.
Signed-off-by: Kever Yang <[email protected]>
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boot0.h and gpio.h will be used by system and include by
'asm/arch/', each of them need of a copy from 'asm/arch-rockchip'.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add the PL310 macros for latency control setup, read and write bits.
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Dinh Nguyen <[email protected]>
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Improvements and new features:
- improved SPI driver for better read throughput
- refactors initialisation of debug UART init
- restructures header file paths
- adds pinctrl improvements
Adds Kever as a co-custodian.
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Porting to DM and i.MX8
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- warp7 to DM
- kp_imx53 to DM
- Warnings in DT
- MX8QM support
- colibri-imx6ull to DM
- imx7d-pico to DM
- ocotp for MX8
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Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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rockchip platform header file is in 'arch-rockchip'
instead of arch-$(SOC) for all SoCs.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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TIMER7_BASE is no used by source code now, remove it.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Remove duplicate function declarations from the SCFW API header file.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Igor Opaniuk <[email protected]>
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Add i.MX8QM entry
Signed-off-by: Peng Fan <[email protected]>
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Add cpu type and Kconfig entry
Signed-off-by: Peng Fan <[email protected]>
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This function will be used by i.MX8 fuse driver.
Signed-off-by: Peng Fan <[email protected]>
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- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
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Add support for the Amlogic G12A SoC, which is a mix between the
new physical memory mapping of AXG and the functionnalities of
the previous Amlogic GXL/GXM SoCs.
To handle the internal ethernet PHY, the Amlogic G12A SoCs now
embeds a dedicated PLL to feed the internal PHY.
Signed-off-by: Jerome Brunet <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
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Add basic support for the Amlogic G12A clock controller based on
the AXG driver.
Signed-off-by: Jerome Brunet <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
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Allow PSCI layer to handle any SiP service functions added by
platform vendors. PSCI layer will look for SiP service function
in the SiP function table located in '._secure_svc_tbl_entries'
section if the SMC function identifier is not found in the PSCI
standard functions table. Use DECLARE_SECURE_SVC macro to declare
and add platform specific SiP service function.
This new section '._secure_svc_tbl_entries' is located next to
'._secure.text' section. Refer to arch/arm/cpu/armv8/u-boot.lds.
Signed-off-by: Chee Hong Ang <[email protected]>
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This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.
Signed-off-by: Philippe Reynes <[email protected]>
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Move to DM
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- DM support in sata
- Toradex Board to DM
- wandboard to DM
- tbs2910 to DM
- GE boards to DM
- VHybrid boards to DM
- DM_VIDEO for i.MX
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Add support for Vybrid's UART2 (Colibri UART_B).
Signed-off-by: Stefan Agner <[email protected]>
Acked-by: Marcel Ziswiler <[email protected]>
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The DDR memory controller include file for the Vybrid uses
iomux_v3_cfg_t without actually including iomux-vf610.h.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Igor Opaniuk <[email protected]>
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Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and ipu nodes to enable driver binding to ipu device.
Signed-off-by: Anatolij Gustschin <[email protected]>
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This code allows reusing the default u-boot as in the late board init, the
default envs are restored and proper recovery scripts executed.
Signed-off-by: Lukasz Majewski <[email protected]>
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Provide function to enable I2C clocks for vf610 - in the generic code.
This function overrides the default weak function implementation (which
only returns 1).
Signed-off-by: Lukasz Majewski <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
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- mt76xx: add USB support, small fixes
- ath79: small fixes, add support for QCA9563 SoC and AP152 reference board
- mscc: small fixes, add network support for JR2 and ServalT SoCs
- bmips: small fixes, enable more drivers for ARM specific BCM6858 and BCM63158 SoCs
- MIPS: fix redundant relocation of initrd images
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As no gpio.h is defined for this architecture, to avoid
a compilation failure, do not include <asm/arch/gpio.h>
for arch bcm63158.
Signed-off-by: Philippe Reynes <[email protected]>
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As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcm6858.
Signed-off-by: Philippe Reynes <[email protected]>
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Add configuration for the MT41K128M16JT125K memory modules as used on the
Bosch Guardian device.
Based on a patch by:
Govindaraji Sivanantham <[email protected]>
Signed-off-by: Sjoerd Simons <[email protected]>
[checkpatch.pl cleanup by Martyn Welch]
Signed-off-by: Martyn Welch <[email protected]>
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On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can
actually load the SPL also from sector 256 (128KB) of an SD card or eMMC
chip. For more details, see [1].
In this case the boot source indicator (written at offset 0x28 of SRAM A1)
has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC.
Add those new values to the existing boot source check to allow booting
the SPL from those "high" disk offsets as well. For this to work, the
value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted,
for instance to 0x140 (right after the high SPL). Doing this dynamically
sounds desirable, but looks nasty to implement.
[1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: Shengzhou Liu <[email protected]>
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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sec_firmware reserves JR3 for it's own usage and deletes the JR3 node
from the device tree. This causes this warning to be issued when doing
the device tree fixup:
WARNING could not find node fsl,sec-v4.0-job-ring: FDT_ERR_NOTFOUND.
Fix it by excluding the device tree fixup for the JR reserved by
sec_firmware.
Signed-off-by: Laurentiu Tudor <[email protected]>
Reviewed-by: Horia Geanta <[email protected]>
Reviewed-by: Bharat Bhushan <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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The SEC QI ICID setup in the QIIC_LS register is actually an offset
that is being added to the ICID coming from the qman portal. Setting
it with a non-zero value breaks SMMU setup as the resulting ICID is
not known. On top of that, the SEC QI ICID must match the qman portal
ICIDs in order to share the isolation context.
Signed-off-by: Laurentiu Tudor <[email protected]>
Reviewed-by: Horia Geanta <[email protected]>
Reviewed-by: Bharat Bhushan <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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Moves FSL_TZASC_400 and FSL_TZPC_BP147 configs to Kconfig
for LS1088A and LS2088A platforms.
Signed-off-by: Rajesh Bhagat <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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LX2160AQDS is a development board that supports LX2160A
family SoCs. This patch add base support for this board.
Signed-off-by: Wasim Khan <[email protected]>
Signed-off-by: Sriram Dash <[email protected]>
Signed-off-by: Pankaj Bansal <[email protected]>
Signed-off-by: Udit Agarwal <[email protected]>
[PK: Sqaush patch for "secure boot defconfig" & add maintainer]
Signed-off-by: Prabhakar Kushwaha <[email protected]>
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As per hardware documentation,
CONFIG_SYS_FSL_PEBUF_BASE for lx2160a is 0x1c00000000
Signed-off-by: Priyanka Jain <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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Since there is the SPL_USB_HOST_SUPPORT for enabling USB support in SPL,
makes more sense to rename the SPL_USB_SUPPORT as SPL_USB_STORAGE.
Everything that is not part of the usb storage support in SPL is now
build under SPL_USB_HOST_SUPPORT.
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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This commit provides extra defines needed for DDR memory controller
calibration (read leveling performing).
Signed-off-by: Lukasz Majewski <[email protected]>
Reviewed-by: Stefan Agner <[email protected]>
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Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C
ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports
for both power and external display. It includes a Chrome OS EC
(Cortex-M3) to provide access to the keyboard and battery functions.
Support so far includes only:
- UART
- SDRAM
- MMC, SD card
- Cros EC (but not keyboard)
Not included:
- Keyboard
- Display
- Sound
- USB
- TPM
Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support
for this is not provided in this series.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Allow rockchip boards to use GPIOs before driver model is ready. This is
really only useful for setting GPIOs to enable the early debug console, if
needed on some platforms.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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At present this enum is only available to rk3288. Move it so that other
rockchip SoCs can access it. It is needed for the SPL GPIO driver for
rk3999 in a later patch.
Also adjust the enum name to lower case.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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This adds video output support for Amlogic GXBB/GXL/GXM chips.
The supported ports are CVBS and HDMI (based on DW_HDMI).
When using HDMI, only DMT modes are supported.
There is support for simple-framebuffer (CONFIG_VIDEO_DT_SIMPLEFB)
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Jorge Ramire-Ortiz <[email protected]>
Signed-off-by: Maxime Jourdan <[email protected]>
[narmstrong: fixed defines alignment in meson_canvas.c]
Reviewed-by: Anatolij Gustschin <[email protected]>
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For 2019.04
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Apply errata based on PL310 version instead of compile
time. Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.
Signed-off-by: Nitin Garg <[email protected]>
Signed-off-by: Ye Li <[email protected]>
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According to "Table 5-1. Boot Device Select" (page 335,
i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 4, 09/2017)
the BOOT_CFG1[3] have following values (regarding EIM booting):
0 - NOR flash and 1 - ONENAND
This commit provides correct identification of the boot medium for IMX6Q
boards booting from NOR memory (MCCMON6 is one of them).
Signed-off-by: Lukasz Majewski <[email protected]>
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We have converted mmc to driver model on Poplar. So let's clean up
board level mmc initialization code.
Signed-off-by: Shawn Guo <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
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Similar changes was done for Zynq in past and this patch just follow
this pattern to separate cpu code from SoC code.
Move arch/arm/cpu/armv8/zynqmp/* -> arch/arm/mach-zynqmp/*
And also fix references to these files.
Based on
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc)
Signed-off-by: Michal Simek <[email protected]>
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Add TFA boot flow for more boards
Add TFA boot defconfig for ls1088a and ls2088a.
Add dts fixup for PCIe endpoint and root complex.
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Add common reset driver for all Allwinner SoC's.
Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.
Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.
Signed-off-by: Jagan Teki <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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