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Add driver model support to this driver, while retaining support for the
legacy system. Driver model GPIO support is enabled with CONFIG_DM_GPIO
as usual.
Since gpio_is_valid() no longer exists, we can use the -EINVAL error
returned from gpio_request().
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Fix the following checkpatch issues:
CHECK: No space is necessary after a cast
\#39: FILE: arch/arm/include/asm/arch-am33xx/mux.h:39:
+#define PAD_CTRL_BASE 0x800
+#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \
CHECK: Avoid CamelCase: <CONTROL_PADCONF_JTAG_nTRST>
\#284: FILE: arch/arm/include/asm/arch-omap3/mux.h:284:
+#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C
ERROR: space required after that ',' (ctx:VxV)
\#446: FILE: arch/arm/include/asm/arch-omap3/mux.h:446:
+#define MUX_VAL(OFFSET,VALUE)\
^
Cc: Raphael Assenat <[email protected]>
Cc: Ilya Yanok <[email protected]>
Cc: Vaibhav Hiremath <[email protected]>
Cc: Peter Barada <[email protected]>
Cc: Grazvydas Ignotas <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Nagendra T S <[email protected]>
Cc: Nishanth Menon <[email protected]>
Cc: Tom Rini <[email protected]>
Signed-off-by: Igor Grinberg <[email protected]>
Acked-by: Stefan Roese <[email protected]>
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This patch adds the DDR3 ECC support to enable ECC in the DDR3
EMIF controller for Keystone II devices.
By default, ECC will only be enabled if RMW is supported in the
DDR EMIF controller. The entire DDR memory will be scrubbed to
zero using an EDMA channel after ECC is enabled and before
u-boot is re-located to DDR memory.
An ecc_test environment variable is added for ECC testing.
If ecc_test is set to 0, a detection of 2-bit error will reset
the device, if ecc_test is set to 1, 2-bit error detection
will not reset the device, user can still boot the kernel to
check the ECC error handling in kernel.
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Add functions to set/get SES PMAX values of Pivilege ID pair.
Also add msmc module definitions.
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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The EDMA3 controller’s primary purpose is to service data transfers
that you program between two memory-mapped slave endpoints on the device.
Typical usage includes, but is not limited to the following:
- Servicing software-driven paging transfers (e.g., transfers from external
memory, such as SDRAM to internal device memory, such as DSP L2 SRAM)
- Servicing event-driven peripherals, such as a serial port
- Performing sorting or sub-frame extraction of various data structures
- Offloading data transfers from the main device DSP(s)
- See the device-specific data manual for specific peripherals that are
accessible via the EDMA3 controller
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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For K2E and K2L SoCs clock output from PASS PLL has to be enabled
after NETCP domain and PA module are enabled. So create new function
for that and call it after PA module is enabled.
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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The Keystone2 Edison SoC uses the same keystone net driver.
This patch adds opportunity to use it by K2E SoCs.
Acked-by: Vitaly Andrianov <[email protected]>
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Keystone2 Edison SoC uses the same keystone SerDes driver.
This patch adds support for K2E SoCs.
Acked-by: Vitaly Andrianov <[email protected]>
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Keystone2 Edison SoC uses the same keystone navigator, but
uses different NETCP PktDMA definitions. This patch adds
required definitions.
Acked-by: Vitaly Andrianov <[email protected]>
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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As MDIO bus has been added we can register PHYs with it.
After registration, the PHY driver will be probed according to the
hardware on board.
Startup PHY at the ethernet open.
Use phy_startup() instead of keystone_get_link_status() when eth open,
as it verifies PHY link inside and SGMII link is checked before.
For K2HK evm PHY configuration at init was absent, so don't enable
phy config at init for k2hk evm.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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SerDes driver is used by other sub systems like PCI, sRIO etc.
So modify it to be more general. The SerDes driver provides common
API's that can also be extended for other peripherals SerDes
configurations.
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Enhance the driver to use cmu/comlane/lane specific configurations
instead of 1 big array of configuration.
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This patch split the Keystone II SGMII SerDes related code from
Ethernet driver and create a separate SGMII SerDes driver.
The SerDes driver can be used by others keystone subsystems
like PCI, sRIO, so move it to driver/soc/keystone directory.
Add soc specific drivers directory like in the Linux kernel.
It is going to be used by keysotone soc specific drivers.
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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With MAC_PHY sgmii configuration, u-boot checks PHY link status before
sending each packet. Increasing MDIO frequency increases overall tftp
speed. We set it to maximum 2.5MHz.
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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The header file for the driver should be in correct place.
So move it to "arch/arm/include/asm/ti-common/keystone_net.h"
and correct driver's external dependencies. At the same time
align and correct some definitions.
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Currently the network driver is used only by k2hk evm board.
The k2hk SoC contains NETCP v1.0, but Keystone2 SoCs, like k2e
contain NETCP v1.5. So driver should be able to work with such kind
of NETCP. This commit adds this opportunity. The main difference in
masks and some registers, the logic is the same, so only definitions
should be changed. To differentiate between versions add KS2_NETCP_V1_0
and KS2_NETCP_V1_5. Also remove unused and no more needed defines.
The port number is specific for each board so move this parameter to
configuration.
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This patch removes K2HK SOC specifc emac_regs structure, it uses
soc specific register offset to keep the network driver common across
all the Keystone II EVMs.
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This patch adds Keystone II Lammar (K2L) EVM board support.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This patches enables the On-chip Shared Ram clock domain for K2L SoC.
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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The initialization of PLLs is a part of board specific code, so
move it appropriate places.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This patch adds Keystone II Lamar (K2L) SoC specific definitions
to support MSMC cache coherency.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This patch adds clock definitions and commands to support Keystone II
K2L SOC.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This patch adds hardware definitions specific to Keystone II
Lamar (K2L) SoC.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Hao Zhang <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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The usage description of commands refers to headers of sources,
that is not correct. This patch is intended to fix it.
Also generalize code in order to reduce SoC dependent #ifdefs.
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: WingMan Kwok <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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The keystone_nav driver is general driver intended to be used for
working with queue manager and pktdma for different IPs like NETCP,
AIF, FFTC, etc. So the it's API shouldn't be named like it works only
with one of them, it should be general names. The names with prefix
like netcp_* rather do for drivers/net/keystone_net.c driver. So it's
good to generalize this driver to be used for different IP's and
delete confusion with real NETCP driver.
The current netcp_* functions of keystone navigator can be used for
other settings of pktdma, not only for NETCP. The API of this driver
is used by the keystone_net driver to work with NETCP, so net driver
also should be corrected. For convenience collect pkdma
configurations in drivers/dma/keystone_nav_cfg.c.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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The keystone_nav is used by drivers/net/keystone_net.c driver to
send and receive packets, but currently it's placed at keystone
arch sources. So it should be in the drivers directory also.
It's separate driver that can be used for sending and receiving
pktdma packets by others drivers also.
This patch just move this driver to appropriate directory and
doesn't add any functional changes.
Acked-by: Murali Karicheri <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Use definitions in netcp_pktdma instead direct addresses.
The definitions can be set specifically for SoC, so there
is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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Use definitions in qm_config. The definitions can be set specifically
for SoC, so there is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <[email protected]>
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common files into
common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
Signed-off-by: Stefan Roese <[email protected]>
Tested-by: Luka Perkov <[email protected]>
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Additionally the SDRAM address decoding register address is not hard coded
in the C code any more. A define is introduced for this base address.
This makes is possible to use those gpio functions from other MVEBU SoC's
as well.
Signed-off-by: Stefan Roese <[email protected]>
Tested-by: Luka Perkov <[email protected]>
Acked-by: Prafulla Wadaskar <[email protected]>
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This makes is possible to use this SPI driver from other MVEBU SoC's as well.
As the upcoming Armada XP support will do.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
Tested-by: Luka Perkov <[email protected]>
Acked-by: Prafulla Wadaskar <[email protected]>
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This makes is possible to use those gpio functions from other MVEBU SoC's as well.
Signed-off-by: Stefan Roese <[email protected]>
Tested-by: Luka Perkov <[email protected]>
Acked-by: Prafulla Wadaskar <[email protected]>
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This patch does the following:
- Rename defines and registers to not use kirkwood
- Remove unused defines
- Use clrsetbits() accessor functions
- Coding style cleanup
- Clear 25MHZ bit in timer controller register init for Armada XP
There is no functional change for kirkwood. At least not intentionally.
This will be used by the upcoming Armada XP support.
Signed-off-by: Stefan Roese <[email protected]>
Tested-by: Luka Perkov <[email protected]>
Acked-by: Prafulla Wadaskar <[email protected]>
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This move makes it possible to use this kirkwood SPI driver from other
MVEBU platforms as well. This will be used by the upcoming Armada XP
support.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
Tested-by: Luka Perkov <[email protected]>
Acked-by: Prafulla Wadaskar <[email protected]>
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This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese <[email protected]>
Tested-by: Luka Perkov <[email protected]>
Acked-by: Prafulla Wadaskar <[email protected]>
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The built-in SMSC 95xx chip doesn't know its own MAC address. Instead,
we must query it from the VC firmware; it's probably encoded in fuses
on the BCM2835.
Signed-off-by: Stephen Warren <[email protected]>
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Convert the BCM2835 GPIO driver to use driver model, and switch over
Raspberry Pi to use this, since it is the only board.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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Since this function can fail, check its return value.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Nikita Kiryanov <[email protected]>
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This converts the Tegra SPI drivers to use driver model. This is tested
on:
- Tegra20 - trimslice
- Tegra30 - beaver
- Tegra124 - dalmore
(not tested on Tegra124)
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Convert the exynos GPIO driver to driver model. This implements the generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass <[email protected]>
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The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <[email protected]>
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On popular request this now completes the Warren's work started for
TK1:
aeb3fcb35956461077804720b8a252d50758d7e0
ARM: tegra: Use mem size from MC rather than ODMDATA
In addition to the move of using the Tegra memory controller (MC)
register rather than ODMDATA for T20, T30 and T114 as well it further
uses the generic get_ram_size() function (see "common/memsize.c")
<supposed to be used in each and every U-Boot port>TM. Added benefit is
that it should <catch 99% of hardware related (i. e. reliably
reproducible) memory errors> as well.
Thoroughly tested on the various Toradex line of Tegra modules
available which unfortunately does not include T114 and T124 (yet at
least) plus on the Jetson TK1.
Based-on-work-by: Stephen Warren <[email protected]>
Based-on-work-by: Tom Warren <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This patch adds board support for the Toradex Apalis T30 a computer on
module which can be used on different carrier boards.
For the sake of ease of use we do not distinguish between different
carrier boards for now as the base module features are deemed
sufficient enough for regular booting.
The following functionality is working so far:
- eMMC boot and environment storage
- Gigabit Ethernet (once Thierry's PCIe as well as my E1000 resp. i210
fixes hit mainline)
- MMC/SD cards (both 8-bit as well as 4-bit slot)
- USB client/host (dual role port as client e.g. for DFU/UMS, other two
ports as host)
Signed-off-by: Marcel Ziswiler <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Declare displays[] and display_count in imx-common/video.h to
prevent "Should it be static?" messages when compiling board
files with "make C=1".
Signed-off-by: Eric Nelson <[email protected]>
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Provide a public declaration of the board_spi_cs_gpio()
callback for i.MX SPI chip selects to prevent the warning
"Should it be static?" when compiling with "make C=1".
Signed-off-by: Eric Nelson <[email protected]>
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Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The definitions for div ratio supposed to be in hex and were added
in dec by mistake.
Signed-off-by: Ivan Khoronzhuk <[email protected]>
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