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2022-09-23stm32mp: stm32prog: correctly handle OTP when SMC is not supportedPatrick Delaunay
As the SMC is only supported in SP-MIN for STM32MP15x, the associated partition should be absent when the TA NVMEM is not available in OPT-TEE in STM32MP13x. Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-09-23stm32mp: stm32prog: solve warning for 64bits compilationPatrick Delaunay
Solve many compilation warning when stm32prog is activated on the aarch64. Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-09-23stm32mp: stm32prog: change default flashlayout location to CONFIG_SYS_LOAD_ADDRPatrick Delaunay
Change the defaut flashlayout location, hardcoded at STM32_DDR_BASE, to CONFIG_SYS_LOAD_ADDR to avoid issue on board with reserved memory at STM32_DDR_BASE. This patch changes the command behavior for STM32MP13 and STM32MP15 platform, as CONFIG_SYS_LOAD_ADDR(0xc2000000) != STM32_DDR_BASE but without impact for serial boot with STM32CubeProgrammer. Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-09-23stm32mp: stm32prog: support empty flashlayoutPatrick Delaunay
When the STM32CubeProgrammer sent a empty flashlayout.tsv file, the command stm32prog correctly parse the file but data->dev_nb = 0 and the stm32prog_devices_init operations should be skipped. Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2022-09-21arm64: zynqmp: Wire GEM reset gpioMichal Simek
With ethernet-phy-id driver ETH phy reset can be properly handle that's why describe it in DT. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/5bfd92827033d19617113f4117f37dcf79699a0f.1662721547.git.michal.simek@amd.com
2022-09-21arm64: zynqmp: Describe TI phy as ethernet-phy-idMichal Simek
TI DP83867 is using strapping based on MIO pins. Tristate setup can influce PHY address. That's why switch description with ethernet-phy-id compatible string which enable calling reset. PHY itself setups phy address after power up or reset. Reset description will be added in separate commit. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/52bf9ac0453d4e4896d8edd2618e684bb1ff6012.1662721547.git.michal.simek@amd.com
2022-09-20ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlockMarek Vasut
Pull this LPGPR unlock into common code, since it is used in multiple systems already. Signed-off-by: Marek Vasut <[email protected]>
2022-09-20arm: dts: imx8mm-venice-gw7901: add dsa phy handles to u-boot dtsiTim Harvey
The upstream Linux DSA drivers do not require phy-handle nodes in the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and the mdio nodes to the u-boot.dtsi file so that future dts file syncrhonization between Linux and U-Boot don't break networking. Fixes: 24a7a3c1c042 ("imx8mm: synchronise device tree with linux") Signed-off-by: Tim Harvey <[email protected]>
2022-09-20arm: dts: imx8mp-venice-gw74xx: add dsa phy handles to u-boot dtsiTim Harvey
The upstream Linux DSA drivers do not require phy-handle nodes in the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and the mdio nodes to the u-boot.dtsi file so that future dts file syncrhonization between Linux and U-Boot don't break networking. Fixes: e0caa84ca685 ("imx8mp: synchronise device tree with linux") Signed-off-by: Tim Harvey <[email protected]>
2022-09-20Merge branch 'next' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-marvell into next - Enable CONFIG_TIMER for all Kirkwood / MVEBU boards (Stefan) - u-boot-spl.kwb/SPL: Add / improve size limit setup / detection (Pali) - mvebu: theadorable: Misc updates in defconfig und dts (Stefan)
2022-09-20Merge tag 'u-boot-at91-2023.01-a' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2023.01 cycle: This feature set includes the important update on PIO4 pinctrl driver that solves a long time mismatch between Linux and U-boot, related on the unification of pinctrl and gpio driver support, now respecting the pinctrl bindings ABI; and also support for pinctrl subnodes. The feature set also adds support for PDA screen detection for sam9x60_curiosity board , one fix for SD-Card reinsertion and one fix for sam9x60 clocks.
2022-09-20arm: mvebu: dts: mvebu-u-boot.dtsi: Add "u-boot, dm-pre-reloc" to timer DT nodeStefan Roese
Adding the "u-boot,dm-pre-reloc" DT property to the timer node is necesssary to support the timer in the early boot phases (e.g. SPL & pre-reloc). Signed-off-by: Stefan Roese <[email protected]> Tested-by: Tony Dinh <[email protected]>
2022-09-20arm: mvebu: dts: armada-375.dtsi: Add timer0 & timer1Stefan Roese
Add the DT bindings / descriptions for timer0 & timer1, exactly as done in mainline Linux. Signed-off-by: Stefan Roese <[email protected]> Tested-by: Tony Dinh <[email protected]>
2022-09-20arm: mvebu: dts: Makefile: Compile Armada 375 dtb in a separate stepStefan Roese
This patch changes the compilation, so that the Armada 375 board(s) are compiled in a separate step. This is necessary for the timer dts conversion, as A375 has a different / timer description in the dts. Signed-off-by: Stefan Roese <[email protected]> Tested-by: Tony Dinh <[email protected]>
2022-09-20arm: mvebu: Use CONFIG_TIMER on all MVEBU & KIRKWOOD platformsStefan Roese
Now that the new timer support is available for these platforms, let's select this IF for all these platforms. This way it's not necessary that each board changes it's config header. Signed-off-by: Stefan Roese <[email protected]> Tested-by: Tony Dinh <[email protected]>
2022-09-20arm: mvebu: theadorable: Update eth & mdio DT nodesStefan Roese
With the recent changes in the Marvel mvneta network driver, the MDIO bus is not connected any more. This patch updates the DT nodes to use the nodes from the dtsi files instead of creating ad-hoc nodes. Signed-off-by: Stefan Roese <[email protected]>
2022-09-19Merge branch 'master' into nextTom Rini
Signed-off-by: Tom Rini <[email protected]>
2022-09-19ARM: dts: at91: sama7: Align with Linux DevicetreeSergiu Moga
This patch makes sure that the Devicetree for the sama7 boards are aligned with the Devicetree from Linux. This implies removing the GPIO compatible and replacing it with the PINCTRL one, as well as unifying the SDMMC pinctrl related subnodes under one single subnode. Signed-off-by: Sergiu Moga <[email protected]>
2022-09-19ARM: dts: at91: sama5: Align with Linux DevicetreeSergiu Moga
This patch makes sure that the Devicetree for the sama5 boards are aligned with the Devicetree from Linux. This implies removing the GPIO compatible and replacing it with the PINCTRL one, as well as unifying the SDMMC pinctrl related subnodes under one single subnode. Signed-off-by: Sergiu Moga <[email protected]>
2022-09-19ARM: dts: at91: sam9x60_curiosity: add onewire supportDurai Manickam KR
Add support for onewire memory. Signed-off-by: Durai Manickam KR <[email protected]>
2022-09-18bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boardsMichael Trimarchi
Introduce BSH SystemMaster (SMM) M2 board family, which consists of: imx6ulz SMM M2 and imx6ulz SMM M2 PRO boards. Add support for imx6ulz BSH SMM M2 board: - 128 MiB DDR3 RAM - 256MiB Nand - USBOTG1 peripheral - fastboot. Signed-off-by: Michael Trimarchi <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2022-09-18board: purism: add the Purism Librem5 phoneAngus Ainslie
Initial commit of Librem5 u-boot and SPL Signed-off-by: Angus Ainslie <[email protected]> Co-developed-by: Sebastian Krzyszkowiak <[email protected]> Signed-off-by: Sebastian Krzyszkowiak <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2022-09-18ARM: dts: imx: Fix I2C5 GPIO assignment on i.MX8M Plus DHCOMMarek Vasut
Fix copy-paste error of the I2C5 bus recovery GPIO assignment, the I2C5 GPIOs are on gpio3 instead of gpio5. Signed-off-by: Marek Vasut <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Peng Fan <[email protected]> Cc: Stefano Babic <[email protected]> Cc: uboot-imx <[email protected]>
2022-09-18ARM: dts: imx: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOMMarek Vasut
The ECSPI1 is on I2C1/I2C2 pins of the SoC, update the pinmux accordingly. Signed-off-by: Marek Vasut <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Peng Fan <[email protected]> Cc: Stefano Babic <[email protected]> Cc: uboot-imx <[email protected]>
2022-09-18ARM: dts: imx: Rename imx8mp-dhcom{-pdk2,}-boot.dtsiMarek Vasut
Rename imx8mp-dhcom-pdk2-u-boot.dtsi to imx8mp-dhcom-u-boot.dtsi, since this file is shared by PDK2, PicoITX and DRC02. No functional change. Signed-off-by: Marek Vasut <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Peng Fan <[email protected]> Cc: Stefano Babic <[email protected]> Cc: uboot-imx <[email protected]>
2022-09-18ARM: dts: imx: Add SoM compatible to i.MX8M Plus DHCOM PDK2Marek Vasut
Add SoM compatible string into i.MX8MP DHCOM PDK2 compatible strings. Signed-off-by: Marek Vasut <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Peng Fan <[email protected]> Cc: Stefano Babic <[email protected]> Cc: uboot-imx <[email protected]>
2022-09-18ARM: dts: imx: Drop Atheros PHY header from i.MX8M Plus DHCOM PDK2Marek Vasut
This PHY is not used on PDK2, the header was added due to copy-paste error, drop it. Signed-off-by: Marek Vasut <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Peng Fan <[email protected]> Cc: Stefano Babic <[email protected]> Cc: uboot-imx <[email protected]>
2022-09-18ARM: dts: imx: Add HW variant details to i.MX8M Plus DHCOM PDK2Marek Vasut
Add information about which exact SoM variant is used on which PDK2 variant. Signed-off-by: Marek Vasut <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Peng Fan <[email protected]> Cc: Stefano Babic <[email protected]> Cc: uboot-imx <[email protected]>
2022-09-18arm: dts: imx8mn-beacon-kit-u-boot: Fix broken bootingAdam Ford
When the imx8mm.dtsi file was pulled in from Linux, the UARTs were moved into an spba sub-node which wasn't being included in the SPL device tree. This meant the references to the UART weren't being handled properly and when booting the system would constantly reboot. Fix this by adding the spba node to the spl device tree to restore normal booting. Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux") Signed-off-by: Adam Ford <[email protected]>
2022-09-18imx: romapi: fix spurious ampersand in address printMarcel Ziswiler
Fix spurious ampersand in address print e.g. Find img info 0x&480331a0, size 855 Signed-off-by: Marcel Ziswiler <[email protected]> Signed-off-by: Francesco Dolcini <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]>"
2022-09-18ARM: dts: imx: add i.MXRT1170-EVK supportJesse Taube
The NXP i.MXRT1170 Evaluation Kit (EVK) provides a platform for rapid evaluation of the i.MXRT, which features NXP's implementation of the Arm Cortex-M7 and Cortex-M4 core. The EVK provides 64 MB SDRAM, Micro SD card socket, USB 2.0 OTG. This patch aims to support the preliminary booting up features as follows: GPIO LPUART SD/MMC SDRAM Signed-off-by: Jesse Taube <[email protected]>
2022-09-18ARM: dts: imxrt11170-pinfunc: Add pinctrl binding headerJesse Taube
Add binding header for i.MXRT1170 pinctrl device tree. Signed-off-by: Jesse Taube <[email protected]>
2022-09-18imx: imxrt1170-evk: Add support for the NXP i.MXRT1170-EVKJesse Taube
This commit adds board support for i.MXRT1170-EVK from NXP. This board is an evaluation kit provided by NXP for i.MXRT117x processor family. Signed-off-by: Jesse Taube <[email protected]>
2022-09-18cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese
Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <[email protected]> Reviewed-by: Simon Glass <[email protected]> Tested-by: Tom Rini <[email protected]> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
2022-09-16blk: Switch over to using uclass IDsSimon Glass
We currently have an if_type (interface type) and a uclass id. These are closely related and we don't need to have both. Drop the if_type values and use the uclass ones instead. Maintain the existing, subtle, one-way conversion between UCLASS_USB and UCLASS_MASS_STORAGE for now, and add a comment. Signed-off-by: Simon Glass <[email protected]>
2022-09-16blk: Enable CONFIG_BLK for all mediaSimon Glass
Enable this option on all boards which support block devices. Drop the related depencies on BLK since these are not needed anymore. Disable BLOCK_CACHE on M5253DEMO as this causes a build error. Signed-off-by: Simon Glass <[email protected]>
2022-09-15brppt1: Cleanup device treeBernhard Messerklinger
* Remove unnecessary device tree nodes which are not needed in U-Boot directly. * Move all U-Boot specific device tree properties to u-boot dtsi. Signed-off-by: Bernhard Messerklinger <[email protected]> Reviewed-by: Wolfgang Wallner <[email protected]>
2022-09-15brppt1: Fix SPL boot stageBernhard Messerklinger
Commit 6337d53fdf45 ("arm: dts: sync am33xx with Linux 5.9-rc7") syncs the am335x device tree with the latest linux kernel am335x device tree. That causes problems with device tree in SPL stage. To fix the issues CONFIG_SPL_OF_TRANSLATE must be set to handle the synced bus addresses correctly. A custom U-Boot device tree is also needed since the SPL build removes bus properties from bus nodes which are not explicitly marked with the u-boot,dm-spl or u-boot,dm-pre-reloc flag. Therefore all parent buses of the in the SPL needed devices must be marked with u-boot,dm-pre-reloc. Also since there is no driver for "ti,sysc" compatible property in SPL the buses marked with this compatible string must also be marked with compatible = "simple-bus" to make the underlying devices visible in SPL. Otherwise the matching device drivers aren't found and the uclass drivers are dropped. Signed-off-by: Bernhard Messerklinger <[email protected]> Reviewed-by: Wolfgang Wallner <[email protected]>
2022-09-15brppt1: Remove unused board variantsBernhard Messerklinger
The SPI and NAND board variants never went into production. Drop those board variants. Signed-off-by: Bernhard Messerklinger <[email protected]> Reviewed-by: Wolfgang Wallner <[email protected]>
2022-09-14Add in the ability to load and boot an uncompressed kernel image during the ↵Nathan Barrett-Morrison
Falcon Mode boot sequence. This is required for architectures which do not support compressed kernel images (i.e. ARM64). This is only used while not booting via FIT image. Signed-off-by: Nathan Barrett-Morrison <[email protected]> Cc: Tom Rini <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2022-09-13arm: dts: aspeed: Update SPI flash node settingsChin-Ting Kuo
For both AST2500 and AST2600, there are three SPI controllers, FMC(Firmware Memory Controller), SPI1 and SPI2. The clock source is HCLK. Following is the basic information for ASPEED SPI controller. AST2500: - FMC: CS number: 3 controller reg: 0x1e620000 - 0x1e62ffff decoded address: 0x20000000 - 0x2fffffff - SPI1: CS number: 2 controller reg: 0x1e630000 - 0x1e630fff decoded address: 0x30000000 - 0x37ffffff - SPI2: CS number: 2 controller reg: 0x1e631000 - 0x1e631fff decoded address: 0x38000000 - 0x3fffffff AST2600: - FMC: CS number: 3 controller reg: 0x1e620000 - 0x1e62ffff decoded address: 0x20000000 - 0x2fffffff - SPI1: CS number: 2 controller reg: 0x1e630000 - 0x1e630fff decoded address: 0x30000000 - 0x3fffffff - SPI2: CS number: 3 controller reg: 0x1e631000 - 0x1e631fff decoded address: 0x50000000 - 0x5fffffff Signed-off-by: Chin-Ting Kuo <[email protected]>
2022-09-13xilinx: Fix mdio bus description for vck190-scMichal Simek
Current behavior is that eth_phy_get_mdio_bus Net: FEC: can't find phy-handle ZYNQ GEM: ff0b0000, mdio bus ff0b0000, phyaddr 0, interface sgmii eth0: ethernet@ff0b0000 Net: ZYNQ GEM: ff0b0000, mdio bus ff0b0000, phyaddr 0, interface sgmii eth0: ethernet@ff0b0000 Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/5b7da5808136b3f579c0cf7a3431b56c758655e9.1662460749.git.michal.simek@amd.com
2022-09-13ARM: zynq: DT: List OCM memoryMichal Simek
Description OCM with mmio-sram driver. In 99% use cases OCM is mapped high that's why it is placed on fixed location. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/a951dbe885640197efe3e91bb9fa5caedb54b387.1662460712.git.michal.simek@amd.com
2022-09-13ARM: zynq: Align qspi node name with Linux kernelMichal Simek
Nodes should follow generic rules where compatible and reg properties should be listed on the top of node. That's why sync it up. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/922dca6227cb0aa4f79e6d3595c5f280ba020684.1662460540.git.michal.simek@amd.com
2022-09-13arm64: versal: Define zynqmp_mmio_write() for versalMichal Simek
GQSPI driver is using it but this function is never called for Versal because it is removed by linker. But function should be declared to avoid this build warning: drivers/spi/zynqmp_gqspi.c: In function 'zynqmp_qspi_set_tapdelay': drivers/spi/zynqmp_gqspi.c:378:3: warning: implicit declaration of function 'zynqmp_mmio_write' [-Wimplicit-function-declaration] 378 | zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST, Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-09-13ARM: zynq: Align bss and end of u-boot image to 64bitsMichal Simek
The main reason is that DT memory reserved code is expecting DT to be 64bit aligned. For more information take a look at commit 5bd5ee02b23b ("xilinx: zynqmp: Check that DT is 64bit aligned"). Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/9f3688cda188d8ea0b462df2aa08a10ddcc9c149.1661938136.git.michal.simek@amd.com
2022-09-13arm64: zynqmp: add ref_clk property for REFCLKPER calculationPiyush Mehta
Added ref_clk 'ref' property for GUCTL_REFCLKPER and GFLADJ_REFCLK_FLADJ calculation. This property configure correct value for SOF/ITP counter and period of ref_clk. This patch adds 'ref' property for both dwc3_0 and dwc3_1 cores. Signed-off-by: Piyush Mehta <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/417545b948ea12a9301a5e80851f98523be2b443.1661259809.git.michal.simek@amd.com
2022-09-13arm64: zynqmp: Add missing tca6416 to zynqmp SCMichal Simek
Add missing tca6416 i2c gpio controller to SC dts file. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/a19c191d0dffb213d9dc8809d22728d79cf73a22.1661259623.git.michal.simek@amd.com
2022-09-13arm: dts: Add xlnx prefix to GEM compatible stringHarini Katakam
cdns,zynq/zynqmp were recentle deprecated in Linux in favour of xlnx prefix. Add this new compatible string and retain the existing string for compatibility with uboot drivers. Signed-off-by: Harini Katakam <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/a38b1b55132fc026cc09224dba61e42fd03b1a36.1661259558.git.michal.simek@amd.com
2022-09-13arm64: zynqmp: Add mtd partition for secure OS storage areaAmit Kumar Mahapatra
Update MTD partitions of Kria device trees to allocate 128KB of QSPI memory for secure OS. Increased "SHA256" partition size & changed starting address of "User" partition to accommodate the new partition "Secure OS Storage" Signed-off-by: Amit Kumar Mahapatra <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/9cc64b8c731d11439de73d0af54c65080068f00b.1661242681.git.michal.simek@amd.com
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-09 10:41:59 +0000