| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-07-12 | riscv: Rename SiFive CLINT to RISC-V ALINT | Bin Meng |
| 2022-11-03 | riscv: Rename Andes PLIC to PLICSW | Yu Chien Peter Lin |
| 2020-09-30 | riscv: Rework Andes PLMT as a UCLASS_TIMER driver | Sean Anderson |
| 2019-04-08 | riscv: Add a SYSCON driver for Andestech's PLMT | Rick Chen |
| 2019-04-08 | riscv: Add a SYSCON driver for Andestech's PLIC | Rick Chen |
| 2018-12-18 | riscv: Add a SYSCON driver for SiFive's Core Local Interruptor | Bin Meng |
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index : u-boot.git | |
| Unnamed repository; edit this file 'description' to name the repository. |
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