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Age	Commit message (Expand)	Author
2022-01-19	doc: replace @return by Return:	Heinrich Schuchardt
2022-01-15	efi_loader: fix SectionAlignment, FileAlignment	Heinrich Schuchardt
2022-01-15	riscv: revert Complete efi header for RV32/64	Heinrich Schuchardt
2021-12-23	riscv: qemu: Split devicetree files for qemu_riscv32/64	Simon Glass
2021-12-02	riscv: Enable SPI flash env for SiFive Unmatched.	Thomas Skibo
2021-12-02	riscv: Support booting SiFive Unmatched from SPI.	Thomas Skibo
2021-12-02	riscv: dts: Split Microchip device tree	Padmarao Begari
2021-11-08	riscv: add #define in asm/io.h for some device drivers	Wei Fu
2021-11-08	riscv: function to retrieve SBI implementation version	Heinrich Schuchardt
2021-10-20	riscv: Avoid io read/write cause wrong result	Nick Hu
2021-10-18	riscv: Remove OF_PRIOR_STAGE from RISC-V boards	Ilias Apalodimas
2021-10-13	fdtdec: Support reserved-memory flags	Thierry Reding
2021-10-13	fdtdec: Support compatible string list for reserved memory	Thierry Reding
2021-10-08	image: Drop IMAGE_ENABLE_OF_LIBFDT	Simon Glass
2021-10-07	riscv: ae350: enable Coherence Manager for ae350	Leo Yu-Chi Liang
2021-10-07	sysreset: provide SBI based sysreset driver	Heinrich Schuchardt
2021-10-07	riscv: add missing SBI extension definitions	Heinrich Schuchardt
2021-10-07	riscv: Fix setting no-map in reserved memory nodes	Samuel Holland
2021-09-23	lmb: riscv: Add arch_lmb_reserve()	Marek Vasut
2021-09-16	Merge tag 'v2021.10-rc4' into next	Tom Rini
2021-09-07	riscv: lib: modify the indent	Zong Li
2021-09-07	board: sifive: use ccache driver instead of helper function	Zong Li
2021-09-07	riscv: lib: implement enable_caches for sifive cache	Zong Li
2021-09-07	common: board_r: support enable_caches for RISC-V	Zong Li
2021-09-07	riscv: show code leading to exception	Heinrich Schuchardt
2021-08-31	Kconfig: Remove all default n/no options	Michal Simek
2021-08-31	Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig	Tom Rini
2021-08-17	riscv: cpu: fu740: Fix typo of date	Zong Li
2021-08-14	efi_loader: add Linux magic to RISC-V crt0	Heinrich Schuchardt
2021-07-28	i2c: Rename SPL/TPL_I2C_SUPPORT to I2C	Simon Glass
2021-07-21	board: sifive: drop stuff related to unmatched revision 1	Zong Li
2021-07-21	riscv: booti: do not force relocation if force_reloc is not set	Vitaly Wool
2021-07-07	riscv: dts: add OpenPiton RISC-V board dts support	Tianrui Wei
2021-07-06	riscv: dts: add dts for unmatched rev1	Zong Li
2021-07-06	board: sifive: Add an interface to get PCB revision	Zong Li
2021-07-06	riscv: sifive: fu740: Support i2c in spl	Zong Li
2021-07-06	riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controller	Zong Li
2021-07-06	board: riscv: add openpiton-riscv64 SoC support	Tianrui Wei
2021-06-28	Merge tag 'v2021.07-rc5' into next	Tom Rini
2021-06-17	k210: dts: Set PLL1 to the same rate as PLL0	Sean Anderson
2021-06-17	riscv: andes_plic: Fix riscv_get_ipi() mask	Bin Meng
2021-06-17	riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config	Bin Meng
2021-06-17	riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit	Bin Meng
2021-06-17	riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes	Bin Meng
2021-06-17	riscv: ae350: dts: Remove the unnecessary space in bootargs	Bin Meng
2021-06-17	riscv: ae350: dts: Add SPDX license header	Bin Meng
2021-05-31	riscv: cpu: fu740: clear feature disable CSR	Green Wan
2021-05-31	board: sifive: add HiFive Unmatched board support	Green Wan
2021-05-31	riscv: dts: add SiFive Unmatched board support	Green Wan
2021-05-31	riscv: dts: add fu740 support	Green Wan