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Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED
Signed-off-by: Tom Rini <[email protected]>
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This removes the following unreferenced CONFIG symbols:
CONFIG_FDTADDR
CONFIG_FDTFILE
CONFIG_FLASH_SECTOR_SIZE
CONFIG_FSL_CPLD
CONFIG_HDMI_ENCODER_I2C_ADDR
CONFIG_I2C_MVTWSI
CONFIG_I2C_RTC_ADDR
CONFIG_IRAM_END
CONFIG_IRAM_SIZE
CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
CONFIG_L1_INIT_RAM
CONFIG_MACB_SEARCH_PHY
CONFIG_MIU_2BIT_21_7_INTERLEAVED
CONFIG_MTD_NAND_VERIFY_WRITE
CONFIG_MVGBE_PORTS
CONFIG_NETDEV
CONFIG_NUM_DSP_CPUS
CONFIG_PHY_BASE_ADR
CONFIG_PHY_INTERFACE_MODE
CONFIG_PSRAM_SCFG
CONFIG_RAMBOOT_SPIFLASH
CONFIG_RAMBOOT_TEXT_BASE
CONFIG_RD_LVL
CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
CONFIG_SETUP_INITRD_TAG
CONFIG_SH_QSPI_BASE
CONFIG_SMDK5420
CONFIG_SOCRATES
CONFIG_SPI_ADDR
CONFIG_SPI_FLASH_QUAD
CONFIG_SPI_FLASH_SIZE
CONFIG_SPI_HALF_DUPLEX
CONFIG_SPI_N25Q256A_RESET
CONFIG_TEGRA_SLINK_CTRLS
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_UBOOT_SECTOR_COUNT
CONFIG_UBOOT_SECTOR_START
CONFIG_VAR_SIZE_SPL
CONFIG_VERY_BIG_RAM
And also:
BL1_SIZE
PHY_NO
RESERVE_BLOCK_SIZE
Signed-off-by: Tom Rini <[email protected]>
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Migrate CONFIG_LMB in Kconfig.
Signed-off-by: Patrick Delaunay <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
Signed-off-by: Chris Zankel <[email protected]>
Signed-off-by: Max Filippov <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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