| Age | Commit message (Collapse) | Author |
|---|
|
The existing QEMU implementation mostly ignored BLOBLIST_TABLES and
allocates the bulk of the tables with malloc(). Update it to place all
tables in the bloblist. Since QEMU declares a size of 128KB regardless
of the size of its tables, this requires a larger bloblist.
Fix up the e820 table to handle this, keeping the old code as an option
for now, to assist with any future bug-fixing.
Signed-off-by: Simon Glass <[email protected]>
|
|
Move over to use this API before making the code even more complicated.
Signed-off-by: Simon Glass <[email protected]>
|
|
The existing mechanism is pretty painful as it requires manual
calculations for anything but a trivial setup.
Add a new API for adding e820 entries.
Signed-off-by: Simon Glass <[email protected]>
|
|
There is already code for this in zimage. Move it to the e820 file so
it can be used elsewhere.
Signed-off-by: Simon Glass <[email protected]>
|
|
QEMU likes to have an MTRR set up, just like real machines. Add an MTRR
which covers the total RAM size.
This does nothing on machines without MTRRs.
Signed-off-by: Simon Glass <[email protected]>
|
|
At present mtrr_add_request() requires that the size is a power of two.
This is too limiting for machines with 4GB (or more) of RAM, since they
often must take account of a memory hole at 3GB.
Update the function to automatically deal with an unaligned size, using
more MTRRs as required.
The algorithm is taken from coreboot commit 60bce10750
Signed-off-by: Simon Glass <[email protected]>
|
|
The CONFIG option is no-longer correct since we can have SPL and PPL
with different bitness.
Fix this and sync up with Linux 6.13 in this area, since this is where
the code came from many years ago.
Signed-off-by: Simon Glass <[email protected]>
|
|
The existing functions work but the register clobbers are wrong, so
strange bugs results.
The original functions were taken from a very old version of Linux.
Update them from Linux 6.13
Signed-off-by: Simon Glass <[email protected]>
|
|
Rather than repeating the same code in several places, add some
functions which can do the conversion.
Use the cpu_phys_address_size() function to obtain the physical-address
size, since it is more reliable with kvm, where the host CPU may have a
different value from the emulation CPU.
Signed-off-by: Simon Glass <[email protected]>
|
|
At present it is not possible to find out the physical-address size in
long mode, so a predefined value is used.
Update the macros to support this properly, since it is important when
programming MTRRs.
Signed-off-by: Simon Glass <[email protected]>
|
|
This value happens to be used by ctype.h so chose a different name.
Signed-off-by: Simon Glass <[email protected]>
|
|
With the 64-bit descriptor we can use a jump instruction, rather than
pushing things on the stack.
Since the processor is in 64-bit mode by this point, pop a 64-bit value
from the stack, containing the target address.
This simplifies the code slightly, in particular its use of the stack.
Signed-off-by: Simon Glass <[email protected]>
|
|
Make use the existing GDT which now includes entries for 64-bit code.
Leave the interrupt descriptors alone. They can be tidied up once U-Boot
starts up.
With this, kvm mode works with QEMU.
Signed-off-by: Simon Glass <[email protected]>
Fixes: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/31
|
|
This is required as part of the procedure. The existing code works
because it changes the GDT at the same time, but this makes kvm
unhappy.
Update the algorithm to disable and then re-enable paging.
Signed-off-by: Simon Glass <[email protected]>
|
|
Use a symbol to select the size of the GDT, rather than hard-coding a
value. This matches how it is done in start64
Signed-off-by: Simon Glass <[email protected]>
|
|
This makes use of a 'bool' type, so include the required header.
Signed-off-by: Simon Glass <[email protected]>
|
|
This functions normally and has done for a while, so drop this scary
message.
Signed-off-by: Simon Glass <[email protected]>
|
|
x86_cpu_init_f() is called by arch_cpu_init() a few lines below this
code. Drop the duplicate call.
Signed-off-by: Simon Glass <[email protected]>
|
|
Use some named flags when setting up the cache, so it is easier to see
what is going on.
Signed-off-by: Simon Glass <[email protected]>
|
|
At present it is not possible to execution 64-bit code without
installing an entire new Global Descriptor Table. This is inconvenient
since kvm does not seem to like switching into long mode with a new
table.
It isn't actually necessary, since we can just extend the existing
table. Add some new entries to this effect.
Signed-off-by: Simon Glass <[email protected]>
|
|
U-Boot clears the display when it starts up, so there is no need to ask
the VESA driver to do this. Fix this and add a comment explaining the
flags.
Signed-off-by: Simon Glass <[email protected]>
|
|
This option is not actually defined in Kconfig anymore. Use a normal
debug print instead, which has a similar effect.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Add categories for i8259 and bios files, so that log statements have the
right category.
Signed-off-by: Simon Glass <[email protected]>
|
|
This is not needed in SPL, so drop it.
Signed-off-by: Simon Glass <[email protected]>
|
|
BSS is placed in DRAM which is actually available early with QEMU. But
it is cleared by the init sequence, so values stored there are lost.
Move the system-type flag into a function, instead.
Signed-off-by: Simon Glass <[email protected]>
|
|
Manorit Chawdhry <[email protected]> says:
The series adds support for J742S2 family of SoCs. Also adds J742S2 EVM
Support and re-uses most of the stuff from the superset device J784s4.
This device is a subset of J784S4 and shares the same memory map and
thus the code is being reused from J784S4 to avoid duplication.
It initially cleans up the J784s4 and AM69 files so that they can be
re-usable for j742s2 and then it introduces J742S2.
The DT for the following SoC will be coming to U-boot during 6.13 Sync
so the series is kept as RFC till then.
Here are some of the salient features of the J742S2 automotive grade
application processor:
The J742S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive, ADAS and industrial
applications requiring AI at the network edge. This SoC extends the K3
Jacinto 7 family of SoCs with focus on raising performance and
integration while providing interfaces, memory architecture and compute
performance for multi-sensor, high concurrency applications.
Some changes that this devices has from J784S4 are:
* 4x Cortex-A72 vs 8x Cortex-A72
* 3x C7x DSP vs 4x C7x DSP
* 4 port ethernet switch vs 8 port ethernet switch
* 2 DDR controller vs 4 DDR controller
Test logs:
https://gist.github.com/manorit2001/f7df0e8cca1e9973b4361f0559c6f53d
Link: https://lore.kernel.org/r/[email protected]
|
|
Include the U-boot device tree files needed to boot the board.
[ DDR config ]
Signed-off-by: Neha Malcom Francis <[email protected]>
Signed-off-by: Manorit Chawdhry <[email protected]>
|
|
Introduce the basic files needed to support the TI J742S2 family of SoCs.
Signed-off-by: Manorit Chawdhry <[email protected]>
|
|
J742S2 has the same part number as J784S4 but JTAG_DEVICE_ID has a
PKG bit that tells about J742S2.
Add support for reading JTAG_DEVICE_ID and set family as J742S2 based
on that.
Link: https://www.ti.com/lit/pdf/spruje3 (TRM)
Signed-off-by: Manorit Chawdhry <[email protected]>
|
|
Refactor J784s4 ddr file to a common file which uses the
superset device to allow reuse in j742s2-evm which uses the subset part.
Signed-off-by: Manorit Chawdhry <[email protected]>
|
|
Clean up templatized boot binaries for j784s4 soc. This includes
modifying the k3-j784s4-binman.dtsi to use SPL_BOARD_DTB,
BOARD_DESCRIPTION and UBOOT_BOARD_DESCRIPTION from the files that
include it to further reuse code.
k3-j784s4-binman.dtsi will contain only templates. Only required boot
binaries can be built from the templates in the boards' respective
-u-boot.dtsi file (or k3-<board>-binman.dtsi if it exists). This allows
clear distinction between the SoC common stuff vs. what is additionally
needed to boot up a specific board.
Signed-off-by: Neha Malcom Francis <[email protected]>
[ Do it only for j784s4 ]
Signed-off-by: Manorit Chawdhry <[email protected]>
|
|
Add MIDR entries for Cortex-A55, Cortex-A73 and
Cortex-A75 cores and update the is_coretex_a entries.
Signed-off-by: Peter Robinson <[email protected]>
|
|
The option ONENAND_BOOT is never set, so remove it. The option
SYS_ONENAND_BOOT was never migrated to Kconfig and any platforms which
supported that have long been removed from the code, so remove the
reference there as well.
Signed-off-by: Tom Rini <[email protected]>
|
|
Sam Edwards <[email protected]> says:
This is v2 of my "misc. fixes" series, sent to prepare the codebase for more
direct LLVM support in the near future. This series contains several fixes that
I found in the process of preparing that support and which address issues
independent of any future feature or enhancement. I am sending these now, both
so that their inclusion is not delayed by discussion on my upcoming series and
to make the latter more manageable.
Link: https://lore.kernel.org/r/[email protected]
|
|
While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.
However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.
This patch doesn't affect the final output binaries in any way.
Signed-off-by: Sam Edwards <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
When a section is not flagged with SHF_ALLOC, LLD's --gc-sections
algorithm fails to visit the sections that it references. As a result of
this, LLD was dropping the call64.o(.data) section, which is itself only
referenced by .text_call64.
This appears to be a bug in LLD, but the .section directive for
.text_call64 should really have the correct flags either way.
Add `"ax"` to mark the section as ALLOC ("supposed to be loaded") and
CODE ("supposed to be executed").
Fixes: 7dc82591d68e2a ("x86: Move call64 into its own section")
Signed-off-by: Sam Edwards <[email protected]>
|
|
LLVM's IAS does not (and cannot easily) support the 'adrl'
pseudoinstruction, and ARM developers generally do not consider it
portable across assembler implementations either.
Instead, expand it into the two subtract instructions it would emit
anyway. An explanation of the math follows:
The .+8 and .+4 refer to the same memory location; this is because the
.+4 expression occurs in a subsequent instruction, 4 bytes after the
first. This memory location is the value of the PC register when it is
read by the first sub instruction. Thus, both inner parenthesized
expressions evaluate to the same result: PC's offset relative to
image_base. The subtract instructions then remove one byte each
(low, then high) of the total offset, thereby getting the absolute
address of image_base loaded in r0.
Signed-off-by: Sam Edwards <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
There are a handful of sections that are not useful in the U-Boot output
binary. At present, the linker script moves these to the end of the
binary, after the _image_binary_end marker symbol, so that they don't
get loaded.
The linker script syntax supports discarding sections that shouldn't be
included in the output. Switch to this instead, to make the intention
clearer and reduce the ELF sections that have to be handled later in the
build. This is also consistent with the other architectures' linker
scripts.
Signed-off-by: Sam Edwards <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
These are sometimes used by LLVM's code-generator, when it can guarantee that
the memory buffer being passed is aligned on a (4- or 8-byte) boundary. They
can safely be aliased to the unaligned versions.
Signed-off-by: Sam Edwards <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
LLVM's code generator will sometimes emit calls to __aeabi_memclr. Add an
implementation of this for LLVM compatibility.
Signed-off-by: Sam Edwards <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
These symbols need to survive the IR-level dead function elimination pass,
since nothing at the IR level is referencing them (calls to these are inserted
later, at codegen time).
Signed-off-by: Sam Edwards <[email protected]>
Acked-by: Ilias Apalodimas <[email protected]>
|
|
The .mmutable section was deprecated in 2012 [1] and finally removed
entirely from U-Boot in 2022 [2], so this special handling is no longer
necessary. Remove it to tidy up the linker script.
[1]: dde3b70dcf3d ("arm: add a common .lds link script")
[2]: 3135ba642f9a ("arm: pxa: Remove CONFIG_CPU_PXA25X")
Signed-off-by: Sam Edwards <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In the case of OF_SEPARATE this is
the default so we do not need to do anything here normally to enforce
this.
Signed-off-by: Tom Rini <[email protected]>
|
|
Christian Marangi <[email protected]> says:
This little series adds initial support for Airoha AN7581 SoC.
With the help of some backport patch, this use OF_UPSTREAM
directly.
Posting this to have the targer and the very basic driver.
Ethernet, SNAND and eMMC support is already ready downstream
and will be posted shortly after this gets approved.
Having the first driver ready permits to separately push
dedicate series for SNAND, eMMC and Ethrnet as they all depends
on basic support of clock and reset and nothing else.
Link: https://lore.kernel.org/r/[email protected]
|
|
Add initial support for Airoha AN7581 SoC. This adds the initial Kconfig
and Makefile entry for the SoC, an U-Boot specific DTSI and initial config
for it. Also add the initial code for CPU and RAM initialization.
Signed-off-by: Christian Marangi <[email protected]>
|
|
Udit Kumar <[email protected]> says:
This enables the ESMs and the associated PMIC.
Programming these bits is a requirement to make the watchdog actually reset the board.
After DT sync nodes bucka1 and main_esm has bootph property added in
pmic nodes.
RFC was sent
https://lore.kernel.org/all/[email protected]/
With current patch boot logs
https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b
reset: https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b#file-gistfile1-txt-L2344
Link: https://lore.kernel.org/r/[email protected]
|
|
On J7200 processor board MCU_SAFETY_ERROR signal is routed to PMIC for
ESM error handling. The PMIC resets the board on receipt of the signal.
Enable the support for the board by adding ESM PMIC node.
Signed-off-by: Gowtham Tammana <[email protected]>
|
|
There's no fan in MedisTek's reference design. Disable it for now.
Signed-off-by: Weijie Gao <[email protected]>
|
|
This patch adds pwm support for MediaTek MT7987 SoC.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
|
|
The reserved-memory node 'wmcpu-reserved@50000000' only applies to
linux kernel and is useless in u-boot.
Remove it in *-u-boot.dtsi to make this memory region usable.
Fixes: 2d6962e0618 (arm: mediatek: add support for MediaTek MT7987 SoC)
Signed-off-by: Weijie Gao <[email protected]>
|
