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Due to i.MX95 has reserved first 256MB DDR, change to use the DDR
start address in u-boot as the container header buffer.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Extend get_imageset_end() to handle i.MX94 family.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Jacky Bai <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
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i.MX94
- Add base addresses for WDG3, WDG4, GPIO6, and GPIO7 for i.MX94.
- Introduce common.h with macros of clock IDs, power domains, and CPU
types for platform-specific replacement (e.g., i.MX94, i.MX95).
- Extend imx_get_mac_from_fuse() to support i.MX94.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
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Update get_reset_reason() to support i.MX94 to send message to the
System Manager to retrieve the LM/system last booted/shutdown reasons.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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reasons
System Manager provides the last booted and shutdown reasons of the
logical machines (LM) and system using the SCMI misc protocol (Protocol
ID: 0x84, Message ID: 0xA). This path adds get_reset_reason() to query
and print these reasons in SPL and U-Boot.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Ye Li <[email protected]>
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Introduce support for the new i.MX94 processor, including its CPU type
and SoC-level Kconfig entry.
The i.MX94 is a new member of the i.MX9 family. It uses a System Manager
to handle system-level functions such as power, clock, sensor and pin
control. The System Manager runs on a Cortex-M processor, while the
Cortex-A processor communicates with it via the ARM SCMI protocol and a
messaging unit.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
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On the RZG2L platform, the advised
TF-A (https://github.com/renesas-rz/rzg_trusted-firmware-a/tree/v2.5/rzg2l)
does not pass any DTB blob to U-Boot.
On the other hand, the RZG2L part of U-Boot expects a DTB to be passed. It
means that if one flashes the latest TF-A as well as the mainline U-Boot,
it will crash trying to dereference the NULL DTB pointer before outputing
anything.
Check if the DTB pointer is NULL before trying to use it.
Signed-off-by: Mathieu Othacehe <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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The sandbox time offset is intended to be controlled via the U-Boot
environment, not the host process environment. Update os_get_time_offset()
to use env_get() instead of the libc getenv().
Leave other getenv() uses (e.g. U_BOOT_PERSISTENT_DATA_DIR,
UBOOT_SB_FUZZ_TEST) unchanged, since those refer to host environment
variables needed by sandbox tests.
Signed-off-by: Osama Abdelkader <[email protected]>
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and fix related test/DTS issues""
This reverts commit 4d84fa1261eb27d57687f2e4c404a78b8653c183, reversing
changes made to b82a1fa7ddc7f3be2f3b75898d5dc44c34420bdd.
I had missed some feedback on this series from earlier, and we have
since had reports of regressions due to this as well. For now, revert
this.
Signed-off-by: Tom Rini <[email protected]>
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related test/DTS issues"
Aristo Chen <[email protected]> says:
This patch series enhances FIT image robustness by adding **memory
region overlap detection** to `mkimage` and fixing existing overlaps
in DTS files and `binman` tests.
The primary goal is to prevent runtime memory corruption from
conflicting load addresses in FIT images.
Key Changes:
1. `mkimage` Overlap Detection: A new validation in
`tools/fit_image.c` checks for overlapping load addresses
within FIT configurations. `mkimage` now errors out with
detailed info on conflicts, preventing bad FIT image creation.
2. New Test Case: A Python test verifies the new detection.
It intentionally creates an overlap (kernel and FDT)
to confirm correct error handling.
3. Fixes for Existing Overlaps:
* Board DTS (k3-am6xx): Adjusted load addresses for TI
firmware stubs to prevent conflicts. This resolves
previously undetected overlaps.
* `binman` Tests: Fixed several tests. U-Boot load
addresses were shifted to avoid ATF conflicts. A new
linker script for TEE ELF sections ensures distinct
memory layouts.
4. Documentation: Added guidance for developers on how to
determine ELF load addresses using readelf, linker scripts,
and objdump when working with binman FIT images.
Impact:
This series improves FIT image reliability by catching overlaps
at build time, helping developers resolve issues before runtime
failures.
Link: https://lore.kernel.org/r/[email protected]
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Fix memory overlaps in FIT image configurations for TI AM62x and AM64x
PHYCore and SK boards.
The overlaps occurred in two categories:
1. TI firmware stub images (tifsstub-hs, tifsstub-fs, tifsstub-gp):
These mutually exclusive firmware variants were incorrectly assigned
the same load address within FIT configurations, causing overlap
detection to fail. Adjust addresses with 64KB spacing:
- tifsstub-hs: Keep original address
- tifsstub-fs: Move to +64KB offset
- tifsstub-gp: Move to +128KB offset
2. Device tree overlay images (som-no-rtc, som-no-spi, som-no-eth):
These overlay files had insufficient spacing between load addresses,
causing actual memory overlaps. Increase spacing to 8KB boundaries
to accommodate overlay sizes safely.
An upcoming commit will validate if the memory region is overlapped
Signed-off-by: Aristo Chen <[email protected]>
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Prepare v2025.10-rc5
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The LPCG number on iMX93 and iMX91 is 127 not 122. The wrong
value is used in ccm_reg structure and Coverity reports several
issues as out-of-bounds write.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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The ELE MU driver needs to be probed at init_r phase as well because
some ELE APIs will be called.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Use fixed seq 0 and 1 for enetc PCI buses, then the seq for PCI controllers
could start after them.
Signed-off-by: Ye Li <[email protected]>
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We have to explicitly assign HSIOPLL_VCO as HSIOPLL parent. So when
enabling HSIOPLL, its parent HSIOPLL_VCO will be enabled firstly.
Signed-off-by: Ye Li <[email protected]>
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The ahab_commit command allows the user to commit into the SECO fuses
that control the SRK key revocation information. This is used to Revoke
compromised SRK keys.
To use ahab_commit, the boot container must be built with an SRK
revocation bit mask that is not 0x0. For the SPSDK provided by NXP, this
means setting the 'srk_revoke_mask' option in the config file used to
sign the boot container. The 'ahab_commit 0x10' can then be used to commit
the SRK revocation information into the SECO fuses.
Signed-off-by: John Ripple <[email protected]>
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The config "GIC_V3" seems to be typo, and currently "GICV3" remains
disabled. This should be removed until needed.
Fixes: 5cd4a355e0f0 ("board: synquacer: Add DeveloperBox 96boards EE support")
Signed-off-by: Kunihiko Hayashi <[email protected]>
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into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/27673
- Switch to upstream devicetree for TH1520 platform
- Remove fdt_high env variable
- Support SMP on RISC-V cores with Zalrsc only
- Make MPFS Generic
- riscv: dts: starfive: prune redundant jh7110-common
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to defconfig
Add SYS_CPU automatic inclusion jh7110-u-boot.dtsi to item of config list
DEVICE_TREE_INCLUDES as starfive-visionfive2-u-boot.dtsi and rename file.
Signed-off-by: E Shattow <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Drop visionfive2 per-board -u-boot.dtsi stubs and instead rely on
automatic inclusion of jh7110-u-boot.dtsi
Signed-off-by: E Shattow <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Sync automatic dtsi inclusion overrides for JH7110 CPU with upstream
"riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot
loader" from upstream Linux conor/riscv-dt-for-next commit 8181cc2f3f21
Signed-off-by: E Shattow <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Prune jh7110-common-u-boot.dtsi (clocks, qspi flash, eeprom, and
bootph-pre-ram hints now upstream since devicetree-rebasing v6.16).
In preparation for removal of per-dts jh7110-*-u-boot.dtsi replace include
by next dependency jh7110-u-boot.dtsi in automatic dtsi inclusion order.
Signed-off-by: E Shattow <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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This patch remove the unused macro DRAM_BASE.
Signed-off-by: Greentime Hu <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Make all Icicle Kit files generic. This supports the addition of
upcoming support for other MPFS boards.
Signed-off-by: Jamie Gibbons <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Add an alternative implementation that use Zalrsc extension only for
HART lottery and SMP locking to support SMP on cores without "Zaamo"
extension available. The Zaamo implementation is still prioritized if
both of them are available, since it takes fewer instructions.
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Ratified on Apr. 2024, the original RISC-V "A" extension is now split
into two separate extensions, "Zaamo" for atomic operations and "Zalrsc"
for load-reserved/store-conditional instructions.
For now, we've already seen real-world designs implement the Zalrsc
extension only[2]. As U-Boot mainly runs with only one HART, we could
easily support these designs by not using AMO instructions in the
hard-written assembly if necessary, for which this patch introduces two
new Kconfig options to indicate the availability of "Zaamo" and "Zalrsc".
Note that even with this patch, "A" extension is specified in the ISA
string passed to the compiler as long as one of "Zaamo" or "Zalrsc" is
available, since they're only recognized with a quite recent version of
GCC/Clang. The compiler usually doesn't automatically generate atomic
instructions unless the source explicitly instructs it to do so, thus
this should be safe.
Link: https://github.com/riscv/riscv-zaamo-zalrsc/commit/d94c64c63e9120d56bdeb540caf2e5dae60a8126 # [1]
Link: https://lore.kernel.org/u-boot/[email protected]/ # [2]
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Imply OF_UPSTREAM in platform Kconfig option and adapt existing boards
to use the correct upstream devicetree paths.
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Add flash0 partitions for stm32mp257f-ev1-u-boot.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Replace RIFSC check access APIs by grant/release access ones that handle
the RIF semaphores.
Signed-off-by: Gatien Chevallier <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Fix RIFSC semaphores acquisition by not returning an error when the
current CID already possess the semaphore. Also fix an incorrect mask
for the CID value in the SEMCR register.
Signed-off-by: Gatien Chevallier <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27660
- Restore the support for the i.MX95 A0 silicon.
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Enable HBMC in the R5 SPL stage
Fixes: c9df79ee64d0 ("arm: dts: k3-j721e-r5-common: Add HBMC overrides for R5 SPL")
Signed-off-by: Anurag Dutta <[email protected]>
Reviewed-by: Udit Kumar <[email protected]>
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This patch is used to restore support for i.MX95 A0 silicon. To avoid
duplicating defconfig, imx95.config is added and can be shared between
imx95_a0_19x19_evk_defconfig and imx95_19x19_evk_defconfig.
container.cfg and imximage.cfg are used to created .cfgout files that
are be passed to mkimage with -n to build flash.bin. Now they have been
deleted and replaced by adding their content to properties of node which
type is nxp-imx9image under binman node.
Fixes: 9936724aa9b ("imx95_evk: Add i.MX95 B0 support")
Signed-off-by: Alice Guo <[email protected]>
Tested-By: Tim Harvey <[email protected]> # imx95-19x19-evk (rA0)
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fdtdec_get_addr_size uses architecture dependent datatypes which causes
the 32-bit R5 to fail when reading the 64-bit size and addr fields of
reg nodes from the fdt.
Therefore change it to a common api for both 64 and 32 bit platforms to
allow for fdt fixups from R5.
Fixes: 8b0fc29de0e3 ("arm: mach-k3: am62: Fixup TF-A/OP-TEE reserved-memory node in FDT")
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
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SPL recover data section is broken which causes reboot failure on
some i.MX platforms (iMX8QM/iMX95).
The global variable cold_reboot_flag is assigned to weak reset_flag
function which always return 1, so restore never been executed in
warm reboot.
Fixes: 1c37e59bfbba ("arm: armv8: Improve SPL data save and restore implementation")
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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While testing changes, I missed that Gitlab had failed CI with pytest
failures due to this change.
This reverts commit 4c822970d366415e717730606734e815993a70bb.
Cc: Osama Abdelkader <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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use env_get() instead of getenv() for consistency.
Signed-off-by: Osama Abdelkader <[email protected]>
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Steffen Kothe <[email protected]> says:
AM64X hereby receives support for reset reason printing during boot.
Unfortunately does the AM64X register mapping slighlty differ from
the AM62X. WDT and PORZ are not part of the reset source register, but
the mapping remains the same for all other causes.
To prevent ifdef/else constructs, I decided to follow a simple
copy/paste approach and adjusted the logic accordingly.
Link: https://lore.kernel.org/r/[email protected]
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Implement get_reset_reason() for AM64x to enable reporting of the reset
cause in the cpuinfo output.
Notice that the AM64x does not support dedicated reset cause bits for
WDT and PORZ as the AM62x does.
An explanation of this difference is not part of the technical reference
manual and remains unclear.
Signed-off-by: Steffen Kothe <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
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AM64X SoCs use similar but not identical bit mappings like the AM62X
family.
In detail does the AM64X not support PORZ and WDT as reset caused.
Add the mapping according to the technical reference manual into the
SoC specific header.
Signed-off-by: Steffen Kothe <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
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Increase max resasg_entries to accommodate max size of
largest device J784S4.
Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/resasg_types.html
Reported-by: Jared McArthur <[email protected]>
Signed-off-by: Udit Kumar <[email protected]>
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Currently logic in spl_mmc_boot_mode only lookes at main devstat
to determine the bootmode to return. Thus, when using: 'eMMC boot'
as primary boot mode and 'MMCSD boot from eMMC UDA' as backup
boot mode, 'eMMC boot' is always selected. Add check for bootindex
to determine if ROM boot via backup boot mode and return MMCSD_MODE_FS
which is the only supported backup bootmode with eMMC device.
Signed-off-by: Judith Mendez <[email protected]>
Reviewed-by: Anshul Dalal <[email protected]>
Reviewed-by: Moteen Shah <[email protected]>
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Anshul Dalal <[email protected]> says:
On various TI's K3 platforms boot failure was observed on SPI NOR since the
commit 5609f200d062 ("arm: Kconfig: enable LTO for ARCH_K3"). This issue was
root caused to stack corruption by the 'udma_transfer' function. Where the local
variable 'paddr' of type 'dma_addr_t' was being written to as a 64-bit value
which overwrote the stack frame of the caller (dma_memcpy) as only 32-bits had
been reserved for paddr on the stack, specifically the r4 register in the frame
of dma_memcpy was being overwritten with a 0.
drivers/dma/ti/k3-udma.c:2192:
int udma_transfer(...)
{
...
dma_addr_t paddr = 0;
...
/* paddr was written to as 64-bit value here */
udma_poll_completion(uc, &paddr);
}
drivers/dma/dma-uclass.c:234:
int dma_memcpy(...)
{
dma_addr_t destination;
dma_addr_t source;
int ret;
...
/* This call resolves to udma_transfer */
ret = ops->transfer(...);
...
dma_unmap_single(destination, ...);
dma_unmap_single(...);
return ret;
}
Enabling LTO changed how gcc mapped local variables of dma_memcpy to CPU
registers, where earlier the bug was hidden since the overwritten register
'r4' was allotted to 'ret' but was allotted to 'destination' once LTO was
enabled. And since the overwritten value was 0, the bug remained undetected
as it just meant ret was 0, but having 'destination' set to 0 caused
dma_unmap_single to fail silently leading to boot failures.
The fix entails enabling DMA_ADDR_T_64BIT which changes dma_addr_t from u32 to
u64 for the R5 SPL thus reserving enough space for 'paddr' to prevent the
overflow.
Link: https://lore.kernel.org/r/[email protected]
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ARCH_K3 encompasses both 32 and 64-bit cores on the same SoC, though the
DMA addresses are always 64-bit in size.
With the current implementation, the R5 SPL uses a u32 for dma_addr_t
which leads to data overflow when functions such as k3_nav_*_pop_mem try
to write a 64-bit address to dma_addr_t variable.
In certain cases it leads to stack corruption which manifest as boot
failures on certain compilers, such as SPI boot on GCC 14.2 or 13.3.
Therefore this patch selects CONFIG_DMA_ADDR_T_64BIT for all ARCH_K3.
Fixes: ffcc66e8fec5 ("dma: ti: add driver to K3 UDMA")
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Prasanth Babu Mantena <[email protected]>
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Brock reports a breakage on an RK3568 SoC. His patch is
correct but he never followed up on the requested changes.
We currently use ldr to calculate the address of __bss_start and
__bss_end. However the absolute addresses of the literal pool are never
relocated and we end up clearing the wrong memory section. Use
PC-relative addressing instead.
Link: https://lore.kernel.org/u-boot/zfknlzcemnnaka5w2er5wjwefwoidrpndc4gjhx6d5xr6nlcjr@pasfayjiutii/
Suggested-by: brock_zheng <[email protected]>
Reported-by: brock_zheng <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Prepare v2025.10-rc4
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- Fix issues reported by smatch
- exynos4210-origen cleanups
- e850-96 improvements
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Add new imx8mp-libra-fpsc board.
Bootph tags as well as USB device tree nodes are in u-boot.dtsi for now
and will be removed when upstreamed.
The Libra i.MX 8M Plus FPSC is a single board computer. It uses an i.MX
8M Plus FPSC [1] System on Module which utilizes the FPSC standard [2].
[1] https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-8m-plus-fpsc
[2] https://www.phytec.eu/en/produkte/system-on-modules/fpsc
Signed-off-by: Benjamin Hahn <[email protected]>
Reviewed-by: Teresa Remmet <[email protected]>
Tested-by: Teresa Remmet <[email protected]>
Signed-off-by: Yannic Moog <[email protected]>
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Clean-up "imx93-phyboard-segin-u-boot.dtsi" internal device-tree from
nodes already part of the upstream device-tree since commit 79f3e77133bd
("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream"). No
functional change is made with this commit.
Signed-off-by: Primoz Fiser <[email protected]>
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