Merge tag 'v2025.10-rc5' into next

Prepare v2025.10-rc5

12 files changed, 56 insertions, 41 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 40368abc297..625d2e995d2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -833,6 +833,7 @@ config ARCH_K3
 	select FIT
 	select REGEX
 	select FIT_SIGNATURE if ARM64
+	select DMA_ADDR_T_64BIT
 	select LTO
 	imply TI_SECURE_DEVICE
 	imply DM_RNG if ARM64
@@ -2003,7 +2004,6 @@ config ARCH_SYNQUACER
 	bool "Socionext SynQuacer SoCs"
 	select ARM64
 	select DM
-	select GIC_V3
 	select PSCI_RESET
 	select SYSRESET
 	select SYSRESET_PSCI
diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c
index 492353c93df..f4009e89a98 100644
--- a/arch/arm/cpu/armv8/spl_data.c
+++ b/arch/arm/cpu/armv8/spl_data.c
@@ -11,15 +11,15 @@ char __data_save_end[0] __section(".__data_save_end");
 
 u32 cold_reboot_flag = 1;
 
-u32 __weak reset_flag(void)
+u32 __weak reset_flag(u32 flag)
 {
-	return 1;
+	return flag;
 }
 
 void spl_save_restore_data(void)
 {
 	u32 data_size = __data_save_end - __data_save_start;
-	cold_reboot_flag = reset_flag();
+	cold_reboot_flag = reset_flag(cold_reboot_flag);
 
 	if (cold_reboot_flag == 1) {
 		/* Save data section to data_save section */
diff --git a/arch/arm/dts/imx95-u-boot.dtsi b/arch/arm/dts/imx95-u-boot.dtsi
index 27f8209b19c..591cb317508 100644
--- a/arch/arm/dts/imx95-u-boot.dtsi
+++ b/arch/arm/dts/imx95-u-boot.dtsi
@@ -52,15 +52,47 @@
 			pad-byte = <0x00>;
 
 			spl {
-				align = <0x400>;
-				align-size = <0x400>;
-				type = "mkimage";
-				args = "-n spl/u-boot-spl.cfgout -T imx8image";
+				type = "nxp-imx9image";
+				cfg-path = "spl/u-boot-spl.cfgout";
+				args;
+
+#ifndef CONFIG_IMX95_A0
+				cntr-version = <2>;
+#endif
+				boot-from = "sd";
+				soc-type = "IMX9";
+#ifdef CONFIG_IMX95_A0
+				append = "mx95a0-ahab-container.img";
+#else
+				append = "mx95b0-ahab-container.img";
+#endif
+				container;
+#ifndef CONFIG_IMX95_A0
+				dummy-ddr;
+#endif
+				image0 = "oei", "m33-oei-ddrfw.bin", "0x1ffc0000";
+				hold = <0x10000>;
+#ifdef CONFIG_IMX95_A0
+				image1 = "oei", "oei-m33-tcm.bin", "0x1ffc0000";
+#endif
+				image2 = "m33", "m33_image.bin", "0x1ffc0000";
+				image3 = "a55", "spl/u-boot-spl.bin", "0x20480000";
+				dummy-v2x = <0x8b000000>;
 			};
 
 			u-boot {
-				type = "mkimage";
-				args = "-n u-boot-container.cfgout -T imx8image";
+				type = "nxp-imx9image";
+				cfg-path = "u-boot-container.cfgout";
+				args;
+
+#ifndef CONFIG_IMX95_A0
+				cntr-version = <2>;
+#endif
+				boot-from = "sd";
+				soc-type = "IMX9";
+				container;
+				image0 = "a55", "bl31.bin", "0x8a200000";
+				image1 = "a55", "u-boot.bin", "0x90200000";
 			};
 		};
 	};
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index c775432505b..e4f799dfb27 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -52,6 +52,7 @@
 };
 
 &hbmc {
+	status = "okay";
 	reg = <0x0 0x47040000 0x0 0x100>,
 		<0x0 0x50000000 0x0 0x8000000>;
 	ranges = <0x0 0x0 0x0 0x50000000 0x4000000>,
diff --git a/arch/arm/include/asm/arch-imx9/clock.h b/arch/arm/include/asm/arch-imx9/clock.h
index ffaf6b5f7d8..ddc84d2c9ed 100644
--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -111,7 +111,7 @@ struct ccm_reg {
 	u32 reserved_3[192];
 	struct ccm_lpcg_oscpll clk_oscplls[19]; /* 0x5000 */
 	u32 reserved_4[2768];
-	struct ccm_lpcg_oscpll clk_lpcgs[122]; /* 0x8000 */
+	struct ccm_lpcg_oscpll clk_lpcgs[127]; /* 0x8000 */
 };
 
 struct ana_pll_reg_elem {
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 8bd85e889ab..fa2cdaba144 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -223,6 +223,10 @@ endif
 
 ifeq ($(CONFIG_ARCH_IMX9)$(CONFIG_ARCH_IMX8ULP), y)
 
+ifneq ($(and $(CONFIG_IMX95),$(CONFIG_BINMAN)),)
+SPL: spl/u-boot-spl.bin FORCE
+	$(call if_changed,mkimage)
+else
 quiet_cmd_cpp_cfg_imx9_check = CHECK    $@
 cmd_cpp_cfg_imx9_check = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -x c -o $@ $< && $(srctree)/tools/imx9_image.sh $@
 
@@ -244,6 +248,7 @@ u-boot-container.cfgout: $(IMX_CONTAINER_CFG) FORCE
 flash.bin: spl/u-boot-spl-ddr.bin container.cfgout FORCE
 	$(call if_changed,mkimage)
 endif
+endif
 
 else
 MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index e85cb0dd252..7640f9b84da 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -804,6 +804,7 @@ int imx8ulp_dm_post_init(void)
 	return 0;
 }
 EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8ulp_dm_post_init);
+EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, imx8ulp_dm_post_init);
 
 #if defined(CONFIG_XPL_BUILD)
 __weak void __noreturn jump_to_image(struct spl_image_info *spl_image)
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index 4e0e194690b..b6acbb20ff0 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -25,6 +25,9 @@ config IMX91
 	select ARCH_MISC_INIT
 	select ARMV8_SPL_EXCEPTION_VECTORS
 
+config IMX95_A0
+	bool "Support for i.MX95 A0 silicon version"
+
 config IMX95
 	bool
 	select ARCH_MISC_INIT
@@ -33,7 +36,7 @@ config IMX95
 	select DM_MAILBOX
 	select SCMI_FIRMWARE
 	select SPL_IMX_CONTAINER_USE_TRAMPOLINE
-	select IMX_PQC_SUPPORT
+	select IMX_PQC_SUPPORT if !IMX95_A0
 
 config SYS_SOC
 	default "imx9"
diff --git a/arch/arm/mach-imx/imx9/scmi/container.cfg b/arch/arm/mach-imx/imx9/scmi/container.cfg
deleted file mode 100644
index b25f3b726c5..00000000000
--- a/arch/arm/mach-imx/imx9/scmi/container.cfg
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2025 NXP
- */
-
-CNTR_VERSION 2
-BOOT_FROM SD
-SOC_TYPE IMX9
-CONTAINER
-IMAGE A55 bl31.bin 0x8a200000
-IMAGE A55 u-boot.bin CONFIG_TEXT_BASE
diff --git a/arch/arm/mach-imx/imx9/scmi/imximage.cfg b/arch/arm/mach-imx/imx9/scmi/imximage.cfg
deleted file mode 100644
index c2c92174c1c..00000000000
--- a/arch/arm/mach-imx/imx9/scmi/imximage.cfg
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2025 NXP
- */
-
-CNTR_VERSION 2
-BOOT_FROM SD
-SOC_TYPE IMX9
-APPEND mx95b0-ahab-container.img
-CONTAINER
-DUMMY_DDR
-IMAGE OEI m33-oei-ddrfw.bin 0x1ffc0000
-HOLD 0x10000
-IMAGE M33 m33_image.bin 0x1ffc0000
-IMAGE A55 spl/u-boot-spl.bin 0x20480000
-DUMMY_V2X 0x8b000000
diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c
index 351848f16e6..48f258a37b4 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -24,7 +24,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-u32 reset_flag(void)
+u32 reset_flag(u32 flag)
 {
 	/* Check rstmgr.stat for warm reset status */
 	u32 status = readl(SOCFPGA_RSTMGR_ADDRESS);
diff --git a/arch/arm/mach-socfpga/spl_agilex5.c b/arch/arm/mach-socfpga/spl_agilex5.c
index 2e3597e97eb..1be347360f5 100644
--- a/arch/arm/mach-socfpga/spl_agilex5.c
+++ b/arch/arm/mach-socfpga/spl_agilex5.c
@@ -21,7 +21,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-u32 reset_flag(void)
+u32 reset_flag(u32 flag)
 {
 	/* Check rstmgr.stat for warm reset status */
 	u32 status = readl(SOCFPGA_RSTMGR_ADDRESS);