summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2020-11-04arch: Move NEEDS_MANUAL_RELOC symbol to KconfigMichal Simek
CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be able to use compile-time checks to reduce the number of build paths. Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-11-02Merge tag 'u-boot-atmel-fixes-2021.01-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel fixes for 2021.01 cycle: This specific feature set includes the patches for DT required to fix the warnings for newer DTC version (1.6.0+), i2c and spi bus unit address.
2020-11-02ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: sam9260ek: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: sama5d3xmb: fix I2C bus unit addressEugen Hristev
w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: gurnard: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: at91sam9g25ek: fix I2C bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: at91sam9261ek: fix SPI unit address warningEugen Hristev
w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-02ARM: dts: at91: vinco: fix I2C warning bus unit addressEugen Hristev
w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32" Signed-off-by: Eugen Hristev <[email protected]>
2020-11-01board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2Sebastian Reichel
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor series (GE Bx50). It consists of a carrier PCB used in combination with a Congatec QMX6 SoM. This adds U-Boot support using device model everywhere and SPL for memory initialization. Proper configuration is provided as 'ge_b1x5v2_defconfig' and the combined image u-boot-with-spi.imx can be flashed directly to 1024 byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can be loaded separately via USB-OTG using e.g. imx_usb. Signed-off-by: Sebastian Reichel <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2020-11-01imx6: allow usage of disable_ldb_di_clock_sources for CONFIG_MX6QDLSebastian Reichel
Allow using disable_ldb_di_clock_sources with just the combined CONFIG_MX6QDL being enabled. Signed-off-by: Sebastian Reichel <[email protected]>
2020-11-01board: phytec: imx8mm: Add PHYTEC phyCORE-i.MX8MM supportTeresa Remmet
Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <[email protected]>
2020-11-01ARM: imx: Add support for the primary/secondary bmode to MX53Marek Vasut
Implement the 'getprisec' subcommand of 'bmode' command for i.MX53 and also the primary/secondary bootmode switching. Signed-off-by: Marek Vasut <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: NXP i.MX U-Boot Team <[email protected]> Cc: Peng Fan <[email protected]> Cc: Stefano Babic <[email protected]>
2020-11-01dts: Provide LED DTS description for HSC and DDC imx53 devicesLukasz Majewski
Those two LEDs are used to indicate U-Boot's boot stage. Signed-off-by: Lukasz Majewski <[email protected]>
2020-11-01mx7ulp: clock: Align the PLL_USB frequencyFabio Estevam
The command 'clocks' shows the following output: => clocks PLL_A7_SPLL 528 MHz PLL_A7_APLL 529 MHz PLL_USB 0 MHz Add some extra spaces so that the PLL_USB information gets aligned with the previous reported frequencies. Signed-off-by: Fabio Estevam <[email protected]>
2020-11-01mx7ulp: clock: Remove unuseful informationFabio Estevam
The command 'clocks' shows the following output: => clocks PLL_A7_SPLL 528 MHz PLL_A7_APLL 529 MHz PLL_USB 0 MHz .... [do_mx7_showclocks] addr = 0x9FFB61F1 The last line is not useful at all, so just remove it. Signed-off-by: Fabio Estevam <[email protected]>
2020-11-01imx: cpu: terminate line with CR if invalid temp sensorTim Harvey
Ensure we terminate the line with a CR if we get an invalid sensor device or reading. Signed-off-by: Tim Harvey <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2020-11-01mx6: peripheral clock from oscillatorJorge Ramirez-Ortiz
In order to be able to run the I2C bus at 400Khz, the chip errata[1] recommends that the peripheral clock runs out of the 24MHz oscillator. Systems running I2C from OP-TEE before Linux executes - for example to access a Secure Element [2] providing the cryptographic support - expect this clock to be configured by the bootloader [3]. [1] IMX6SLCE Rev. 5, 02/2019, ERR007805. [2] OP-TEE: support for NXP SE05X Plug and Trust (patch on the list). [3] OP-TEE: check the imx_i2c.c driver (imx6 patch on the list). Signed-off-by: Jorge Ramirez-Ortiz <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2020-10-30Merge tag 'u-boot-rockchip-20201031' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - New PX30 board: Engicam PX30.Core; - Fix USB HID support for rock960; - Remove host endianness dependency for rockchip mkimage; - dts update for rk3288-tinker; - Enable console MUX for some ROCKPi boards; - Add config-based ddr selection for px30;
2020-10-30Merge tag 'dm-pull-30oct20' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm of-platdata and dtoc improvements sandbox SPL tests binman support for compressed sections
2020-10-30rockchip: Add Engicam PX30.Core C.TOUCH 2.0Jagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <[email protected]> Signed-off-by: Suniel Mahesh <[email protected]> Reviewed-by: Kever Yang<[email protected]>
2020-10-30arm64: dts: rockchip: px30: Add Engicam C.TOUCH 2.0Jagan Teki
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose carrier board with capacitive touch interface. Genaral features: - TFT 10.1" industrial, 1280x800 LVDS display - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector SOM's like PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]> Reviewed-by: Kever Yang<[email protected]>
2020-10-30rockchip: Add Engicam PX30.Core EDIMM2.2 Starter KitJagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <[email protected]> Signed-off-by: Suniel Mahesh <[email protected]> Reviewed-by: Kever Yang<[email protected]>
2020-10-30rockchip: px30: Add EVB_PX30 Kconfig helpJagan Teki
TARGET_EVB_PX30 can be possible to use other px30 boards. Add the help text for existing EVB, so-that the new boards which are resuing this config option can mention their board help text. This would help to track which boards are using EVB_PX30 config. Signed-off-by: Jagan Teki <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2020-10-30arm64: dts: rockchip: Add Engicam PX30.Core SOMMichael Trimarchi
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. General features: - Rockchip PX30 - Up to 2GB DDR4 - eMMC 4 GB expandible - rest of PX30 features PX30.Core needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 - C.TOUCH 2.0 Add support for it. Signed-off-by: Jagan Teki <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2020-10-30arm64: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter KitJagan Teki
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out SOM's like PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2020-10-30arm64: dts: rockchip: Add chosen node for ROCK-Pi N8Jagan Teki
Add chosen node in -u-boot.dtsi for ROCK-Pi N8 board. This will help to get serial out messages. Signed-off-by: Jagan Teki <[email protected]> Reviewed-by: Kever Yang<[email protected]>
2020-10-30rockchip: dts: tinker: remove unnecessary nodeStefan Agner
The property reg-shift with the same value is present in the base device tree already. Remove unnecessary node from rk3288-tinker.dts. Signed-off-by: Stefan Agner <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2020-10-30rockchip: dts: tinker: move i2c node to shared device treeStefan Agner
The I2C EEPROM is present on Tinker Board S as well. Move the i2c node to the shared, U-Boot specific rk3288-tinker-u-boot.dtsi device tree. Cc: Jonas Karlman <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2020-10-29imx: mx6cuboxi: Disable thermal driver in SPLSimon Glass
This feature is incompatble with of-platdata since it uses the U_BOOT_DEVICE() macro. With of-platdata the only devices permitted are those created by dtoc. The driver is not used in SPL anyway, so exclude it from that build. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2020-10-29x86: apl: Take advantage of the of-platdata parent supportSimon Glass
Now that parent devices are supported with of-platadata, we don't need the messy code to fix up the parent pointers and allocations on Apollo Lake. Put the code behind a condition. Signed-off-by: Simon Glass <[email protected]>
2020-10-29x86: apl: Enable SPI flash in TPL with APL_SPI_FLASH_BOOTSimon Glass
At present, enabling CONFIG_APL_SPI_FLASH_BOOT does not build since SPI and SPI flash are not enabled for TPL. Add a condition to fix this and tidy up a build warning in the SPI-flash driver. Signed-off-by: Simon Glass <[email protected]>
2020-10-29dm: Add a test for of-platdata parent informationSimon Glass
Add a simple test that we can obtain the correct parent for an I2C device. This requires updating the driver names to match the compatible strings, adding them to the devicetree and enabling a few options. Signed-off-by: Simon Glass <[email protected]>
2020-10-29dm: test: Add a test for of-platdata phandlesSimon Glass
We have a test in dtoc for this feature, but not one in U-Boot itself. Add a simple test that checks that the information comes through correctly. Signed-off-by: Simon Glass <[email protected]>
2020-10-29dm: test: Drop of-platdata pytestSimon Glass
Now that we have a C version of this test, drop the Python implementation. Signed-off-by: Simon Glass <[email protected]>
2020-10-29sandbox: Allow selection of SPL unit testsSimon Glass
Now that we have more than one test, add a way to select the test to run. Signed-off-by: Simon Glass <[email protected]>
2020-10-29dm: test: Add a way to run SPL testsSimon Glass
Add a -u flag for U-Boot SPL which requests that unit tests be run. To make this work, export dm_test_main() and update it to skip test features that are not used with of-platdata. To run the tests: $ spl/u-boot-spl -u U-Boot SPL 2020.10-rc5 (Oct 01 2020 - 07:35:39 -0600) Running 0 driver model tests Failures: 0 At present there are no SPL unit tests. Note that there is one wrinkle with these tests. SPL has limited memory available for allocation. Also malloc_simple does not free memory (free() is a nop) and running tests repeatedly causes driver-model to reinit multiple times and allocate memory. Therefore it is not possible to run more than a few tests at a time. One solution is to increase the amount of malloc space in sandbox_spl. This is not a problem for pytest, since it runs each test individually, so for now this is left as is. Signed-off-by: Simon Glass <[email protected]>
2020-10-29sandbox: make SDL window resizableHeinrich Schuchardt
Without resizing the SDL window showed by ./u-boot -D -l is not legible on a high resolution screen. Allow resizing the window Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch) - Armada 8k: Use ATF serdes init instead of the "old" U-Boot version (Baruch) - Minor update to Octeon TX/TX2 defconfig (Stefan)
2020-10-29Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Bug fixes and updates on vid, ls1088a lx2160a and other layerscape platforms. - Add optee_rpmb support for LX2 & Kontron sl28 support
2020-10-29xilinx: Consolidate board_fit_config_name_match() for Xilinx platformsMichal Simek
Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <[email protected]>
2020-10-29arm: dts: armada-cp110-master: update nand-controllerBaruch Siach
Align node properties to kernel dts node. The change of compatible property does not affect any currently supported board. Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility with the current driver. Reviewed-by: Stefan Roese <[email protected]> Signed-off-by: Baruch Siach <[email protected]>
2020-10-29arm: dts: armada-cp110-slave: add missing cps_nandShmuel Hazan
Align node properties to kernel dts node. Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility with the current driver. Reviewed-by: Stefan Roese <[email protected]> Signed-off-by: Shmuel Hazan <[email protected]> Signed-off-by: Baruch Siach <[email protected]>
2020-10-28test: Add tests for the multiplexer frameworkJean-Jacques Hiblot
Provide tests to check the behavior of the multiplexer framework. Two sets of tests are added. One is using an emulated multiplexer driver that can be used to test basic functionality like select, deselect, etc. The other is using the mmio mux which adds tests specific to it. Signed-off-by: Jean-Jacques Hiblot <[email protected]> Signed-off-by: Pratyush Yadav <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2020-10-27xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARMMichal Simek
There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <[email protected]>
2020-10-27arm64: zynqmp: Fix zynqmp mini qspi max frequencyT Karthik Reddy
For zynqmp qspi, frequencies up to 40MHz will work irrespective of feedback clock enabled or disabled. If we want higher than 40Mhz the feedback clock should be enabled. With spi-max-frequency 108MHz it is not working when the feedback clock is disabled. Change it to 40MHz so that it works irrespective of feedback clock enabled or disabled. Signed-off-by: T Karthik Reddy <[email protected]> Acked-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-10-27arm64: zynqmp: Add support for SHA3 commandT Karthik Reddy
This patch adds support for SHA3 command. It takes data blob as input and generates 48 bytes sha3 hash value. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]>
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-12 08:42:13 +0000