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The board/altera/socfpga directory is not a generic SoCFPGA machine
anymore, but instead it represents the Altera SoCDK board. To make
matters more complicated, it represents both CycloneV and ArriaV
variant.
On the other hand, nowadays, the content of this board directory is
mostly comprised of QTS-generated header files, while all the generic
code is in arch/arm/mach-socfpga already.
Thus, this patch splits the board/altera/socfpga into a separate
board directory for ArriaV SoCDK and CycloneV SoCDK, so that each
can be populated with the correct QTS-generated header files for
that particular board.
Signed-off-by: Marek Vasut <[email protected]>
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Move the wrappers for QTS-generated files into platform directory
out of the board directory. The trick here is to add -I to CFLAGS
such that it points to the board directory in source tree and thus
the qts/ directory there is still reachable.
Signed-off-by: Marek Vasut <[email protected]>
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Fix build error for socfpga_cyclone5_defconfig:
board/altera/socfpga/wrap_sdram_config.c:245:26: error: ‘RW_MGR_MEM_NUMBER_OF_RANKS’ undeclared here (not in a function)
make[2]: *** [spl/board/altera/socfpga/wrap_sdram_config.o] Error 1
Signed-off-by: Dinh Nguyen <[email protected]>
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Introduce structure socfpga_sdram_misc_config to wrap the remaining
misc configuration values in board file. Again, introduce a function,
socfpga_get_sdram_misc_config(), which returns this the structure. This
is almost the final step toward wrapping the nasty QTS generated macros
in board files and reducing the pollution of the namespace.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
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Introduce structure socfpga_sdram_io_config to wrap the IO configuration
values in board file. Introduce socfpga_get_sdram_io_config() function,
which returns this the structure. This is another step toward wrapping
the nasty QTS generated macros in board files and reducing the pollution
of the namespace.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
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Introduce structure socfpga_sdram_rw_mgr_config to wrap the RW manager
configuration values in board file. Introduce a complementary function,
socfpga_get_sdram_rwmgr_config(), which returns this the structure.
This is another step toward wrapping the nasty QTS generated macros
in board files and reducing the pollution of the namespace.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
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Introduce two wrapper functions, socfpga_get_seq_ac_init() and
socfpga_get_seq_inst_init() to avoid direct inclusion of the
sequencer_auto_ac_init.h and sequencer_auto_inst_init.h QTS
generated files. This reduces namespace pollution again.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
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Move the files generated by QTS into the board directory, they should not
be part of the driver files at all.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
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Introduce socfpga_sdram_get_config() function implement in a board file,
which returns the socfpga_sdram_config structure. This is the last step
in cleaning up the socfpga_mmr_init_full(), but not the last step which
allows removing the inclusion of sdram.h from drivers/ddr/altera/sdram.c
thus far.
Signed-off-by: Marek Vasut <[email protected]>
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Implement new accessor, sysmgr_get_pinmux_table(), used to obtain pinmux
table and it's size from the QTS-generated pinmux_config.c. The target
here is again to get rid of poluting global namespace by including the
pinmux_config.h into it.
Furthermore, the pinmux_config.h declares some CONFIG_HPS_* macros,
which are explicitly useless to us in U-Boot. Instead, U-Boot does
use DT to detect exactly these configuration options. This patch
makes sure that while this QTS-generated file can stay in the tree,
these obscure macros do not ooze into the namespace anymore.
Signed-off-by: Marek Vasut <[email protected]>
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Introduce accessor iocsr_get_config_table() for retrieving IOCSR config
tables. This patch is again trimming down the namespace polution.
The IOCSR config tables are used only by scan manager, they are generated
by qts and are board specific. Before this patch, the approach to use
these tables in scan manager was to define an extern variable to silence
the compiler and compile board-specific iocsr_config.c into U-Boot which
defined those extern variables. Furthermore, since these are tables and
the scan manager needs to know the size of those tables, iocsr_config.h
is included build-wide.
This patch wraps all this into a single accessor which takes the scan
chain ID and returns pointer to the table and it's size. All this is
wrapped in wrap_iocsr_config.c board-specific file. The file includes
the iocsr_config.c (!) to access the original tables and transitively
iocsr_config.h . It is thus no longer necessary to include iocsr_config.h
build-wide and the namespace polution is trimmed some more.
Signed-off-by: Marek Vasut <[email protected]>
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Extract the clock configuration horribleness caused by pll_config.h in
the following manner.
First of all, introduce a few new accessors which return values of
various clocks used in clock_manager.c and use them in clock_manager.c .
These accessors replace those few macros which came from pll_config.h
originally. Also introduce an accessor which returns the struct cm_config
default configuration for the clock manager used in SPL.
The accessors are implemented in a board-specific wrap_pll_config.c
file, whose sole purpose is to include the qts-generated pll_config.h
and provide only the necessary values to the clock manager.
The purpose of this design is to limit the scope of inclusion for the
pll_config.h , which thus far was included build-wide and poluted the
namespace. With this change, the inclusion is limited to just the new
wrap_pll_config.c file, which in turn provides three simple functions
for the clock_manager.c to use.
Signed-off-by: Marek Vasut <[email protected]>
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This file is absolutelly positively board specific, so move it
into the correct place.
Signed-off-by: Marek Vasut <[email protected]>
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Move all the files generated by Quartus into the qts/ subdir of the
board/altera/socfpga dir to make them explicitly separate from the
generic U-Boot code.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
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Switch to a more standard way of board select; put the SoC select
into arch/arm/Kconfig and move the board select menu under
arch/arm/mach-socfpga/Kconfig.
Also, consolidate SYS_BOARD, SYS_VENDOR, SYS_SOC, SYS_CONFIG_NAME.
Signed-off-by: Masahiro Yamada <[email protected]>
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The compiler option "-Iboard/$(VENDOR)/$(BOARD)" just exists here
for iocsr_config.c to be able to include iocsr_config.h.
Use "..." instead of <...> to include a header in the same directory.
Signed-off-by: Masahiro Yamada <[email protected]>
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"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration"
mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct
value should be 79.
Signed-off-by: Dinh Nguyen <[email protected]>
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Add a stub s_init function in the board file. The reason why the stub function
is needed is that most of the work is now being done in board_init_f(), there
is no need for the SPL to do anything s_init(). However, since lowlevel_init()
is still branching to s_init(), we need stub function for now, until
lowlevel_init() morphs into s_init().
Signed-off-by: Dinh Nguyen <[email protected]>
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commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration"
incorrectly set the muxing for UART0 on the Cyclone V DK.
This fixes it up so UART0 is working again.
Signed-off-by: Dinh Nguyen <[email protected]>
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Add support for the Altera Arria V development kit.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
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Zap this unused empty function, no point in having it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
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Since all boards now have a DT, instead of hard-coding the board
name into the U-Boot binary, read the board name from DT "model"
property.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
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Drop the _cyclone5 suffix from socfpga_cyclone5.c since this file
will contain Arria 5 support as well.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
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Sync SoCFPGA Cyclone V development kit pinmux configuration with
Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR).
NOTE: This change is useless until we get proper SPL support, at
which point this will likely need further rework.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Cc: Pavel Machek <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
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Sync SoCFPGA Cyclone V development kit pinmux configuration with
Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR).
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Cc: Pavel Machek <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
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Replace multiple spaces with a single tab.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
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Add proper error checking into the PHY tuning patch. Make the PHY tunning only
happen in case the KSZ9021 PHY is enabled in config. Call the config callback
after the tuning finished.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Pavel Machek <[email protected]>
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Set the PHY skew settings for the ethernet phy on the SOCFPGA Cyclone5
hardware.
Signed-off-by: Dinh Nguyen <[email protected]>
Cc: Vince Bridgers <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Wolfgang Denk <[email protected]>
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Signed-off-by: Stefan Roese <[email protected]>
Cc: Marek Vasut <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Vince Bridgers <[email protected]>
Cc: Masahiro Yamada <[email protected]>
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Add example of an USB UDC configuration with DFU and UMS.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Vince Bridgers <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Cc: Stefan Roese <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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This commit introduces a Kconfig symbol for each ARM CPU:
CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136,
CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100.
Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected
for CPU_ARM1176 and CPU_V7.
For each target, the corresponding CPU is selected and the definition of
SYS_CPU in the corresponding Kconfig file is removed.
Also, it removes redundant "string" type in some Kconfig files.
Signed-off-by: Georges Savoundararadj <[email protected]>
Acked-by: Albert ARIBAUD <[email protected]>
Cc: Masahiro Yamada <[email protected]>
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Move icache_enable() and dcache_enable() function calls from
board code into the CPU code and into the enable_caches()
function. This is how the cache enabling code was designed
to work.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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The code is now fixed to the point where we can safely enable
the L1 data cache. Enable the D-Cache and set it as write-alloc.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Cosmetic change to the checkboard() function output. Align the
output with the rest of initial output produced by U-Boot.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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The bi_boot_params must point to offset 0x100 in DRAM. Make it so.
Signed-off-by: Pavel Machek <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
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Add some stub defines, which are used by the clock code, but are
missing from the auto-generated header file for the SoCFPGA family.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Pavel Machek <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
are specified in arch/Kconfig.
We can delete the ones in arch and board Kconfig files.
This commit can be easily reproduced by the following command:
find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
/config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
N
s/\n[[:space:]]*string//
}
'
Signed-off-by: Masahiro Yamada <[email protected]>
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Enable initialization fo designware ethernet controller. With this
patch, ethernet works in my configuration, provided I set ethernet
address in the environment.
Signed-off-by: Pavel Machek <[email protected]>
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To fix the build error when build for Altera dev kit, not
virtual target. At same time, set the build for Altera dev
kit as default instead virtual target. With that, U-Boot
is booting well and SPL still lack of few drivers.
Signed-off-by: Chin Liang See <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Albert Aribaud <[email protected]>
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We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.
The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.
After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.
TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.
Signed-off-by: Masahiro Yamada <[email protected]>
Suggested-by: Tom Rini <[email protected]>
Acked-by: Simon Glass <[email protected]>
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This commit adds:
- arch/${ARCH}/Kconfig
provide a menu to select target boards
- board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
set CONFIG macros to the appropriate values for each board
- configs/${TARGET_BOARD}_defconfig
default setting of each board
(This commit was automatically generated by a conversion script
based on boards.cfg)
In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.
But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Simon Glass <[email protected]>
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To move the arch common function away from board folder to
arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication
for other non Altera dev kit which is using socfpga device.
Signed-off-by: Chin Liang See <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Acked-by: Detlev Zundel <[email protected]>
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Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Wolfgang Denk <[email protected]>
CC: Pavel Machek <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Albert Aribaud <[email protected]>
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Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files
Signed-off-by: Chin Liang See <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
CC: Pavel Machek <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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- When CONFIG_DISPLAY_CPUINFO is not enabled,
print_cpuinfo() should be defined as an empty function
in a header, include/common.h
- Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif
from caller, common/board_f.c and arch/arm/lib/board.c
- Remove redundant prototypes in arch/arm/lib/board.c,
arch/arm/include/asm/arch-am33x/sys_proto.h and
board/nokia/rx51/rx51.h, keeping the one in include/common.h
- Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition
where it is missing
Signed-off-by: Masahiro Yamada <[email protected]>
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Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Andreas Bießmann <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Prafulla Wadaskar <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Vipin Kumar <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Tom Rini <[email protected]>
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Adding the generated pin mux configuration by Preloader
Generator tool
Signed-off-by: Chin Liang See <[email protected]>
Reviewed-by: Pavel Machek <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Cc: Wolfgang Denk <[email protected]>
CC: Pavel Machek <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Albert Aribaud <[email protected]>
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Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See <[email protected]>
Reviewed-by: Pavel Machek <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Cc: Wolfgang Denk <[email protected]>
CC: Pavel Machek <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Albert Aribaud <[email protected]>
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Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.
Signed-off-by: Dinh Nguyen <[email protected]>
Reviewed-by: Pavel Machek <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Wolfgang Denk <[email protected]>
CC: Pavel Machek <[email protected]>
Cc: Tom Rini <[email protected]>
v2:
- Add Reviewed-by: Pavel Machek
- Cc: Tom Rini
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