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2024-11-25board: phytec: phycore-imx8mm: Add EEPROM detection initialisationYunus Bas
Add EEPROM detection initialisation for phyCORE-i.MX8MM. Signed-off-by: Yunus Bas <[email protected]>
2024-11-25board: phytec: imx93: Add phyCORE-i.MX 93 support for all SOM variantsChristoph Stoidner
The phyCORE-i.MX 93 is available in various variants (e.g. different ram sizes, eMMC HS400 yes/no). Enable hardware introspection for the imx93-phyboard-segin_defconfig, so that during startup the SOM module variant can be detected, and the hardware can be configured accordingly. The resulting SPL and u-boot binary shall able to boot each phyCORE-i.MX 93 module variant on each carrier board. Finally rename imx93-phyboard-segin_defconfig to imx93-phycore_defconfig, to highlight its SOM scope. Signed-off-by: Christoph Stoidner <[email protected]> Reviewed-by: Wadim Egorov <[email protected]> Reviewed-by: Yannic Moog <[email protected]>
2024-11-25board: phytec: imx93: Add eeprom-based hardware introspectionChristoph Stoidner
The phyCORE-i.MX 93 is available in various variants. Relevant variant options for the spl/u-boot are: - with or without HS400 support for the eMMC - with 1GB ram chip, or 2GB ram chip The phyCORE's eeprom contains all information about the existing variant options. Add evaluation of the eeprom data to the spl/u-boot to enable/disable HS400 and to select the appropriate ram configuration at startup. Signed-off-by: Christoph Stoidner <[email protected]> Reviewed-by: Wadim Egorov <[email protected]> Reviewed-by: Yannic Moog <[email protected]> Tested-by: Primoz Fiser <[email protected]>
2024-11-25board: phytec: phycore-imx93: Add 2GB LPDDR4X RAM timingsChristoph Stoidner
The phyCORE-i.MX 93 is available with a 1GB ram chip or a 2GB ram chip. Add the ram timings for the 2GB chip, in form of a diff compared to the existing LPDDR4X 1GB timings. With that, the SPL can select the appropriate timings at startup. Update also the 1GB ram timings with new version of the DDR Tool. Signed-off-by: Christoph Stoidner <[email protected]> Tested-by: Primoz Fiser <[email protected]>
2024-11-14board: phytec: common: k3: Apply SoM-specific overlays to OS device treeWadim Egorov
Our SoMs are available in multiple configurations, managed via device tree overlays. To determine the specific variant in use, we read the EEPROM and apply the appropriate overlays during boot to the device tree used by the OS. Signed-off-by: Wadim Egorov <[email protected]> Acked-by: Neha Malcom Francis <[email protected]>
2024-10-11board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILDSimon Glass
Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass <[email protected]>
2024-09-19imx9: clock: Update clock init function and sequenceYe Li
Since we use SPEED GRADE fuse to set A55 frequency, remove the set_arm_core_low_drive_clk function which has hard coded frequency. And adjust clock_init called sequence and split it to early and late functions. Set the authen register in early function, because CCF driver checks NS bit. Set bus and core clock in late function, because the fuse read and SoC type/rev depend on ELE. Reviewed-by: Peng Fan <[email protected]> Signed-off-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2024-09-10Merge patch series "phycore-am62/4: Add more boot sources"Tom Rini
Daniel Schultz <[email protected]> says: This patch stack extends the phyCORE-AM62x/AM64x U-Boot by following boot sources: - Load U-Boot with USB DFU - Load a Linux and initramfs from OSPI/QSPI NOR flash - Load a Linux and rootfs from Network Moreover, it adds required changes to the environment to boot an A/B system with RAUC and includes some minor fixes.
2024-09-10board: phytec: phycore_am64x: Add Network/SPI BootDaniel Schultz
Include the boot logic to boot via Network or from a OSPI/QSPI NOR flash. Moreover, set all required variables to both boot methods to the environment. Note: The phyBOARD-Electra AM64x is not able to load the U-Boot via Network. However, it's still possible to load the kernel. Signed-off-by: Daniel Schultz <[email protected]>
2024-09-10board: phytec: phycore_am62x: Add Network/SPI BootDaniel Schultz
Include the boot logic to boot via Network or from a OSPI/QSPI NOR flash. Moreover, set all required variables to both boot methods to the environment. Signed-off-by: Daniel Schultz <[email protected]>
2024-08-30board: phytec: phycore_imx8mp: Add mtd spi partitionsBenjamin Hahn
Depending on if a SPI-NOR flash is populated add the mtd partition table to the device tree. For this we have to also probe the flash before booting. Signed-off-by: Benjamin Hahn <[email protected]>
2024-08-23board: phytec: phycore_imx8mp: Add mcore supportYashwanth Varakala
Added m7 core support in uboot for imx8mp by adding the boot variable prepare_mcore. Based on commit 0ed32cc8568a ("LF-6555 imx8m[m/n/p/q]_evk: add bootargs to support mcore") Signed-off-by: Yashwanth Varakala <[email protected]>
2024-07-22board: phytec: phycore_am64x: Use k3_mmc.env logicDaniel Schultz
Use our common environment file to implement MMC boot. Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Wadim Egorov <[email protected]>
2024-07-22board: phytec: phycore_am62x: Use k3_mmc.env logicDaniel Schultz
Use our common environment file to implement MMC boot. Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Dhruva Gole <[email protected]> Reviewed-by: Wadim Egorov <[email protected]>
2024-07-22board: phytec: renaming of variables according to bootstd docBenjamin Hahn
Rename existing environment variables according to the bootstd doc. Renamed variables are fdto_addr, bootenv_addr, fdt_addr and fdt_file. Signed-off-by: Benjamin Hahn <[email protected]> Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Wadim Egorov <[email protected]>
2024-07-22phycore_imx93: include common overlays.envBenjamin Hahn
Include the common overlays env file for phycore_imx93. The common overlays env file supports disabling loading overlays by setting the no_overlays variable. Signed-off-by: Benjamin Hahn <[email protected]> Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Wadim Egorov <[email protected]>
2024-07-22phycore-imx8mp: Add overlay and bootenv.txt supportBenjamin Hahn
Add support for loading bootenv.txt as well as loading and applying overlays during boot from mmc and net. ${no_bootenv}: Prevent loading external bootenv.txt environment. Use ${overlays} variable directly from u-boot environment. ${no_overlay}: Do not load overlays defined in ${overlays} variable. Overlays loaded over the extension command are still being applied. Signed-off-by: Benjamin Hahn <[email protected]> Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Teresa Remmet <[email protected]> Reviewed-by: Wadim Egorov <[email protected]>
2024-07-16Merge patch series "configs: phycore_am62x_a53: Add more commands"Tom Rini
2024-07-16board: phytec: phycore_am64x: Move earlycon into own variableDaniel Schultz
By moving the earlycon definition into a dedicated variable, it's easier to change these values in case the kernel should print on a different serial interface. Signed-off-by: Daniel Schultz <[email protected]>
2024-07-16board: phytec: phycore_am62x: Move earlycon into own variableDaniel Schultz
By moving the earlycon definition into a dedicated variable, it's easier to change these values in case the kernel should print on a different serial interface. Signed-off-by: Daniel Schultz <[email protected]>
2024-07-10board: phytec: k3: k3_ddrss_patch: Add ddr phy reg countDominik Haller
Add and use the correct number of ddr phy registers to update the corresponding settings. Fixes: cbf5c99ef317 ("board: phytec: common: Introduce a method to inject DDR timings deltas") Signed-off-by: Dominik Haller <[email protected]> Reviewed-by: Wadim Egorov <[email protected]>
2024-06-18board: phytec: phycore-am62x: Use memory nodes in higher boot stagesWadim Egorov
There is no need to reread the EEPROM multiple times in different stages to detect the RAM size. We can do this once at an early stage and let higher stages decode memory nodes using fdtdec. Make sure to pass fixup memory nodes before passing to u-boot stage. Signed-off-by: Wadim Egorov <[email protected]> Reviewed-by: Daniel Schultz <[email protected]>
2024-06-18board: phytec: phycore-am62x: Pull in k3_dfu.envWadim Egorov
Pull in ti/k3_dfu.env for dfu_alt_info_ram in SPL stage. Signed-off-by: Wadim Egorov <[email protected]> Reviewed-by: Daniel Schultz <[email protected]>
2024-06-18board: phytec: phycore-am62x: Fix CONFIG_SPL_BOARD_INITWadim Egorov
Make sure spl_board_init() gets compiled by enabling missing CONFIG_SPL_BOARD_INIT and including hardware.h. Fixes: 085cd6459dae ("board: phytec: am62x: Add PHYTEC phyCORE-AM62x SoM") Signed-off-by: Wadim Egorov <[email protected]> Reviewed-by: Daniel Schultz <[email protected]>
2024-06-18board: phytec: common: k3: Copy fixed partitions to OS device treeWadim Egorov
Copy fixed-partitions nodes from U-Boot device tree to OS device tree. Signed-off-by: Wadim Egorov <[email protected]> Reviewed-by: Daniel Schultz <[email protected]>
2024-06-07Merge patch series "*** phyCORE-AM62x: DDR detection / Inject DDR timing ↵Tom Rini
deltas ***" Wadim Egorov <[email protected]> says: Changes in v2: - Reabse to current next - Add Tested-by: John Ma <[email protected]> - Add Kconfig option to select RAM size statically - Make board/phytec/common/k3 always compile for CONFIG_ARCH_K3 v1: https://lists.denx.de/pipermail/u-boot/2024-May/553057.html
2024-06-07board: phytec: am62x: Add support for 1 & 4 GB RAM variantsWadim Egorov
Use content of EEPROM to detect the actual RAM size and adjust DDR timings, size and banks accordingly. Also enable the SoM detection per default in the defconfigs. Signed-off-by: Wadim Egorov <[email protected]> Tested-by: John Ma <[email protected]>
2024-06-07board: phytec: common: Introduce a method to inject DDR timings deltasWadim Egorov
Introduce fdt_apply_ddrss_timings_patch() to allow board code to override DDR settings in the device tree prior to DDRSS driver probing. Signed-off-by: Wadim Egorov <[email protected]> Tested-by: John Ma <[email protected]>
2024-06-07board: phytec: Fix function definitions in AM6x SOM detectionWadim Egorov
Functions are declared as phytec_am6* and not phytec_am62*. Update the definitions to match the declarations. Fixes: 9d152c23279c ("board: phytec: Add SOM detection for AM6x") Signed-off-by: Wadim Egorov <[email protected]> Tested-by: John Ma <[email protected]> Reviewed-by: Dhruva Gole <[email protected]>
2024-06-07board: phytec: Make AM6 SoM detection depend on I2CWadim Egorov
SoM detection is using I2C driver model functions. Let's depend on I2C. Signed-off-by: Wadim Egorov <[email protected]> Tested-by: John Ma <[email protected]> Reviewed-by: Dhruva Gole <[email protected]>
2024-06-07Merge patch series "PHYTEC SOM Detection API v3"Tom Rini
Daniel Schultz <[email protected]> says: This patch series adds support for the EEPROM v3 API. V3 is backwards compatible to V2 and therefore, the V2 image still exists at the beginning. Only the API version changed from 2 to 3. V3 is a block-based memory layout organized as singled-linked list with different types of blocks. This is a more flexible approach and allows us to extend it by more block types in the future. The V3 data starts with a 8-byte large header which defines the block count (u8), V3 subversion (u8) and data payload length (u16). Additionally the header contains a CRC8 checksum a 3 reserved bytes. Each block starts with a 4-byte large header which defined the block type (u8), the absolute address of the next block (u16) and a CRC8 checksum. The content itself is defined via the block type and we currently have 2 different types: 1) MAC: Contains the Ethernet interface number (u8), MAC address (6 x u8) and a CRC8 checksum.
2024-06-07board: phytec: common: k3: Set MACDaniel Schultz
Read the EEPROM API v3 content and set all available MAC-Addresses to the environment. Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Wadim Egorov <[email protected]> Tested-by: Wadim Egorov <[email protected]>
2024-06-07board: phytec: common: Add API v3Daniel Schultz
This API is based on a block structure with a 8 Byte large API v3 header and various of different blocks following. It extends our current API v2, which is always 32 Byte large, and is located directly after v2. Add the MAC block as first block type. It contains the physical Ehternet interface number, a MAC address and a CRC checksum over the MAC payload. Signed-off-by: Daniel Schultz <[email protected]> Tested-by: Wadim Egorov <[email protected]>
2024-06-07board: phytec: common: Move API v2 init to new functionDaniel Schultz
Move the entire initialization code for API v2 into a dedicated function. This rework will allow to easily integrate the API v3 as next step during init. Signed-off-by: Daniel Schultz <[email protected]> Tested-by: Wadim Egorov <[email protected]>
2024-06-07board: phytec: common: Define PHYTEC_API2_DATA_LENDaniel Schultz
The EEPROM image length for API v2 is fixed to 32 bytes. No need to use sizeof while this value won't change. This value is also be required for API v3 to know where the API v3 header starts. Signed-off-by: Daniel Schultz <[email protected]> Tested-by: Wadim Egorov <[email protected]>
2024-06-07board: phytec: common: Move eeprom read to new functionDaniel Schultz
We need to read multiple times from different offsets in API v3. Move the EEPROM read logic into a dedicated function to make it usable multiple times. Signed-off-by: Daniel Schultz <[email protected]> Tested-by: Wadim Egorov <[email protected]>
2024-06-03board: phycore_imx8mp: enable setting 2GHz timings without RAM sizeBenjamin Hahn
make it possible to set the RAM timing frequency statically independent from the RAM size. Fixed RAM timing frequency can be used while the RAM size is still determined by the EEPROM image. Signed-off-by: Benjamin Hahn <[email protected]> Signed-off-by: Teresa Remmet <[email protected]>
2024-06-03board: phytec: phycore_imx8mp: Make RAM size configuration fixTeresa Remmet
We might not be able to always rely on the EEPROM introspection data. So add a config option alternative which configures the RAM size to a fix value. We still try to read the EEPROM introspection data at this point. So we can print the SoM information if available. Signed-off-by: Teresa Remmet <[email protected]>
2024-06-03board: phytec: phycore_imx8mp: Add support for different RAM sizesTeresa Remmet
Add support for different RAM sizes and speed grades on the phyCORE-i.MX8MP. Add support for 1GB 1.5GHz, 1GB 2GHz, 4GB 1.5GHz, 4GB 2GHz and 8GB 2GHz RAM. The RAM size and speed grade is detected by the information stored in the EEPROM on the SoM. Co-developed-by: Benjamin Hahn <[email protected]> Signed-off-by: Benjamin Hahn <[email protected]> Co-developed-by: Yannic Moog <[email protected]> Signed-off-by: Yannic Moog <[email protected]> Co-developed-by: Yashwanth Varakala <[email protected]> Signed-off-by: Yashwanth Varakala <[email protected]> Signed-off-by: Teresa Remmet <[email protected]>
2024-06-03board: phytec: phycore-imx8mp: spl: Fix syle issueTeresa Remmet
Use tabs instead of spaces. Signed-off-by: Teresa Remmet <[email protected]>
2024-06-03arm: imx8mp-phycore: move to OF_UPSTREAMYannic Moog
The PHYCORE_IMX8MP is used by the phyBOARD-Pollux. Migrate board to OF_UPSTREAM. Linux kernel device tree for the board can be used as is, corresponding U-Boot device tree files are removed. U-Boot tweaks are kept unchanged. Signed-off-by: Yannic Moog <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Acked-by: Teresa Remmet <[email protected]>
2024-06-03arm: imx8mm-phycore: move to OF_UPSTREAMYannic Moog
The PHYCORE_IMX8MM is used by the phyBOARD-Polis and the phyGATE-Tauri-L. Migrate both boards to OF_UPSTREAM. Linux kernel device trees for both boards can be used as is, corresponding U-Boot device tree files are removed. U-Boot tweaks are kept unchanged. Signed-off-by: Yannic Moog <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Acked-by: Teresa Remmet <[email protected]>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-10Merge patch series "*** Commonize board code for K3 based SoMs ***"Tom Rini
Wadim Egorov <[email protected]> says: Factor out code that we can reuse across all our K3 based SoMs. 2nd patch of this series require patch [1] to be applied first. [1] https://lists.denx.de/pipermail/u-boot/2024-April/552021.html
2024-05-10board: phytec: Commonize board code for K3 based SoMsWadim Egorov
Environment handling code can be reused across all our K3 based SoMs. Instead of adding the same code for every new SoM, move it to a common board.c file. Signed-off-by: Wadim Egorov <[email protected]>
2024-05-07board: phytec: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this board vendor directory and when needed add missing include files directly. Acked-by: Wadim Egorov <[email protected]> Acked-by: Teresa Remmet <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-06global: Audit usage of <eeprom.h>Tom Rini
The file include/eeprom.h is used only in some legacy non-DM I2C EEPROM access cases. Remove most inclusions of this file as they are not needed. Signed-off-by: Tom Rini <[email protected]>
2024-04-29Merge patch series "Update PHYTEC SOM Detection"Tom Rini
Daniel Schultz <[email protected]> says: This patch series extends PHYTEC's SOM detection by minor fixes, a generic helper function and a new valid flag. Moreover, it adds a module to provide access to the SOM detection for our TI AM6 products.
2024-04-29board: phytec: Add SOM detection for AM6xDaniel Schultz
Add all functions to read each SOM option from the EEPROM image and detect whether it's the correct product for this image. Signed-off-by: Daniel Schultz <[email protected]>