| Age | Commit message (Collapse) | Author |
|---|
|
Drop the driver-specific field_get() and field_prep() macros, in favor
of the globally available variants from <linux/bitfield.h>.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
|
|
Prepare for the advent of globally available common field_get() and
field_prep() macros by undefining the symbols before defining local
variants. This prevents redefinition warnings from the C preprocessor
when introducing the common macros later.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
|
|
Currently, the bi_dram[] information is stored in the board info
structure (bd). Because bd is only valid after reserve_board(),
dram_init_banksize() must be called late in the initialization process.
This limitation is problematic, as it forces us to rely on a variety of
bespoke functions to determine board RAM, bank memory sizes, and other
early setup requirements.
By moving bi_dram[] into the global data (gd), we can run it earlier.
This is particularly convenient since boards define their own
dram_init_banksize() routines, which do not always rely on parsing
Device Tree (DT) memory nodes.
Additionally, U-Boot defaults to relocating to the top of the first memory
bank. While boards currently use custom functions to override this
behavior, having the DRAM bank information available earlier in gd makes
relocating to a different bank trivial and standardizes the process.
Reviewed-by: Anshul Dalal <[email protected]>
Tested-by: Michal Simek <[email protected]> # Versal Gen 2 Vek385
Tested-by: Anshul Dalal <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
Tested-by: Christophe Leroy (CS GROUP) <[email protected]>
|
|
Bind the DBSC5 DRAM controller driver on boot in board_early_init_r(),
which brings up the DBSC5 DRAM controller and its PHY and which enables
access to DRAM present on this system.
Add default boot command which loads additional bootloader components
from HF and UFS storage into SRAM and DRAM, and starts those components
on SCP and AP core 0. The system is then capable of reaching U-Boot on
the AP core 0. Specifically, the following components are loaded:
- SCP firmware, 384 kiB from HF offset 0x4c0000 to SCP STCM
- TFA BL31, 256 kiB from UFS0 offset 0x5000 * 4 kiB sectors to DRAM 0x8c200000
- TEE, 2 MiB from UFS0 offset 0x5200 * 4 kiB sectors to DRAM 0x8c400000
- U-Boot, 1 MiB from UFS0 offset 0x7200 * 4 kiB sectors to DRAM 0x8c300000
- IPL parameters table is generated at DRAM address 0x8c100000
Enable pstore command support to allow dumping kernel console from
pstore/ramoops, which is convenient for debugging. Use as follows:
=> pstore set 0x80000000 0x10000 0x400 0x8000 0 0 0
=> pstore display console
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add Renesas R-Car Gen5 DBSC5 DRAM controller driver. This driver is currently
capable of bringing LPDDR5X DRAM on Renesas R-Car X5H Ironhide board. Further
boards can be supported by supplying board specific DRAM configuration data
via dbsc5_get_board_data().
The driver reuses parts of previous DBSC5 driver, but due to hardware changes,
can not be fully integrated into existing DBSC and DRAM driver, therefore the
currentl DBSC and DRAM drivers are moved into R8A779G0 V4H specific files, and
the R8A78000 X5H files are added in parallel.
The Gen5 DBSC driver is meant to be used in RSIP context, while the Gen4 DBSC
driver is meant to be used in SPL, therefore the Kconfig conditionals have been
adjusted to match.
Signed-off-by: Marek Vasut <[email protected]>
|
|
The mach_cpu_init() function is not invoked in SPL. Instead of
having two functions, fold mach_cpu_init() into board_init_f(),
which is called very early in the boot process and assures that
the CPG and APMU setup will be invoked before DM is brought up.
Fixes: 37997a214ed1 ("arm: renesas: Use stock lowlevel_init function and remove s_init")
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add support for the Geist board based on the Renesas R8A779MD (M3Le) SoC, a
register-compatible variant of the R8A77965 (M3N) with reduced peripherals.
The Geist board design references the Renesas Salvator-X/XS boards, adapting
their configuration for the R8A779MD SoC.
The board will be switched to OF_UPSTREAM once the DTs land in upstream.
Signed-off-by: Huy Bui <[email protected]>
Signed-off-by: Nguyen Tran <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add support for building U-Boot for Cortex-M33 RSIP core in Renesas
R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the
Cortex-M33 RSIP core, which initializes the hardware and then starts
the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware
and applications software respectively. The SCP is responsible for
platform resource management, and is used to start other CPU cores.
The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig
which configures the build for aarch32 instruction set compatible with
the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which
are derived from their non-CM33 counterparts, and add CM33 specifics.
The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic
arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core,
those are entrypoint before vectors, __data_start/__data_end symbols
for data-only relocation, and placement of BSS into read-write SRAM
area.
Signed-off-by: Marek Vasut <[email protected]>
|
|
The 64-bit R-Car board code is currently unbuildable on 32-bit ARM
cores. Skip DRAM initialization bits to make the code compatible with
these cores, because those cores do not use the DRAM, they only use
SRAM.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Replace s_init() early initialization at the end of lowlevel_init
by invoking the same code in mach_cpu_init(). The mach_cpu_init()
is called a bit later, but as the code initializes timer and no
code uses timer until mach_cpu_init(), this does not pose a problem.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.
Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.
Reviewed-by: Patrice Chotard <[email protected]> #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal <[email protected]> #TI boards
Acked-by: Yao Zi <[email protected]> #TH1520
Signed-off-by: Peng Fan <[email protected]>
|
|
struct bd_info is defined in asm-generic/u-boot.h. Include it to avoid
building error after asm/global_data.h are removed from this file.
Signed-off-by: Peng Fan <[email protected]>
|
|
Add initial support for Renesas R-Car X5H R8A78000 Ironhide board.
This consists mainly of DTs, Makefile and Kconfig entries and board
specific configuration files.
The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM
once Linux DTs become available upstream, as upstreaming progresses.
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add initial changes to support Renesas R-Car Gen5 SoC.
Introduce Kconfig entries, architecture headers and PRR IDs for Renesas
R-Car Gen5 and R-Car X5H R8A78000 SoC. Add Makefile change to produce
u-boot-elf.srec with correct offset for installation tooling. Update
MAINTAINERS entry to cover both r8a77nnn and r8a78nnn .
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
Clean up to avoid more reset macro duplication.
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
The current spl_board_fixups API allows for modification of spl_image
before the SPL jumps to it. This can be used to modify the DT for the
next boot stage, however the current API only allows either the machine
arch or the board to use it.
This limits the utility of the API as there might be certain fixups that
should be applied to all boards sharing the same machine architecture
with others being board specific.
For TI's K3 specifically, this prevents us from performing architecture
level fixups since a lot of TI boards are already making use of the
spl_board_fixups API.
Therefore this patch splits the API into two to allow both board and the
architecture specific fixups. The order is kept as arch then board to
give board specific fixups the precedence.
Reviewed-by: Dhruva Gole <[email protected]>
Signed-off-by: Anshul Dalal <[email protected]>
Tested-by: Wadim Egorov <[email protected]>
|
|
Sparrow Hawk
Fully reset both PCIe controllers before booting the next stage on
Retronix R-Car V4H Sparrow Hawk board. This is necessary especially
in case U-Boot brought up the PCIe controllers, at which point the
next stage might be confused by the state of the PCIe controller.
The reset has to happen this late and not in the PCIe controller
driver, because the SRCR11 bits seem to affect both controllers.
Signed-off-by: Marek Vasut <[email protected]>
|
|
On the RZG2L platform, the advised
TF-A (https://github.com/renesas-rz/rzg_trusted-firmware-a/tree/v2.5/rzg2l)
does not pass any DTB blob to U-Boot.
On the other hand, the RZG2L part of U-Boot expects a DTB to be passed. It
means that if one flashes the latest TF-A as well as the mainline U-Boot,
it will crash trying to dereference the NULL DTB pointer before outputing
anything.
Check if the DTB pointer is NULL before trying to use it.
Signed-off-by: Mathieu Othacehe <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
V4H Sparrow Hawk EVTB1
The Retronix R-Car V4H Sparrow Hawk EVTB1 uses 1V8 IO voltage supply
for VDDQ18_25_AVB power rail. Update the AVB0 pinmux to reflect the
change in IO voltage. Since the VDDQ18_25_AVB power rail is shared,
all four AVB0, AVB1, AVB2, TSN0 PFC/GPIO POC[7..4] registers have to
be configured the same way.
Correct the voltage for EVTA1 boards accordingly by patching the U-Boot
control DT in SPL.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Sparrow Hawk
The R-Car V4H SoC before rev.3.0 can not support dual-rank LPDDR5 DRAM.
This affects 16 GiB dual-rank DRAM configuration of Retronix R-Car V4H
Sparrow Hawk board. Fall back to 8 GiB single-rank DRAM configuration
on such systems instead.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Sparrow Hawk EVTA1
The Retronix R-Car V4H Sparrow Hawk old revision EVTA1 does not have MicroSD
voltage switch populated on the board, therefore the board supports only 3V3
and non-UHS MicroSD cards. While the EVTB1 board is populated with Winbond
W77Q51NW SPI NOR, the EVTA1 board is populated with Spansion S25FS512S SPI
NOR, those those SPI NOR IDs to discern the two board revisions and apply
the MicroSD related DT changes.
The MicroSD related DT changes modify the regulator node, which is now a
regulator-fixed and supplies only 3V3, and remove sd-uhs-sdr50 and
sd-uhs-sdr104 properties from the MicroSD slot controller node.
The MicroSD related DT changes cannot be applied as DTO, because the base
DT contains nodes which have to be removed in case of EVTA1, but have to
be present in case of EVTB1 and newer revisions of the board. Because the
EVTA1 is an old revision of the board that is not generally available, it
is better to special case it and keep the base DT compatible with EVTB1
and newer revisions of the board which are actually available.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Commit 86acdce2ba88 ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.
This cleanup was made semi-automatically using these scripts: [1].
No functional change, but the binary size for the modified boards is
reduced a bit.
[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init
Signed-off-by: Sam Protsenko <[email protected]>
Tested-by: Adam Ford <[email protected]> #imx8mm_beacon
Tested-by: Bryan Brattlof <[email protected]>
Acked-by: Peng Fan <[email protected]> #NXP boards
|
|
Add r7s72100 Genmai board support. Serial console, NOR Flash and
Ethernet are known to work however on-board SDRAM is not yet enabled.
Signed-off-by: Magnus Damm <[email protected]>
|
|
Break out SoC specific code from the GR-Peach board and put it into the
board/renesas/common directory so it can be easily shared between the
GR-Peach and Genmai boards.
Signed-off-by: Magnus Damm <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20250616
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/26704
Usb gadget:
- Fix ti_musb driver in gadget mode (with DM_USB_GADGET)
DFU:
- mmc/scsi backends when using 10 or more partitions
|
|
This function is currently a misnomer at times as we have cases where it
passes arguments to the image. In preparation for making that be a more
common case rename this function to jump_to_image(...). In order to do
this, rename jump_to_image in board_init_r(...) to jumper so that we do
not have a conflict.
Signed-off-by: Simon Glass <[email protected]>
[trini: Reword the commit message, adding missing cases of
jump_to_image_no_args()]
Signed-off-by: Tom Rini <[email protected]>
|
|
Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0
(R8A779G3) SoC. This is a single-board computer with single gigabit ethernet,
DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports,
micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD,
debug UART and JTAG.
DT is imported from Linux next commit:
a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support")
Signed-off-by: Marek Vasut <[email protected]>
|
|
Introduce weak renesas_dram_init_banksize() function which is meant
to be used to adjust DRAM bank sizes after the common Renesas board
DRAM bank handling code finished. This is mainly meant for boards
which ship with multiple DRAM size options, which can be detected
at runtime. This allows such boards to ship with single U-Boot
binary on all boards.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Un-orphan the RZ/G2L , keep the RZ/G2L maintained.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Paul Barker <[email protected]>
|
|
I still intend to review patches, and will be using my own email address
going forward.
Signed-off-by: Paul Barker <[email protected]>
|
|
The R-Car V4H SPL implementation was originally running on the Cortex-R52
core, but this is no longer the case. Majority of the SPL now runs on the
Cortex-A76 core. Drop the stale description.
Fixes: ec53fdee5bec ("arm64: renesas: Add Renesas R-Car V4H SPL implementation")
Signed-off-by: Marek Vasut <[email protected]>
|
|
Remove stale Makefile description, this used to be valid for the
original Makefile from which the common Makefile was made generic,
but is no longer applicable to the common Makefile.
Fixes: c7d2d7f90a91 ("ARM: renesas: Simplify board Makefiles")
Signed-off-by: Marek Vasut <[email protected]>
|
|
Implement custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling in case the TFA was loaded. The loadables handler sets up custom
handoff structure used by Renesas TFA fork in fixed location in DRAM and
indicates the TFA has been loaded.
The custom armv8_switch_to_el2_prep() handling tests whether the TFA BL31
was previously loaded and the custom handoff structure was set up, and if
so, jumps to TFA BL31 which switches from EL3 to EL2 and then returns to
U-Boot just past bl in armv8_switch_to_el2() to finish starting the Linux
kernel.
The jump to Linux through TFA works in such a way that the custom
armv8_switch_to_el2_prep() handler configures the custom handoff structure
such that the target jump address of the TFA BL31 on exit is set to the
armv8_switch_to_el2() + 4, which is just past the bl, and just before the
U-Boot code which implements the Linux kernel boot from either EL. The
registers passed through the TFA BL31 are all the registers passed into
armv8_switch_to_el2_prep() to assure maximum compatibility with all the
boot modes. The armv8_switch_to_el2_prep() handler jumps to the TFA BL31,
which does its setup, drops EL from EL3 to EL2 and finally jumps to the
armv8_switch_to_el2() + 4 entry point, which then allows U-Boot to boot
the Linux kernel the usual way.
In order to build suitable kernel fitImage, build TFA first, upstream
is currently under review:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35799
Or if necessary, downstream repository:
remote: https://github.com/renesas-rcar/arm-trusted-firmware.git
branch: rcar_gen4_v2.7_v4x
```
$ git clean -fqdx
$ MBEDTLS_DIR=/path/to/mbedtls/ make -j$(nproc) bl31 \
PLAT=rcar_gen4 ARCH=aarch64 LSI=V4H SPD=none \
CTX_INCLUDE_AARCH32_REGS=0 MBEDTLS_COMMON_MK=1 \
PTP_NONSECURE_ACCESS=1 LOG_LEVEL=20 DEBUG=0 \
ENABLE_ASSERTIONS=0 E=0
```
Build Linux kernel Image and device tree from current mainline Linux
kernel repository, obtain 'Image' and 'r8a779g0-white-hawk.dtb' .
Bundle the files together using provided fit-image.its fitImage description:
```
$ mkimage -f fit-image.its fitImage
```
To start the kernel fiImage generated in previous step, load fitImage
to DRAM and use the 'bootm' command to start it:
=> load 0x58000000 ... fitImage && bootm 0x58000000
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add support for the R-Car S4 Starter Kit with R8A779F4 SoC support.
This implementation natively uses OF_UPSTREAM to pull in most recent
DT. The defconfig is derived from S4 Spider, with reduced UART baud
rate to 921600 Bdps. The DT alias to rswitch is removed as the alias
should point to rswitch ports, not to rswitch itself, see [1].
[1] https://lore.kernel.org/linux-arm-kernel/[email protected]/
Signed-off-by: Marek Vasut <[email protected]>
|
|
Move R-Car Gen3 and Gen4 jump_to_image_no_args() into dedicated
rcar64-spl.c file. The implementation of jump_to_image_no_args()
is identical. No functional change.
Reviewed-by: Quentin Schulz <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
Introduce common weak board_early_init_f() in rcar64-common.c
which is the default implementation in case there is no other
board specific board_early_init_f(). Remove board_early_init_f()
from Salvator-X, ULCB and Draak boards where this function is
empty.
Reviewed-by: Quentin Schulz <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <[email protected]>
|
|
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <[email protected]>
|
|
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <[email protected]>
|
|
The common.c content is specific to 64-bit R-Car SoCs, rename
the file to rcar64-common.c and remove R-Car 64-bit ifdeffery
in the file. No functional change.
Reviewed-by: Quentin Schulz <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
Introduce board/renesas/common/Makefile and remove the multiple
duplicate copies of obj := ../common/*.o from board Makefiles.
Let the build system include the common Makefile using the
HAVE_VENDOR_COMMON_LIB and build the common objects that are
shared by all the boards that way. No functional change intended.
Some of the remaining board files which include board specific
settings have been updated to use obj-y += to avoid rewriting
the board obj-y target and avoid dropping object files from the
build.
The board/renesas/common/Makefile is now also used when building
RZG2L targets which also set CONFIG_RCAR_64 symbol and 32bit R-Car
Gen2 targets, however, this common code is specific to 64bit R-Car
only. Inhibit the build of this common code for RZG2L using extra
ifndef CONFIG_RZG2L and do not include any code for R-Car Gen2 so
far.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
The SPL on R-Car V3U Falcon is never built, remove the Makefile entry.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
Rename directory board/renesas/rcar-common to board/renesas/common and
move files. This allows the build system to use HAVE_VENDOR_COMMON_LIB
which automatically includes board/$(VENDOR)/common/Makefile . Create
temporarily empty board/renesas/common/Makefile to be extended with
actual content later in this series. This is a preparatory patch for
board Makefile simplification. No functional change so far.
Reviewed-by: Quentin Schulz <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
Use generic is_cortex_a() functions instead of open-coded midr_el1 read.
No functional change.
Reviewed-by: Paul Barker <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add support for building U-Boot SPL for Renesas R-Car Gen4 R8A779G0 V4H SoC.
The SPL initializes the DBSC5 DRAM controller, RT-VRAM and loads and starts
U-Boot proper on the Cortex-A76 core.
The SoC BootROM can not boot the CA76 core directly, instead the SPL starts
on the CR52 core which immediately brings up the CA76 core, which in turn
starts executing the actual SPL. This is achieved by placing a tiny bit of
precompiled Aarch32 code at the very beginning of the SPL. The code consists
of some 32 instructions, uses APMU to configure CA76 start address to offset
0x80 Bytes from start of the SPL, and uses APMU to start the CA76 core. The
code parts the CR52 core in an endless loop once the CA76 core got started.
The 32 instructions are completely arbitrary number, so is the offset 0x80
Bytes from start of SPL, because 0x80 = 128 decimal and 128 / 4 bytes per
instruction is 32 instructions. The 32 instructions turned out to be enough
to started the CA76 and 0x80 is nicely aligned.
Once the SPL completes hardware initialization, the SPL loads U-Boot proper.
The u-boot.itb proper fitImage contains 64bit build on u-boot-nodtb.bin and
a DT for R8A779G0 V4H White Hawk board and is generated by binman. The
u-boot.itb is loaded from SPI NOR offset 0x80000.
In order to install this setup on an existing R8A779G0 V4H White Hawk board,
build using r8a779g0_whitehawk_defconfig, generate SPI NOR image flash.bin
and write flash.bin to SPI NOR offset 0x0 . Finally, configure board MD pin
switches according to the R8A779G0 V4H White Hawk board documentation for
40 MHz SPI NOR boot using DMA and restart the board.
Signed-off-by: Marek Vasut <[email protected]>
|
|
In case U-Boot runs in EL3, which is the highest privilege level on ARM64,
there can be no firmware running that would restrict access to the bottom
128 MiB of DRAM. In fact, it is likely that U-Boot would have to load that
firmware into those bottom 128 MiB of DRAM and start that firmware.
Make those bottom 128 MiB of DRAM available in case U-Boot runs in EL3 to
allow loading the firmware to that area.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Split common board code for R-Car Gen3 and Gen4 into separate files.
The R-Car Gen3 board code contains fixups specific to TFA which are
no longer required on R-Car Gen4, keep those fixups in its own file
so they would not interfere with Gen4.
Signed-off-by: Marek Vasut <[email protected]>
|
|
All R-Car Gen4 board files are copies of one another at this point.
Deduplicate them into single board/renesas/rcar-common/gen4-common.c
and remove all the duplicates. The one exception is R-Car V3U Falcon
board, which enables RWDT reset in board_init(), conditionally build
RWDT enablement in board_init() in the new common code for V3U.
Signed-off-by: Marek Vasut <[email protected]>
|
|
We are now using the dts/upstream subtree for the RZ/G2L SoC family, so
update the board MAINTAINERS file to match rz-smarc dtsi files in this
subtree.
Signed-off-by: Paul Barker <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Add top level board/renesas/ MAINTAINERS file to catch all the common
Renesas file patterns and put people on CC via get_maintainer.pl script.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Paul Barker <[email protected]>
|
