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This patch is used to restore support for i.MX95 A0 silicon. To avoid
duplicating defconfig, imx95.config is added and can be shared between
imx95_a0_19x19_evk_defconfig and imx95_19x19_evk_defconfig.
container.cfg and imximage.cfg are used to created .cfgout files that
are be passed to mkimage with -n to build flash.bin. Now they have been
deleted and replaced by adding their content to properties of node which
type is nxp-imx9image under binman node.
Fixes: 9936724aa9b ("imx95_evk: Add i.MX95 B0 support")
Signed-off-by: Alice Guo <[email protected]>
Tested-By: Tim Harvey <[email protected]> # imx95-19x19-evk (rA0)
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The isprint() checks printability across all 256 characters, some of the
upper 128 characters are printable and produce artifacts on UART. Call
isascii() first to only consider the bottom 7bit ASCII characters as
printable, and then check their printability using isprint(). This fixes
a rare misprint in case the ID page content is uninitialized or corrupted.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Christoph Niedermaier <[email protected]>
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dh_get_value_from_eeprom_buffer()
The eip pointer in dh_get_value_from_eeprom_buffer() might be NULL.
The current NULL pointer check happens too late, after the eip was
accessed in variable assignment. Reorder the two, so the NULL pointer
check happens first, and any access second, otherwise the access may
trigger a hang or other undefined behavior.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Christoph Niedermaier <[email protected]>
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Per recent discussion [1] product IDs VF7110A or VF7110B from EEPROM are
sufficient to select for VisionFive 2 1.2a or VisionFive 2 1.3b boards.
There are no VisionFive 2 products with mixed-case product IDs in EERPOM
so factor out the unnecessary select case conditional.
1: https://lore.kernel.org/u-boot/ZQ2PR01MB1307D97D2C9566B8EE443812E6062@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn/
Signed-off-by: E Shattow <[email protected]>
Reported-by: Hal Feng <[email protected]>
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Check the compatible string of ethernet1 node for KS8851 very early on,
before calling uclass_get_device_by_of_path() which might initialize
the device and possibly attempt to configure MAC address into device
which is not KS8851. Doing the compatibility check early prevent this.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add CMD_MEMINFO and CMD_MEMINFO_MAP to list of configs implied by
TI_COMMON_CMD_OPTIONS. This allows users to easily view the memory
configuration and the memory maps at runtime.
Signed-off-by: Anshul Dalal <[email protected]>
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Make the fdt_map parameter a pointer to const, since the function only
reads the mapping table. This improves API correctness and allows maps
to live in read-only data.
No functional change intended
Signed-off-by: Bhimeswararao Matsa <[email protected]>
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Unlike other K3 SoC's, am65 SoC has the capability to detect daughter
cards and automatically generate a list of white-space separated overlays
in name_overlays environment variable.
When applied during boot with get_overlay_mmc, the path to overlays with
default distribution is incorrect where path is currently: boot/dtb and
the overlays exist in boot/dtb/ti.
Fix the path in get_overlay_mmc so that overlays are automatically applied
correctly during boot time.
Signed-off-by: Judith Mendez <[email protected]>
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Prepare v2025.10-rc4
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Anurag Dutta <[email protected]> says:
This patch series migrates from .h to .env format for am57xx/dra7xx.
Also, we do relevant changes so that the fdtfile can be set from C code.
logs : https://gist.github.com/anuragdutta731/82560cc9bc958ca70a25a95a7031eeea
Link: https://lore.kernel.org/r/[email protected]
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We now can provide a map and have the standard fdtfile variable set from
code itself. This allows for bootstd to "just work".
Signed-off-by: Anurag Dutta <[email protected]>
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We now can provide a map and have the standard fdtfile variable set from
code itself. This allows for bootstd to "just work".
Signed-off-by: Anurag Dutta <[email protected]>
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Move to using .env file for setting up environment variables
for am57xx and dra7xx.
Signed-off-by: Anurag Dutta <[email protected]>
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- Fix issues reported by smatch
- exynos4210-origen cleanups
- e850-96 improvements
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Add new imx8mp-libra-fpsc board.
Bootph tags as well as USB device tree nodes are in u-boot.dtsi for now
and will be removed when upstreamed.
The Libra i.MX 8M Plus FPSC is a single board computer. It uses an i.MX
8M Plus FPSC [1] System on Module which utilizes the FPSC standard [2].
[1] https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-8m-plus-fpsc
[2] https://www.phytec.eu/en/produkte/system-on-modules/fpsc
Signed-off-by: Benjamin Hahn <[email protected]>
Reviewed-by: Teresa Remmet <[email protected]>
Tested-by: Teresa Remmet <[email protected]>
Signed-off-by: Yannic Moog <[email protected]>
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Switch to use CONFIG_PHYTEC_EEPROM_BUS instead of the hard coded value
of 2 for the EEPROM I2C bus for both SPL and U-Boot proper. Possible
since commit 88a1816a9b4e ("board: phytec: common: Add PHYTEC_EEPROM_BUS
to Kconfig").
Signed-off-by: Primoz Fiser <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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In case of booting from serial loader (USB) we want to always use the
default environment in order to get a defined state that is
independent of any environment stored in persistent memory.
This way we can avoid corruption of the boot process during
development and manufacturing by existing environment settings in
flash.
Signed-off-by: Eberhard Stoll <[email protected]>
Signed-off-by: Frieder Schrempf <[email protected]>
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For booting via USB we want to automatically start the fastboot
command in order to access the board via uuu or other tools.
This allows for easier bringup of new boards during development
and manufacturing.
Signed-off-by: Annette Kobou <[email protected]>
Signed-off-by: Frieder Schrempf <[email protected]>
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The header from the local directory should use double quotes instead
of brackets. Otherwise the compiler might not search the local
directory.
Fixes: 93935acc6f1d ("imx: imx6ul: kontron-sl-mx6ul: Select correct boot and env device")
Signed-off-by: Frieder Schrempf <[email protected]>
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Branch contains minor improvents for ASUS SL101 and Jetson Nano along
with support for Microsoft Surface 2 tablet.
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SL101 unlike TF101/G has no Lid sensor, so lets add a separate env for
SL101 without Lid sensor used.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Linux kernel should use some separate device tree obtained from another
source anyway. For example the dtb file can be read from /boot directory
in eMMC rootfs partition, either by GRUB or U-Boot. Using U-Boot's
device tree blob to provide it to the kernel (when
CONFIG_DEFAULT_FDT_FILE is set and nobody else overrides this choice)
might lead to undesired effects when booting the OS. For example, if a
user sets "dr_mode" property to "host" value in U-Boot's dts to enable
USB host capabilities in U-Boot, it might confuse usb-conn-gpio driver
in Linux kernel later like this:
platform connector: deferred probe pending: usb-conn-gpio:
failed to get role switch
Disable CONFIG_DEFAULT_FDT_FILE option to avoid any possible confusion.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Provide a way for the user to select which storage to load the LDFW
firmware from, by setting the corresponding environment variables:
- bootdev: block device interface name
- bootdevnum: block device number
- bootdevpart: partition number
This might be useful when the OS is flashed and booted from a different
storage device than eMMC (e.g. USB flash drive). In this case it should
be sufficient to just set:
=> setenv bootdev usb
=> env save
assuming that the USB drive layout follows the same partitioning scheme
as defined in $partitions.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Make it possible to provide the information about storage device where
LDFW firmware resides to the firmware loading routine. The firmware
loader code shouldn't have that data hard-coded anyway, and it also
allows for implementing more dynamic behavior later, like choosing the
storage device containing LDFW via some environment variables.
No functional change.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Make use of PMIC configuration routines and enable all LDOs that might
be useful for bootloader and kernel. The most crucial regulator being
enabled at the moment is LDO24 which provides power to LAN9514 chip.
That makes Ethernet controller and USB hub functional.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add functions for configuring voltage regulators on S2MPU12 PMIC chip
for E850-96 board. The chip is accessed by commanding APM core (via
ACPM IPC protocol) to perform corresponding transfers over I3C bus.
The most important regulator being set up is LDO24 used for LAN9514 chip
power. As LAN9514 implements USB hub and Ethernet controller
functionality, it's crucial to enable and configure LDO24 to be able to
use it further. While at it, configure the rest of regulators that might
be needed later, both in the bootloader and in kernel.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add functions to access I3C bus via APM (Active Power Management) core
by using ACPM IPC protocol. It will be further used for configuring PMIC
chip voltage regulators.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Set the environment variable for Ethernet MAC address (ethaddr). Use the
SoC ID to make sure it's unique. It'll be formatted in a way that
follows the consecutive style of the serial number ("serial#" variable),
i.e.:
OTP_CHIPID0 = 0xf51c8113
OTP_CHIPID1 = 0x236
get_chip_id() = 0x236f51c8113
serial# = 00000236f51c8113
ethaddr = 02:36:f5:1c:81:13
where corresponding bytes of the MAC address are:
mac_addr[0] = 0x02 // OTP_CHIPID1[15:8]
mac_addr[1] = 0x36 // OTP_CHIPID1[7:0]
mac_addr[2] = 0xf5 // OTP_CHIPID0[31:24]
mac_addr[3] = 0x1c // OTP_CHIPID0[23:16]
mac_addr[4] = 0x81 // OTP_CHIPID0[15:8]
mac_addr[5] = 0x13 // OTP_CHIPID0[7:0]
because OTP_CHIPID1 has only 16 significant bits (with actual ID
values), and all 32 bits of OTP_CHIPID0 are significant.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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exynos_power_init sets up regulators for the emmc and sdcard, but
these regulators are already marked as always-on and boot-on and hence
are handled already by the regulator-uclass. Since we currently try to
set them up twice we get error -114 (EALREADY) from exynos_power_init
on every boot:
LDO20@VDDQ_EMMC_1.8V: set 1800000 uV; enabling (ret: -114)
LDO22@VDDQ_EMMC_2.8V: set 2800000 uV; enabling (ret: -114)
LDO21@TFLASH_2.8V: set 2800000 uV; enabling (ret: -114)
Remove the superfluous exynos_power_init to silence these errors.
Signed-off-by: Henrik Grimler <[email protected]>
Reviewed-by: Anand Moon <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The Orange Pi 5 Ultra is another board in the Orange Pi 5 family.
Orange Pi 5 Ultra uses Rockchip RK3588,
a new generation of octa-core 64-bit ARM processor,
which includes quad-core A76 and quad-core A55.
Features tested on a Orange Pi 5 Ultra 16GB:
- SD-card boot
- eMMC boot
ROCKCHIP_TPL:
https://github.com/rockchip-linux/rkbin/tree/master/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
BL31:
https://github.com/rockchip-linux/rkbin/tree/master/bin/rk35/rk3588_bl31_v1.48.elf
Signed-off-by: Niu Zhihong <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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GPIO0_B7 is routed to TXI of the on-board CAN transceiver. The
line has a pull-down per SoC default.
This means the CAN transceiver transmits a dominant zero
and blocks the CAN bus until Linux boots and reconfigures the pin.
Let's switch to pull-up as soon as we can (i.e. in SPL).
This cuts down the "bus is blocked" time from 10 seconds to < 1 second.
Of course, to this needs CONFIG_SPL_BOARD_INIT, so enable it
the Jaguar defconfig.
Signed-off-by: Jakob Unterwurzacher <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The GameForce Ace is an RK3588S based handheld gaming device.
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx/FPGA changes for v2026.01-rc1
mbv:
- Add it to CI loop
versal2:
- Wire UFS driver
serial:
- Add support for OF_PLATDATA in uartlite
misc:
- Mark some structures as const
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Wadim Egorov <[email protected]> says:
Update Kconfig options for phyCORE-AM62Ax to align with other boards and
prepare common board code for the upcoming phyCORE-AM62L which has the
SoM EEPROM connected on a different bus.
Link: https://lore.kernel.org/r/[email protected]
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Drop SUPPORT_EXTENSION_SCAN and enable PHYTEC_SOM_DETECTION_BLOCKS
to align with other PHYTEC platforms. These options were missed when
phyCORE-AM62Ax support was added.
Signed-off-by: Wadim Egorov <[email protected]>
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Use CONFIG_PHYTEC_EEPROM_BUS instead of the hard coded value for the i2c bus.
Signed-off-by: Dominik Haller <[email protected]>
Signed-off-by: Wadim Egorov <[email protected]>
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Add the option to choose a different bus number than 0 for the i2c eeprom
based som detection.
Signed-off-by: Dominik Haller <[email protected]>
Signed-off-by: Wadim Egorov <[email protected]>
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board_fdt_blob_setup() is guarded by OF_BOARD already that's why make no
sense to depend also on OF_SEPARATE.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/063b2e618afb05a32d66218f3631a5f23b30ea3e.1753172103.git.michal.simek@amd.com
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Prepare v2025.10-rc3
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Add rauc to bootmeths variable if BOOTMETH_RAUC is enabled.
This is setting a proper default for RAUC enabled systems.
Signed-off-by: Wadim Egorov <[email protected]>
Reviewed-by: Martin Schwan <[email protected]>
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Fix PHYTEC EEPROM bus mismatch between SPL and U-Boot proper by enabling
CONFIG_SPL_DM_SEQ_ALIAS=y on phyCORE-i.MX93 boards. This way, both the
SPL and U-Boot proper will respect the device-tree aliases for I2C devs
and use the same I2C bus number for phytec_eeprom_data_setup() function
calls. This makes code less confusing and more robust.
Fixes an issue apparent since commit 79f3e77133bd ("Subtree merge tag
'v6.16-dts' of dts repo [1] into dts/upstream") where SPL would spew the
following error:
phytec_eeprom_read: i2c EEPROM not found: -110.
phytec_eeprom_data_setup: EEPROM data init failed
While later in U-Boot proper, EEPROM would be successfully read out.
This happens because Linux device-tree for phyBOARD-Segin-i.MX93 since
aforementioned commit enables I2C bus 2 (lpi2c2 is used for audio codec
and RTC) which breaks SPL I2C bus number ordering and I2C EEPROM bus is
shifted by +1. Now, lets prevent this from happening again by utilizing
device-tree aliases also in the SPL.
Signed-off-by: Primoz Fiser <[email protected]>
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Select CONFIG_SYS_EARLY_PCI_INIT so that eMMC emulation can
work.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Tested-by: Jan Kiszka <[email protected]>
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Making the setup_mac_from_eeprom optional for boards without
CONFIG_PHYTEC_SOM_DETECTION_BLOCKS.
Signed-off-by: John Ma <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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Chintan Vankar <[email protected]> says:
This series adds bind method for CPSW to avoid explicit probing, removes
explicit probing of CPSW, adds support for Ethernet boot on SK-AM68,
SK-AM62P-LP, J722S, SK-AM69.
Link: https://lore.kernel.org/r/[email protected]
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Enable cache for J722s to optimize performance of CPU to access data from
memory.
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Chintan Vankar <[email protected]>
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Enable cache for AM62p to optimize performance of CPU to access data from
memory.
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Andreas Dannenberg <[email protected]>
Signed-off-by: Chintan Vankar <[email protected]>
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Surface 2 is a Surface-series Windows RT hybrid tablet computer created by
Microsoft. Surface 2 uses a 1.7 GHz quad-core Nvidia Tegra 4 chipset with
2 GB of RAM, features 10.6 inch FullHD ClearType HD screen with 16:9 aspect
ratio and 32/64 GB of internal memory that can be supplemented with a
microSDXC card giving up to 64 GB of additional storage.
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Set the uart clock frequency according to dts by default.
If CONFIG_SYS_SKIP_UART_INIT is not enabled, no need to
do board_set_console to change the console bootarg.
Signed-off-by: Jim Liu <[email protected]>
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V4H Sparrow Hawk EVTB1
The Retronix R-Car V4H Sparrow Hawk EVTB1 uses 1V8 IO voltage supply
for VDDQ18_25_AVB power rail. Update the AVB0 pinmux to reflect the
change in IO voltage. Since the VDDQ18_25_AVB power rail is shared,
all four AVB0, AVB1, AVB2, TSN0 PFC/GPIO POC[7..4] registers have to
be configured the same way.
Correct the voltage for EVTA1 boards accordingly by patching the U-Boot
control DT in SPL.
Signed-off-by: Marek Vasut <[email protected]>
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Sparrow Hawk
The R-Car V4H SoC before rev.3.0 can not support dual-rank LPDDR5 DRAM.
This affects 16 GiB dual-rank DRAM configuration of Retronix R-Car V4H
Sparrow Hawk board. Fall back to 8 GiB single-rank DRAM configuration
on such systems instead.
Signed-off-by: Marek Vasut <[email protected]>
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