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2025-10-15cmd: ti: Add DDRSS Inline ECC Error Injection commandGeorgi Vlaev
Introduce a new version of the Keystone-II "ddr" command for testing the inline ECC support in the DDRSS bridge available on K3 devices. The ECC hardware support in K3's DDRSS and the test method differ substantially from what we support in the K2 variant of the command. This K3 DDRSS command currently supports only single controller testing. The ECC error injection procedure follows these steps: 1) Flush and disable the data cache. 2) Disable the protected ECC Rx range. 3) Flip a bit in the address. 4) Restore the range to original. 5) Read the modified value (corrected). 6) Re-enable the data cache. This will cause the 1-bit ECC error count to increase while the read will return the corrected value. The K3 version of the command extends the syntax for the "ecc_err" argument by also introducing an argument for range which specifies which range (0, 1, 2) the address is located in. Multi-bit ECC errors are uncorrectable and will lead to a synchronous abort. Signed-off-by: Georgi Vlaev <[email protected]> Signed-off-by: Santhosh Kumar K <[email protected]> [[email protected]: Add J7 and multiple-region support, simplify logic] Signed-off-by: Neha Malcom Francis <[email protected]> Reviewed-by: Udit Kumar <[email protected]>
2023-10-16cmd/ti: Update Kconfig logic and Makefile recursion logicTom Rini
- Add some dependencies to CMD_DDR3 as this is only valid on some platforms (which tend to select it as well). - The proper gate for going in to cmd/ti is not CONFIG_TI_COMMON_CMD_OPTIONS as nothing under there is controlled by that symbol but the general TI architecture options. Signed-off-by: Tom Rini <[email protected]>
2021-06-11cmd: ti: pd: Add debug command for K3 power domainsTero Kristo
Add support command for debugging K3 power domains. This is useful with the HSM rearch setup, where power domains are directly controlled by SPL instead of going through the TI SCI layer. The debugging support is only available in the u-boot codebase though, so the raw register access power domain layer must be enabled on u-boot side for this to work. By default, u-boot side uses the TI SCI layer, and R5 SPL only uses the direct access methods. Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2018-01-19arm: keystone: Move cmd_ddr3 to a common placeLokesh Vutla
Move cmd_ddr3 to cmd/ti in order to make it build for non-keystone TI platforms. Signed-off-by: Lokesh Vutla <[email protected]> [trini: Rename to ddr3.c not cmd_ddr3.c] Signed-off-by: Tom Rini <[email protected]>