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Introduce a new fragment configuration in u-boot to enable support for
the snagfactory tool [1], used for factory flashing of boards. Snagfactory
tool first recovers the board via USB DFU (peripheral boot), and then
uses fastboot to flash given binaries/images to MMC or other on-board
memory via USB. The fragment config can be used to generate boot binaries
for board recovery. This fragment config needs to be added additionally,
while building a53 images for USB DFU boot.
The fragment config enables configurations to allow flashing via
fastboot, manage MMC partitions and boot partitions, customize buffer
size and memory usage for fastboot and also integrate OEM commands and
UUU compatibility. It sets CONFIG_BOOTCOMMAND to start fastboot mode
immediately on startup. It also sets BOOTDELAY to 0 to reduce snagfactory
recovery time. Since BOOTCOMMAND and BOOTDELAY configs are being
modified, these changes cannot be placed in existing DFU fragment config.
Snagfactory used mtd support for flashing both SPI NAND and SPI NOR
devices. The fragment config enables mtd in u-boot and also allows SPI
flash to be treated as an MTD device.
[1]: https://github.com/bootlin/snagboot
Signed-off-by: Paresh Bhagat <[email protected]>
Signed-off-by: Mahammed Sadik Shaik <[email protected]>
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Siddharth Vadapalli <[email protected]> says:
This series adds PCIe endpoint boot support for the TI J784S4 SoC.
Series is based on commit f9ffeec4bdc ("board: toradex: Make A53 get RAM
size from DT in K3 boards") of the master branch of U-Boot.
PCIe Boot Logs (J784S4-EVM running Linux as Root-Complex transfers
bootloaders to another J784S4-EVM configured for PCIe Boot):
https://gist.github.com/Siddharth-Vadapalli-at-TI/2d157003818441fe79a139d0dec1058a
Link: https://lore.kernel.org/r/[email protected]
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Although the J742S2 EVM supports PCIe boot in Hardware, since it is not
enabled yet in Software, disable PCIe boot related configurations that are
not applicable.
Signed-off-by: Hrushikesh Salunke <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
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Although the J742S2 EVM supports PCIe boot in Hardware, since it is not
enabled yet in Software, disable PCIe boot related configurations that are
not applicable.
Signed-off-by: Hrushikesh Salunke <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
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AM69 SK does not contain PCIe Boot in the list of supported Boot Modes.
Hence, disable PCIe Boot related configurations that are not applicable.
Signed-off-by: Hrushikesh Salunke <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
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AM69 SK does not contain PCIe Boot in the list of supported Boot Modes.
Hence, disable PCIe Boot related configurations that are not applicable.
Signed-off-by: Hrushikesh Salunke <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
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J784S4 SoC has two instances of PCIe, namely PCIe0 and PCIe1. The
PCIe1 instance is used for PCIe endpoint boot. Enable the configs
required for PCIe boot on the J784S4 platform.
Signed-off-by: Hrushikesh Salunke <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
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J784S4 SoC has two instances of PCIe, namely PCIe0 and PCIe1. The
PCIe1 instance is used for PCIe endpoint boot. Enable the configs
required for PCIe boot on the J784S4 platform.
Additionally, enable configs for J721E WIZ SERDES wrapper, Cadence
Torrent PHY, and MMIO multiplexer. These are required to configure
the SERDES lanes at the R5 SPL stage for PCIe endpoint operation.
Signed-off-by: Hrushikesh Salunke <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
Reviewed-by: Udit Kumar <[email protected]>
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This series from Dominik Haller <[email protected]> adds and enables
support for the PMIC ESM node on some phycore-som based platforms.
Link: https://lore.kernel.org/r/[email protected]
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Add TPS6287X which provides VDD_CPU_AVS and ESM_K3+ESM_PMIC for the
watchdogs.
Signed-off-by: Dominik Haller <[email protected]>
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into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/29497
- sifive: switch to OF_UPSTREAM
- driver: cache: Remove SiFive PL2 driver
- riscv: fixes for non-existent CONFIG
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https://source.denx.de/u-boot/custodians/u-boot-net into next
Pull request net-20260312.
net:
- Move network PHY under NETDEVICES
- s/DM_CLK/CLK/ in HIFEMAC_{ETH,MDIO}
- Add support for Airoha AN8811HB PHY
- airoha: PCS and MDIO support for Airoha AN7581 SoC
net-lwip:
- Fix issue when TFTP blocksize is >8192
- Adjust PBUF_POOL_SIZE/IP_REASS_MAX_PBUFS for better performance and
resource usage.
- Enable mii command for NET_LWIP
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Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot.
Signed-off-by: Andreas Schwab <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Enable PCS config for Airoha AN7581 SoC by default to enable
support for External PHY.
Signed-off-by: Christian Marangi <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
A fix:
* Fixing compiling MT8195 due to some independent changes that were applied
around the same time as MT8195 support was merged. (CI would not have caught
this since we didn't have a defconfig until now).
And few small features:
* New defconfig for MT8395/Genio 1200 EVK.
* pinctrl support for MT8189-compatible SoCs.
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Varadarajan Narayanan <[email protected]> says:
The disk_read() and disk_write() functions of the FAT driver use the
blk_dread() and blk_dwrite() respectively. The blk_* APIs read and write
to the devices in terms of the device block size. However, the FAT
driver reads in terms of the device block size (from fat_set_blk_dev and
read_bootsectandvi) and sector size in the rest of the places.
This causes buffer overflows or partial reads when the FAT sector size
is not equal to device block size. Fix this by using blk_dread in
fat_set_blk_dev and read_bootsectandvi instead of disk_read. And update
disk_read/disk_write to handle FAT sector size and block size mismatch.
Tested on
blksz | FAT sector size
------+----------------
4096 | 4096
512 | 512
4096 | 512
512 | 4096
CI test results
---------------
https://github.com/u-boot/u-boot/pull/871
All checks have passed
93 successful checks
No conflicts with base branch
Code size change info
---------------------
arm: (for 1/1 boards) all +32.0 text +32.0
qemu_arm : all +32 text +32
u-boot: add: 0/0, grow: 2/0 bytes: 24/0 (24)
function old new delta
read_bootsectandvi 420 432 +12
fat_set_blk_dev 204 216 +12
aarch64: (for 1/1 boards) all +12.0 rodata -8.0 text +20.0
qemu_arm64 : all +12 rodata -8 text +20
u-boot: add: 0/0, grow: 2/0 bytes: 20/0 (20)
function old new delta
read_bootsectandvi 408 420 +12
fat_set_blk_dev 204 212 +8
aarch64: (for 1/1 boards) all -2.0 data -8.0 rodata +6.0
qcom_qcs9100 : all -2 data -8 rodata +6
u-boot: add: 1/-1, grow: 8/-1 bytes: 708/-224 (484)
function old new delta
disk_rw - 628 +628
read_bootsectandvi 408 428 +20
fat_itr_root 500 520 +20
get_cluster 376 388 +12
set_contents 2076 2084 +8
fat_set_blk_dev 204 212 +8
static.set_fatent_value 536 540 +4
get_fatent 420 424 +4
fat_next_cluster 368 372 +4
disk_read 100 - -100
disk_write 132 8 -124
Link: https://lore.kernel.org/r/[email protected]
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Enable FS_FAT_HANDLE_SECTOR_SIZE_MISMATCH to handle the different
combination of FAT sector size and device block size present in QCOM
platforms.
Signed-off-by: Varadarajan Narayanan <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip into next
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/29452
- New SoC support: RK3506, RK3582;
- New Board support: RK3528 FriendlyElec NanoPi Zero2;
- Other fixes
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Imply OF_UPSTREAM for rk3288 boards.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Switch remaining rk3288 boards to upstream devicetree.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Switch rk3288-veyron boards to upstream devicetree.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The NanoPi Zero2 is a small single board computer developed by
FriendlyElec, based on the Rockchip RK3528A SoC.
Add support for the FriendlyElec NanoPi Zero2 board.
Features tested on a FriendlyElec NanoPi Zero2 2407:
- SD-card boot
- eMMC boot
- Ethernet
- USB host
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Christopher Obbard <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Tiger suffers from eMMC signal integrity issues which means we can only
run it at HS200 max.
The Device Tree has these properties removed since v6.18 (commit
baa18d577cd4 ("arm64: dts: rockchip: disable HS400 on RK3588 Tiger")),
which has now merged in U-Boot.
Since the controller side doesn't support HS400 anymore, let's not
confuse users as to why HS400 is enabled in the config but not working
as we know it cannot work (and won't be used anyway since the controller
doesn't advertise support for it in the Device Tree).
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add Kconfig option OF_SYSTEM_SETUP=y to support booting ROCK 5C Lite
boards with a RK3582 SoC. CPU and GPU cores are failed based on ip-state
and policy.
Tested on a ROCK 5C Lite v1.1:
cpu-code: 35 82
ip-state: 00 80 00 (otp)
ip-state: c0 9e 04 (policy)
remove cpu-map cluster2
fail gpu
fail rkvdec1
fail rkvenc1
fail cpu cpu@600
fail cpu cpu@700
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Prepare v2026.04-rc4
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The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
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The PCIe1 instance of PCIe on the J7200 SoC uses the 4 GB Address Window
starting from 0x41_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
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The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
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The PCIe Controllers on the J784S4 and AM69 SoCs support Root-Complex
mode of operation. PCIe0 instance of PCIe on both of the SoCs is brought
out on the Starter-Kit (AM69) and EVM (J784S4) boards. Hence, enable
the configs required for Root-Complex mode of operation.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
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Add Kconfig option OF_SYSTEM_SETUP=y to support booting boards with a
RK3582 SoC. CPU and GPU cores are failed based on ip-state and policy.
Tested on a ROCK 5C Lite v1.1:
cpu-code: 35 82
ip-state: 10 00 00 (otp)
ip-state: 30 9e 04 (policy)
remove cpu-map cluster1
rename cpu-map cluster2
fail gpu
fail rkvdec1
fail rkvenc1
fail cpu cpu@400
fail cpu cpu@500
and on a Radxa E52C:
cpu-code: 35 82
ip-state: 00 04 00 (otp)
ip-state: c0 9e 04 (policy)
remove cpu-map cluster2
fail gpu
fail rkvdec1
fail rkvenc1
fail cpu cpu@600
fail cpu cpu@700
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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This adds support for the MT8395_EVK board with the following
features enabled/tested: Boot, UART, Watchdog and MMC.
MT8395_EVK is based on MT8195.
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Add a simple unit test for testing the RAUC bootmethod. Provide only the
very basic tests for now, running a scan and list, to verify correct
detection of the RAUC bootmethod. More advanced boot tests of this
bootmethod can be added in a separate patch.
This requires another mmc image (mmc10) to contain the following
partitions:
1. boot A: contains a dummy boot.scr
2. root A: contains an empty root filesystem
3. boot B: contains a dummy boot.scr
4. root B: contains an empty root filesystem
The bootmeth_rauc scans all four partitions for existence and expects a
boot script in each boot partition.
Also add BOOTMETH_RAUC as a dependency on sandbox so that we can test
this with:
$ ./test/py/test.py -B sandbox --build -k test_ut # build the mmc10.img
$ ./test/py/test.py -B sandbox --build -k bootflow_rauc
Signed-off-by: Martin Schwan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
[trini: mmc9 is now in use, switch to mmc10]
Signed-off-by: Tom Rini <[email protected]>
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Enable the remoteproc command, i.MX remoteproc driver, System
Manager SCMI CPU and LMM support to control the Cortex-M7.
Signed-off-by: Emanuele Ghidoli <[email protected]>
Acked-by: Francesco Dolcini <[email protected]>
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With ENV_WRITEABLE_LIST only specific environment variables lisetd in
CFG_ENV_FLAGS_LIST_STATIC are read from the u-boot environment storage.
All other environment variables are set to default values and are not
written back to the storage.
The u-boot environment usually stays for the lifetime of the product.
There is no A/B copy mechanism as for the firmware itself. That means
that incompatible changes to environment variables in future u-boot
versions may lead to serious issues if the old environment is used with
a new u-boot version or vice versa.
Having this protection in place ensures that only a limited set of
environment variables are persisted across u-boot versions. All the
macros not listed in CFG_ENV_FLAGS_LIST_STATIC are now part of the
u-boot binary which is redundant and immutable. This guarantees that
the u-boot version and the default values of these environment variables
are always in sync and cannot be changed at runtime.
ustate and rastate are not relevant for u-boot itself. ustate is used
by swupdate which persists the transaction state in the environment.
rastate is a similar variable used by another user space application.
Signed-off-by: Adrian Freihofer <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Adrian Freihofer <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Enable bootcount feature to count the boot times
Signed-off-by: Heiko Schocher <[email protected]>
Acked-by: Peng Fan <[email protected]>
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Enable the "wget" command to allow download using TCP / HTTP protocol.
This is faster than TFTP download.
Signed-off-by: Walter Schweizer <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Enable SPL_CLK_IMX8M to make sure clk_enable could work proper in SPL
phase by using clock framework driver.
Signed-off-by: Peng Fan <[email protected]>
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- Assorted platform and video driver updates
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Enable PMIC and regulators on MT8365 EVK now that there are drivers for
these. Also enable the associated commands.
Signed-off-by: David Lechner <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add a default fallback device tree in order to allow a successful build
without mentioning the DEVICE_TREE= make flag.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add support for EFI capsule updates via U-Boot's DFU. This flashes the
boot partition with the new image provided in the capsule.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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subpartitions
Some distributions tend to provide a single combined image with EFS and
the system root filesystem. Flashing it as-is in a single partition
(usually done in userdata partition as it is the largest) is not
bootable as U-Boot does not understand subpartitions.
Use blkmap to map the userdata partition into its own block device.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Enable CONFIG_CMD_STM32KEY flag to enable usage of command
stm32key.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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STM32MP21 application processors (STM32 MPUs) based on a single
Arm Cortex®-A35 core running up to 1.5 GHz and Cortex®-M33 core
running at 300 MHz.
It is pin-compatible with the STM32MP2 series in the VFBGA361
10×10 mm package: the STM32MP21 uses a subset of the STM32MP23
pinout, which itself is a subset of the STM32MP25.
More details available here :
https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Paresh Bhagat <[email protected]> says:
This series enables SPI flash support for the AM62DX EVM platform.
The first patch enables the required SPI flash configuration options in
both A53 and R5 defconfigs, including Cadence QSPI driver support, SFDP
support, and Spansion S28HX-T flash compatibility.
The second patch adds the necessary device tree configuration for the R5
SPL to support OSPI flash access during the boot process.
Boot logs
https://gist.github.com/paresh-bhagat12/ca9a05aa443c71e8baf6d8506f6ccc22
Link: https://lore.kernel.org/r/[email protected]
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Enable SPI flash support for AM62DX EVM by adding Cadence QSPI driver,
configuring 25MHz speed, and enabling SFDP support with Spansion
S28HX-T flash compatibility. Enable required SPI and MTD configs for
both A53 and R5 configurations to allow booting from SPI flash.
Signed-off-by: Paresh Bhagat <[email protected]>
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Prepare v2026.04-rc3
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OF_UPSTREAM_BUILD_VENDOR
Since the build documentation recommends using the DEVICE_TREE= make
flag, and the "board" supports multiple devices, remove the default
device tree option so as to enforce the make flag during build.
OF_UPSTREAM_BUILD_VENDOR is added so as to build all device trees
associated with the vendor with their U-Boot includes.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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OF_BOARD allows to choose the internal device tree in runtime. Use it to
pass the external FDT as an internal one if it is not present. This
approach is also used by qcom-phone, and it reduces boot image size. It
is expected that an external FDT is present as U-Boot is packaged as an
Android boot image.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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MULTI_DTB_FIT allowed a single U-Boot image to be booted in multiple
devices, but it was not a scalable solution; as more devices are added,
the U-Boot binary is bound to increase, space taken up by devicetrees
which are not even used.
The other approach is to be able to build separate images for multiple
devices using the same "board" defined in U-Boot. This is used by
qcom_phone to support muitiple devices.
Follow the said approach for Exynos devices as well, disable
MULTI_DTB_FIT for this board.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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