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The number of memory banks in QEMU is not bounded by 1.
In this example we have two banks:
qemu-system-riscv64 \
-machine virt \
-nographic \
-m 8192 \
-smp 8,sockets=2,cores=4,threads=1 \
-numa node,cpus=0-3,mem=4096 \
-numa node,cpus=4-7,mem=4096 \
-kernel u-boot
As we will see RISC-V NUMA systems using U-Boot
we should be able to emulate these.
Use the default value defined in /Kconfig as 4.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Add pinctrl support in bananapi-f3 platform
Signed-off-by: Huan Zhou <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Hrushikesh Salunke <[email protected]> says:
TI's AM64 SoC has a single instance of Cadence PCIe Controller. This
series enables support for PCIe in AM64 SoC and to configure it in
Root-Complex mode of operation.
Link: https://lore.kernel.org/r/[email protected]
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TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which
is Cadence PCIe Controller. To support PCIe functionality with PCIe0
instance in Root-Complex mode enable corresponding configs. Also enable
configs to support NVMe over PCIe.
Signed-off-by: Hrushikesh Salunke <[email protected]>
Reviewed-by: Siddharth Vadapalli <[email protected]>
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Judith Mendez <[email protected]> says:
This patch series fixes MMC_HS_52 mode in am654_sdhci driver,
as well as HIGH_SPEED_ENA and UHS_MODE_SELECT for HS modes.
Also add TI_COMMON_CMD_OPTIONS to K3 Sitara board a53 defconfigs.
Link: https://www.ti.com/lit/er/sprz574a/sprz574a.pdf
Link: https://lore.kernel.org/r/[email protected]
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Add TI_COMMON_CMD_OPTIONS config options to Sitara K3 boards at
a53 stage since we rely on most of the commands implied for testing
and debugging purposes. Since all commands are now enabled by
default, remove the redundant CMD_* options in the a53 defconfigs.
Also add MMC_REG & MMC_SPEED_MODE_SET useful commands to
TI_COMMON_CMD_OPTIONS.
Signed-off-by: Judith Mendez <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
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SPL_TEXT_BASE is used as the load address for the main domain SPL on k3
platforms.
Since the config value is the same for every board, this patch sets the
value 0x80080000 as default for all 64-bit ARCH_K3, 0x43c00000 as
default for the R5 cores and deletes the instances of SPL_TEXT_BASE in
individual defconfigs.
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Jerome Forissier <[email protected]> says:
This series introduces threads and uses them to improve the performance
of the USB bus scanning code and to implement background jobs in the
shell via two new commands: 'spawn' and 'wait'.
The threading framework is called 'uthread' and is inspired from the
barebox threads [2]. setjmp() and longjmp() are used to save and
restore contexts, as well as a non-standard extension called initjmp().
This new function is added in several patches, one for each
architecture that supports HAVE_SETJMP. A new symbol is defined:
HAVE_INITJMP. Two tests, one for initjmp() and one for the uthread
scheduling, are added to the lib suite.
After introducing threads and making schedule() and udelay() a thread
re-scheduling point, the USB stack initialization is modified to benefit
from concurrency when UTHREAD is enabled, where uthreads are used in
usb_init() to initialize and scan multiple busses at the same time.
The code was tested on arm64 and arm QEMU with 4 simulated XHCI buses
and some devices. On this platform the USB scan takes 2.2 s instead of
5.6 s. Tested on i.MX93 EVK with two USB hubs, one ethernet adapter and
one webcam on each, "usb start" takes 2.4 s instead of 4.6 s.
Finally, the spawn and wait commands are introduced, allowing the use of
threads from the shell. Tested on the i.MX93 EVK with a spinning HDD
connected to USB1 and the network connected to ENET1. The USB plus DHCP
init sequence "spawn usb start; spawn dhcp; wait" takes 4.5 seconds
instead of 8 seconds for "usb start; dhcp".
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=446674
[2] https://github.com/barebox/barebox/blob/master/common/bthread.c
Link: https://lore.kernel.org/r/[email protected]
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Enable UTHREAD and CMD_SPAWN on supported QEMU platforms for testing
purposes.
Signed-off-by: Jerome Forissier <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/25909
Please pull the updates for rockchip platform:
- New SoC support: RK3528, RK3576
- New Board support: rk3528 Radxa E20C, rk3576 Firefly ROC-RK3576-PC;
- Add generic board for rk3288 and rk3399;
- rng driver binding update;
- misc updates on board level or header files;
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Add a minimal generic RK3399 board that only have eMMC, SDMMC, SPI flash
and USB OTG enabled. This defconfig can be used to boot from eMMC,
SD-card or SPI flash on most RK3399 boards that follow reference board
design.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Christopher Obbard <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add a minimal generic RK3328 board that only have eMMC, SDMMC, SPI flash
and USB OTG enabled. This defconfig can be used to boot from eMMC,
SD-card or SPI flash on most RK3328 boards that follow reference board
design.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Christopher Obbard <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The ROC-RK3576-PC is a SBC made by Firefly, designed around the RK3576
SoC. This adds the needed board infrastructure and config for it.
Signed-off-by: Heiko Stuebner <[email protected]>
Reviewed-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The Radxa E20C is an ultra-compact network computer with a RK3528A SoC
that offers a wide range of networking capabilities.
Features tested on a Radxa E20C v1.104:
- SD-card boot
- eMMC boot
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add a minimal generic RK3528 board that only have eMMC and SD-card
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3528 boards that follow reference board design.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The meminfo and rng commands are helpful for testing, enable them.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The meminfo and rng commands are helpful for testing, enable them.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Haikou carrierboard allows multiple adapter boards to be connected, for
now there exists the following adapter boards compatible with PX30
Ringneck:
- Haikou Video Demo on the Video Connector,
- Haikou LVDS 9904379 on the Video Connector,
So support DT overlays so we can use this mechanism instead of full DTB
containing both the carrierboard and the adapter.
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add sandbox64_lwip_defconfig based on sandbox64_defconfig with NET_LWIP
enabled.
Signed-off-by: Jerome Forissier <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The default value of 0x800000 (8 MB) is somewhat limiting for us, as our
compressed kernel may grow up to around 4 MB. By choosing the commonly
used value of 0x2000000 (32 MB), we are definitely on the safe side.
This rather large amount should be fine, as we have 128 MB of RAM.
Signed-off-by: Ezra Buehler <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Jiaxun Yang <[email protected]> says:
This is a huge series which promoted MIPS/Boston target into a
usable state, with fixes to drivers and general framework issues
I found in this process.
I also converted the target to OF_UPSTREAM.
This target is covered by QEMU, to test on QEMU:
```
make boston64r6el_defconfig
make
qemu-system-mips64el -M boston -cpu I6500 -bios ./u-boot.bin -nographic
```
Link: https://lore.kernel.org/r/[email protected]
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We can now boot with upstream devicetree.
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Jiaxun Yang <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
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Heinrich Schuchardt <[email protected]> says:
For QEMU we have developed supporting passsing through ACPI tables.
This functionality has been broken multipled times due to missing CI
builds.
* Two new defconfigs qemu_arm64_acpi and qemu-riscv64_smode_acpi.
* Assign the defconfigs to the respective maintainers.
Link: https://lore.kernel.org/r/[email protected]
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Jerome Forissier <[email protected]> says:
Enable CONFIG_UNIT_TEST in most of the configs/qemu*_defconfig files
to increase test coverage in CI, and fix what needs to be fixed.
Link: https://lore.kernel.org/r/[email protected]
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Jerome Forissier <[email protected]> says:
There is a bug in the print_guid() unit test in test/common/print.c when
PARTITION_TYPE_GUID is not enabled but either CMD_EFIDEBUG or EFI are.
The first patch fixes the issue and the second one enables UNIT_TEST in
the qemu_arm64 defconfig so that the unit tests are run in CI (this
platform has CMD_EFIDEBUG so the bug applies).
Link: https://lore.kernel.org/r/[email protected]
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Enable CONFIG_UNIT_TEST in configs/qemu_arm64_defconfig so that the unit
tests are run in CI.
Signed-off-by: Jerome Forissier <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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Add a configuration that supports ACPI.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Add a qemu_arm64 variant that supports ACPI.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The qemu* "generic" targets (i.e. not those emulating a particular
board) are typically used for testing as many features as possible,
especially in CI so it makes sense to have UNIT_TEST enabled for
all of the defconfigs for these targets.
Not enabling UNIT_TEST in qemu-x86_defconfig due to:
LD u-boot
ld.bfd: section .rel.dyn VMA wraps around address space
ld.bfd: section .start16 LMA [fffff800,fffff86f] overlaps section .rel.dyn LMA [ffffb77c,0002ac93]
make: *** [Makefile:1824: u-boot] Error 1
Suggested-by: Tom Rini <[email protected]>
Signed-off-by: Jerome Forissier <[email protected]>
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Use GPIO hogging method in device tree to set SDIO_SEL pin (portb3)
direction as output with value 0 after power-on reset.
This is to ensure stable 0V voltage reading from SDIO_SEL GPIO pin
after board init.
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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CONFIG_BLOBLIST_FIXED and CONFIG_BLOBLIST_ADDR options were
unintentionally removed during recent external updates to the defconfig.
This patch restores the missing entries to ensure proper board
functionality. No new features are introduced.
Fixes: d6a53f523afe ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Tingting Meng <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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Vendor Authorized Boot flow configurations are enabled for boards
based on Agilex5 SoCFPGA. Also, required changes are made to the
SoCFPGA make file for building and linking relevant secure source
code files.
Signed-off-by: Naresh Kumar Ravulapalli <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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Enable Marvell Ethernet PHYs support for Agilex5 defconfig
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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Rather than maintaining custom hush scripting to boot the SDK, migrate
to a 'standard boot' method which simplifies maintenance and enables
multiple distributions to use this evaluation module.
Signed-off-by: Bryan Brattlof <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2025.07-rc1
AMD/Xilinx:
- Synchronize enums around tcm_mode
- Access bootmode registers via firmware interface
- Setup default values for DEBUG_UART
- Fix dfu alt buffer clearing
- Convert loadpdi command to fpga
- Fix board detection code
- Minor defconfig updates
Versal:
- Wire multi_boot register
Versal Gen 2:
- Enable missing drivers
- Wire i2c FRU decoding at start
- Wire saving variables to different locations
- Disable default DEBUG_UART
- Wire USB/UFS boot and fix access via firmware interface
- Minor fixes
ZynqMP/Kria:
- Enable mkfwumdata
- Topic board update
- Enhance binman configurations
- Kria usb update
BuR:
- Add multiple Zynq based boards
cadence_ospi:
- Enable device reset
fpga:
- Add support for loading bitstream for Altera SoCs
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Enable Airoha SNFI SPI config to enable support for SNAND flash.
Signed-off-by: Christian Marangi <[email protected]>
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Enable Mediatek MMC driver in Airoha AN7581 EVB defconfig to add support
for it in default images.
Signed-off-by: Christian Marangi <[email protected]>
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Add Ethrnet config to defconfig to enable Ethernet support.
Signed-off-by: Christian Marangi <[email protected]>
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This commit adds support for the brcp1, brsmarc2, brcp150 and brcp170
boards. This boards are based on the Xilinx Zynq SoC.
Signed-off-by: Bernhard Messerklinger <[email protected]>
Acked-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Presently the multi dtb's are not using on versal Gen 2
platform, so remove CONFIG_DTB_RESELECT and CONFIG_MULTI_DTB_FIT
from defconfig.
Signed-off-by: Padmarao Begari <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Enable saving variables to MMC(FAT) and SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).
Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal Gen 2 platform.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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HBM stands for high bandwidth memory and is a type of memory interface used
in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka
graphics cards), as well as the server, high-performance computing (HPC)
and networking and client space. High Bandwidth Memory(HBM) has total 16
channels, one channel is divided into two pseudo channels which makes its
32 banks each with some amount of memory.
And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high
and pretty much there should be also place for PL DDR. So maximum number of
memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Remove uartlite serial driver from defconfigs because is not tested or used
on ARM based platform as console.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/86b100692101089dd8d9a8eed45461e8855384bc.1744270698.git.michal.simek@amd.com
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Enable NVMEM framework to be able to for example read MAC address from
eeprom. For more information please look at commit 5db5b7e2a336 ("xilinx:
Enable NVMEM framework for all platforms").
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/b6714165aee393528812ddbfc3cd18a3bbcf202e.1744270647.git.michal.simek@amd.com
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Enabel SMBIOS command as was done by commit aa815e6c7603 ("xilinx: Enable
SMBIOS command") for our other platforms.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/c1e236003c6ec250dbcc5178c873c171fffccd29.1744270535.git.michal.simek@amd.com
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The mini u-boot is getting exception because of an initial
stack pointer address is used at near the top of memory,
and while executing u-boot is assigned pre-malloc and
global_data memory after initial stack pointer and updated
the stack pointer. Serial driver is used pre-malloc area
for serial operations before relocation. But pre-malloc area
is cleared while doing BSS at relocation time. The u-boot is
called board_init() function and doing printf, relocation serial
driver is not initialized yet, so it is using before relocation
serial operations but it is cleared by BSS and got the exception.
To fix, change an initial stack pointer address from near the
top of memory to near the relocation memory.
Fixes: 685874939a5e ("configs: versal: update initial stack pointer")
Signed-off-by: Padmarao Begari <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Add support for loading the secure & non-secure pdi images and PL
bitstream on the Versal Gen2 platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal Gen2 device.
PDI is the new programmable device image format for Versal Gen2,
and the bitstream for the Versal Gen2 platform is generated exclusively
in this format.
With the enhanced SMC format in TF-A ensuring transparent payload
forwarding for Versal Gen2, the u-boot driver must now handle the
word swapping of PDI address that was previously done in TF-A for
this API. The source code for the Versal2 loadpdi command and the
CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Add support for loading the secure & non-secure pdi images and
PL bitstream on the Versal NET platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal NET device.
PDI is the new programmable device image format for Versal NET,
and the bitstream for the Versal NET platform is generated exclusively
in this format.
The source code for the versalnet loadpdi command and the
CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Update the TEXT_BASE and DTB address as per the new memory map.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/3ffb6f1f7ff418f01ccc2eccf8a834441f9f0b74.1742461498.git.michal.simek@amd.com
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There is no reason to enable DEBUG uart used for early debugging by default
that's why disable it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/ff61ec2fc213bb3a9640015c6588e9b48ae38967.1742460228.git.michal.simek@amd.com
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