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Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This file apparently hasn't seen an update in a while, so just sync
it with reality.
Signed-off-by: Andre Przywara <[email protected]>
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By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Signed-off-by: Alexander Graf <[email protected]>
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Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Minkyu Kang <[email protected]>
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This patch adds code which sets up 2-level page tables on ARM64 thus
extending available VA space. CPUs implementing 64k translation
granule are able to use direct PA-VA mapping of the whole 48 bit
address space.
It also adds the ability to reset the SCTRL register at the very beginning
of execution to avoid interference from stale mappings set up by early
firmware/loaders/etc.
Signed-off-by: Sergey Temerkhanov <[email protected]>
Signed-off-by: Radha Mohan Chintakuntla <[email protected]>
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Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: David Feng <[email protected]>
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