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Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts QEMU x86 board specific information from README.x86,
converts plain text documentation to reST format and adds it to
Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts coreboot board specific information from README.x86,
converts plain text documentation to reST format and adds it to
Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts Google Chromebook Samus board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts Google Chromebook Link board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts Intel Galileo board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts Intel Edison board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Andy Shevchenko <[email protected]>
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This extracts Intel Cougar Canyon 2 board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts Intel Cherry Hill board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts Intel Bay Trail based board specific information from
README.x86, converts plain text documentation to reST format and
adds them to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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This extracts Intel Crown Bay board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <[email protected]>
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There are quite a few variables which control where things appear in the
final ROM image. Add a flashmap in the documentation to make this easier
to figure out.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
[bmeng: squashed "x86: Update the memory map a little" in]
[bmeng: fixed typo of 'documentation' in the commit title]
Signed-off-by: Bin Meng <[email protected]>
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There are some sections in current doc saying 64-bit is unsupported.
This apparently is out of date. Remove it.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Currently only 32-bit U-Boot for QEMU x86 is documented. Mention
the 64-bit support.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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There is no need to keep a separate coreboot_fb.dtsi since now we
have a generic coreboot payload dts.
While we are here, this also remove the out-of-date description in
the documentation regarding to coreboot framebuffer driver with
U-Boot loaded as a payload from coreboot. As the testing result with
QEMU 2.5.0 shows, the driver just works like a charm.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.
But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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CONFIG_EFI_LOADER is fully supported on x86 now.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
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Since commit f3b5056c4e72 ("efi_loader: split README.efi into two
separate documents"), the original README.efi was renamed to
README.u-boot_on_efi, but x86 doc still refers to the old one.
This updates the x86 doc to reference both README.u-boot_on_efi and
README.uefi.
Signed-off-by: Bin Meng <[email protected]>
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As README.x86 already mentions, there are two SPI flashes mounted
on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores
the actual BIOS image which is U-Boot. Building a single image with
both ME firmware and U-Boot does not make sense.
This also describes the exact flash location where the u-boot.rom
should be programmed in the documentation.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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We only use coreboot as a target on x86 platforms, since on ARM platforms
U-Boot always runs as the primary boot loader. Rename the coreboot-x86
platform to reflect this.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Up to now we depended on an exported variable to build u-boot.rom.
We should be able to specify it in the configuration file, too.
With this patch this becomes possible using the new Kconfig option
CONFIG_BUILD_ROM.
This option depends on CONFIG_X86 and is selected in
qemu-x86_defconfig and qemu-x86_64_defconfig.
Cc: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
can be built again.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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This adds support to Intel Cherry Hill board, a board based on
Intel Braswell SoC. The following devices are validated:
- serial port as the serial console
- on-board Realtek 8169 ethernet controller
- SATA AHCI controller
- EMMC/SDHC controller
- USB 3.0 xHCI controller
- PCIe x1 slot with a graphics card
- ICH SPI controller with an 8MB Macronix SPI flash
- Integrated graphics device as the video console
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Also introduce CONFIG_USE_BOOTARGS option so we can control if
CONFIG_BOOTARGS defined at all.
Signed-off-by: Sam Protsenko <[email protected]>
[trini: Resync r8a779[56]_ulcb, various ls10xx targets]
Signed-off-by: Tom Rini <[email protected]>
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Add Intel Edison board which is using U-Boot.
The patch is based on work done by the following people (in alphabetical
order):
Aiden Park <[email protected]>
Dukjoon Jeon <[email protected]>
eric.park <[email protected]>
Fabien Chereau <[email protected]>
Felipe Balbi <[email protected]>
Scott D Phillips <[email protected]>
Sebastien Colleur <[email protected]>
Steve Sakoman <[email protected]>
Vincent Tinelli <[email protected]>
In case we're building for Intel Edison, we must have 4096 bytes of
zeroes in the beginning on u-boot.bin. This is done in
board/intel/edison/config.mk.
First run sets hardware_id environment variable which is read from
System Controller Unit (SCU).
Serial number (serial# environment variable) is generated based on eMMC
CID.
MAC address on USB network interface is unique to the board but kept the
same all over the time.
Set mac address from U-Boot using following scheme:
OUI = 02:00:86
next 3 bytes of MAC address set from eMMC serial number
This allows to have a unique mac address across reboot and flashing.
Signed-off-by: Vincent Tinelli <[email protected]>
Signed-off-by: Felipe Balbi <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
[bmeng: Add MAINTAINERS file for Intel Edison board]
Signed-off-by: Bin Meng <[email protected]>
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Now that we have ACPI S3 support on Intel MinnowMax board, document
some generic information of S3 and how to test it.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Stefan Roese <[email protected]>
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Enable this so that EFI applications (notably grub) can be run under U-Boot
on x86 platforms.
At present the 'hello world' EFI application is not supported for the
qemu-x86_efi_payload64 board. That board builds a payload consisting of a
64-bit header and a 32-bit U-Boot, which is incompatible with the way the
EFI loader builds its EFI application. The following error is obtained:
x86_64-linux-ld.bfd: i386 architecture of input file
`lib/efi_loader/helloworld.o' is incompatible with i386:x86-64 output
This could be corrected with additional Makefile rules. For now, this
feature is disabled for that board.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
[agraf: drop hello kconfig bits]
Signed-off-by: Alexander Graf <[email protected]>
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This converts coreboot to use DM framebuffer driver.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The kernel load address for zboot should be 0x1000000.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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For some unknown reason, coreboot framebuffer driver never works on
QEMU since day 1. It seems the driver only works on real hardware.
Document this issue.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This feature is not supported. Document this, and add some details on how it
might be implemented.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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UEFI is commonly used on x86. Add a reference to U-Boot's support for this
in the x86 README.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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The debug FSP image is bigger in size than the normal FSP image. This
patch adds a small description on how to use this FSP debug version
by changing CONFIG_FSP_ADDR.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Now that platform-specific ACPI global NVS is added, pack it into
ACPI table and get its address fixed up.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: George McCollister <[email protected]>
Tested-by: George McCollister <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Enable ACPI table generation by creating a DSDT table.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Windows might cache system information and only detect ACPI changes
if you modify the ACPI table versions.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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As of now, U-Boot can support installing and booting Ubuntu/Windows
with the help of SeaBIOS. Update the documentation.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Document how to make SeaBIOS load and run the VGA ROM of Intel
IGD device when loaded by U-Boot.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Currently U-Boot environment address is at offset 0x7fe00 of a 8MB
SPI flash. When creating a partial u-boot.rom image without flash
descriptor and ME firmware, U-Boot actually occupies the last 1MB
of the flash, and reprograming U-Boot causes previous environment
settings get lost which is not convenient during testing.
Adjust the environment address to 0x6ef000 instead (before the MRC
cache data region in the flash).
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Remove ACPI from the TODO list and add a new section to document
current ACPI support in U-Boot.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to 80 cols
- Correct some typos (drive, it's, Ubuntu)
- Add description for "console=ttyS0,115200"
- Remove CONFIG_BOOTDELAY description which is already
in x86-common.h
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This adds basic support for chromebook_samus. This is the 2015 Pixel and
is based on an Intel broadwell platform.
Supported so far are:
- Serial
- SPI flash
- SDRAM init (with MRC cache)
- SATA
- Video (on the internal LCD panel)
- Keyboard
Various less-visible drivers are provided to make the above work (e.g. PCH,
power control and LPC).
The platform requires various binary blobs which are documented in the
README. The major missing feature is USB3 since the existing U-Boot support
does not work correctly with Intel XHCI controllers.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Update a few points which have become out-of-date.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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It is useful to automate the process of converting code from coreboot a
little. Add a sed script which performs some common transformations.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Bin Meng <[email protected]>
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Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Update existing documentation to mention Intel Bayley Bay board
instructions, an additional Bay Trail based board to MinnowMax.
This also adds a minor change to QEMU section to indicate clearly
the instructions are for bare mode.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This adds basic support to Intel Cougar Canyon 2 board, a board
based on Chief River platform with an Ivy Bridge processor and
a Panther Point chipset.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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This patch adds a parameter to the function setup_early_uart() to either
enable or disable the internal BayTrail legacy UART. Since the name
setup_early_uart() does not match its functionality any more, lets
rename it to setup_internal_uart() as well in this patch.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Document the usage of 'qfw' command
Signed-off-by: Miao Yan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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