| Age | Commit message (Collapse) | Author |
|---|
|
|
|
The labels for the boot mode switches were incorreclty documented for
some TI boards, this patch fixes them as per the official user guides
linked below:
AM62x https://www.ti.com/lit/ug/spruj40e/spruj40e.pdf
AM62dx https://www.ti.com/lit/ug/sprujg2/sprujg2.pdf
AM62ax https://www.ti.com/lit/ug/spruj66b/spruj66b.pdf
AM62px https://www.ti.com/lit/ug/spruj40e/spruj40e.pdf
AM6254atl https://www.ti.com/lit/ug/spruja1a/spruja1a.pdf
Signed-off-by: Anshul Dalal <[email protected]>
|
|
CFG_WITH_SOFTWARE_PRNG=y was added as an OPTEE argument to workaround
some bugs related to TRNG which have been fixed now[1]. Therefore this
patch drops the redundant argument from the documentation.
[1]: https://github.com/OP-TEE/optee_os/commit/e313f4765fd0478bb66985827441411793433773
Signed-off-by: Anshul Dalal <[email protected]>
Acked-by: Francesco Dolcini <[email protected]> # Toradex Verdin AM62
|
|
Siddharth Vadapalli <[email protected]> says:
This series adds PCIe endpoint boot support for the TI J784S4 SoC.
Series is based on commit f9ffeec4bdc ("board: toradex: Make A53 get RAM
size from DT in K3 boards") of the master branch of U-Boot.
PCIe Boot Logs (J784S4-EVM running Linux as Root-Complex transfers
bootloaders to another J784S4-EVM configured for PCIe Boot):
https://gist.github.com/Siddharth-Vadapalli-at-TI/2d157003818441fe79a139d0dec1058a
Link: https://lore.kernel.org/r/[email protected]
|
|
Add PCIe boot documentation for J784S4-EVM including boot mode switch
settings, hardware setup requirements, endpoint configuration details
and step-by-step boot procedure.
Signed-off-by: Hrushikesh Salunke <[email protected]>
[[email protected]: simplified and documented the pcie_boot_util program]
Co-developed-by: Siddharth Vadapalli <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
Reviewed-by: Udit Kumar <[email protected]>
|
|
Neha Malcom Francis <[email protected]> says:
Typically we do not enable these configs by default but would still like to
have the option to start building them in our default build flow for
testing. Also there is the added advantage of users being able to see what
is needed in case they choose to enable these features.
Link: https://lore.kernel.org/r/[email protected]
|
|
Add sections dedicated to explaining how BIST and inline ECC can be
enabled via the config fragments.
Signed-off-by: Neha Malcom Francis <[email protected]>
|
|
Document how one can use the CONFIG_SPL_AM33XX_MMCSD_MULTIPLE option
to implement a scheme for failsafe updating of the whole bootloader on
the am335x.
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
Add info of boot flow and build steps for AM62Dx EVM.
Signed-off-by: Paresh Bhagat <[email protected]>
|
|
README.falcon was converted to ReST/HTML in 2023.
Signed-off-by: J. Neuschäfer <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
The alt name for tispl binary is "tispl.bin" and not "tispl", this patch
fixes the documentation to the correct alt name.
Fixes: def64b493748 ("doc: board: Add document for DFU boot on am62x SoCs")
Fixes: 3633fdbb6b90 ("ti: add support for AM6254atl SiP")
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
|
|
s/Uenv.txt/uEnv.txt
s/then/than
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
|
|
J742S2 SOC is derivative of J784S4, most of build infra of j784s4 is used
to build u-boot for J742S2 EVM board.
Add guide users on how to build for that board.
Signed-off-by: Udit Kumar <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
|
|
The SPL_TEXT_BASE for AM62x SiP is set as 0x82000000 whereas the
documentation states 0x81880000 as the PRELOADED_BL33_BASE value.
Both should match to allow TFA to jump to the address where A53 SPL has
been loaded.
Signed-off-by: Anshul Dalal <[email protected]>
Acked-by: Heinrich Schuchardt <[email protected]>
|
|
Update the TI firmware repository URL from git.ti.com to the
GitHub mirror at github.com/TexasInstruments/ti-linux-firmware
which is much more reliable.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reported-by: Tom Rini <[email protected]>
Tested-by: Heinrich Schuchardt <[email protected]>
|
|
Anshul Dalal <[email protected]> says:
This patch series adds support for AM6254atl SiP (or AM62x SiP for
short) to U-Boot.
The OPN (Orderable Part Number) 'AM6254atl' expands as follows[1]:
AM6254atl
||||
|||+-- Feature Lookup (L indicates 512MiB of integrated LPDDR4)
||+--- Device Speed Grade (T indicates 1.25GHz on A53 cores)
|+---- Silicon PG Revision (A indicates SR 1.0)
+----- Core configuration (4 indicates A53's in Quad core config)
AM62x SiP provides the existing AM62x SoC with 512MiB of DDR
integrated in a single packages. The first 4 patches in the series
are cherry-picked from the devicetree-rebasing repository at
'v6.18-rc2-dts'.
Link: https://lore.kernel.org/r/[email protected]
|
|
TI's AM6254atl (or AM62x SiP for short) provides the existing AM62x SoC
with 512MiB of DDR integrated in a single package.
This patch adds the necessary U-Boot devie tree files, the required
defconfigs along with the documentation for the AM62x SiP EVM.
AM62x SiP differs from the already supported AM62x in following ways:
- OP-TEE for the AM62x resides from 0x9e800000 to 0xa0000000 which needs
to be moved to 0x80080000 to free up space at end of DDR in AM62x SiP
with 512MiB of memory. This is required to allow U-Boot to relocate to
end of DDR before booting to the kernel.
- Changes to the env:
1. splashimage address updated from 0x80200000 to 0x81a00000
2. DFU addresses updated to match updated TEXT_BASE for SPL and U-Boot
Signed-off-by: Anshul Dalal <[email protected]>
|
|
This patch adds user documentation for R5 falcon mode for AM62
platforms. The main section is added to am62x_sk.rst and other documents
just include the relevant sections. Steps to build falcon support, usage
and the modified R5 memory map have been documented.
Two svg images have also been added for reference, one for the modified
tifalcon.bin and other for the fitImage format specific to R5 falcon
mode.
Signed-off-by: Anshul Dalal <[email protected]>
|
|
The j722s_evm support is now largely complete and is certainly
not limited to UART boot so drop the confusing note from the docs.
Signed-off-by: Peter Robinson <[email protected]>
|
|
Link: https://lore.kernel.org/u-boot/20250829191830.GZ124814@bill-the-cat/
Add documentation for config changes required to enable Falcon SD-FAT boot.
Signed-off-by: Sidharth Seela <[email protected]>
Cc: Tom Rini <[email protected]>
|
|
The AM62Ax SoC family was the last part from TI to support the GP
security variant, however this security variant was used mostly
internally and with select early partners and never sold publicly.
To simplify things and to avoid any confusion of which parts are
supported in the future, remove the GP tiboot3.bin builds from binman.
Signed-off-by: Bryan Brattlof <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
|
|
The J784S4 and AM69 Platforms page only details the defconfigs for
J784S4.
Mention the ones needed for AM69-SK as well, to guide users on how to
build for that board.
Signed-off-by: Mattijs Korpershoek <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
|
|
This adds initial support for the Toradex Verdin AM62P module.
The module consists of an TI AM62P family SoC, a TPS65219 PMIC, a
Gigabit Ethernet PHY, up to 8GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC,
an I2C EEPROM, an RX8130 RTC, plus an optional Bluetooth/Wi-Fi module.
These specific changes adds support for Toradex Verdin AM62P Quad 2GB WB
IT module.
Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Parth Pancholi <[email protected]>
Signed-off-by: Vitor Soares <[email protected]>
|
|
Nishanth Menon <[email protected]> says:
Just happened to get a BeagleY-AI at desk and happened to test master
branch (7dd49a9264a6 drivers: scsi: Add 'erase' support), noticed a few
issues which were rather easy to solve.. so, here we go:
Link: https://lore.kernel.org/r/[email protected]
|
|
Document the BeagleY-AI usage, build and basic debug hints
Reviewed-by: Udit Kumar <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
|
|
The code-block directive supports the optional language property which
enables syntax highlighting for the block[1].
This patch adds the relevant language property for code-blocks in k3
docs.
[1]:
https://www.sphinx-doc.org/en/master/usage/restructuredtext/directives.html#directive-code-block
Signed-off-by: Anshul Dalal <[email protected]>
|
|
The code-block directive requires addition of the prompt symbol for each
line, using the prompt directive instead allows for auto insertion of
the symbol per line[1].
For the readers, the character added by the prompt directive is
un-selectable i.e the entire line can be more easily selected for copy
pasting etc. Whereas with code-block, the prompt symbol like "$" is also
selectable which is usually not the intent.
This is mostly a QoL addition + making the docs consistent since k3.rst
makes use of prompt directives which these board docs include from.
[1]: https://pypi.org/project/sphinx-prompt/
Signed-off-by: Anshul Dalal <[email protected]>
|
|
J722S has hw rng, which can be used by OPTEE.
So remove option to use SW TRNG by OPTEE.
Signed-off-by: Udit Kumar <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
|
|
Add documentation for PHYTEC phyCORE-AM62ax SoM.
Signed-off-by: Garrett Giordano <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
|
|
Sphinx writes a warning if a page is included twice in the table of
contents. Use references instead.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Acked-by: Neha Malcom Francis <[email protected]>
|
|
Document the procedure to enable Ethernet Boot on AM62x SoC.
Signed-off-by: Chintan Vankar <[email protected]>
|
|
Add Android bootflow support for AM62X SK EVM board with
new android boot method.
To build for AM62x for Android, we use the
am62x_a53_android.config fragment when building A53 bootloaders:
$ make am62x_evm_a53_defconfig
$ make am62x_a53_android.config
$ make
Co-developed-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Guillaume La Roque <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
|
|
Since AM62x, AM62P and AM62A all use similar boot flows and their low
power mode s/w ARCH is also similar in the way that they make use of the
TIFS Stub, update their documentation to show where TIFS Stub is.
Reviewed-by: Nishanth Menon <[email protected]>
Signed-off-by: Dhruva Gole <[email protected]>
|
|
Use the new boot_firmwares labels that help make documentation more
specific as to which firmwares are used in which devices
Signed-off-by: Dhruva Gole <[email protected]>
|
|
* Add documentation to briefly explain the role of TIFS Stub in relevant
K3 SoC's.
* Shed light on why TIFS Stub isn't package with the DM firmware itself.
* Modify the platform docs wherever the TIFS Stub documentation applies.
* Also, refactor and add a few new labels to help split the firmware
documentation chunks. This will make it easier to include them one by
one wherever applicable
Reviewed-by: Nishanth Menon <[email protected]>
Signed-off-by: Dhruva Gole <[email protected]>
Acked-by: Francesco Dolcini <[email protected]> # verdin-am62
|
|
Prepare v2024.07-rc5
|
|
Added introductory documentation about capsule support for TI devices,
including links to more detailed information.
Also added a note in the build secction that points to the host package
dependency docs.
This patch is followup from a request in the series introducing capsule
update for TI boards.
https://lore.kernel.org/r/20240618145058.552eapp5iiz772ej@hardcore
Signed-off-by: Jonathan Humphreys <[email protected]>
|
|
Jayesh Choudhary <[email protected]> says:
Hello there,
This series add the U-Boot support for our new platform of K3-SOC
family - J722S-EVM which is a superset of AM62P. It shares the same
memory map and thus the nodes are being reused from AM62P includes
instead of duplicating the definitions.
Some highlights of J722S SoC (in addition to AM62P SoC features) are:
- Two Cortex-R5F for Functional Safety or general-purpose usage and
two C7x floating point vector DSP with Matrix Multiply Accelerator
for deep learning.
- Vision Processing Accelerator (VPAC) with image signal processor
and Depth and Motion Processing Accelerator (DMPAC).
- 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio,
4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP,
ePWM, among other peripherals.
TRM: <https://www.ti.com/lit/zip/sprujb3>
Schematics: <https://www.ti.com/lit/zip/sprr495>
Boot test log:
<https://gist.github.com/Jayesh2000/0313e58fde377f877a9a8f1acc2579ef>
|
|
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
|
|
Added OSPI NOR flash layout diagram, as well as example commands to flash
firmware to it. Added OSPI boot mode pin setting.
Signed-off-by: Jonathan Humphreys <[email protected]>
|
|
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Updated OSPI flash layout diagram.
Signed-off-by: Jonathan Humphreys <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Few cosmetic fixes for clarity and spelling mistakes.
Signed-off-by: Jonathan Humphreys <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
|
|
Both AM62 SK and beagleplay support DFU boot in a similar way now;
Document how to actually run DFU boot for both boards
Signed-off-by: Sjoerd Simons <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Tested-by: Mattijs Korpershoek <[email protected]> # on beagle play
Signed-off-by: Martyn Welch <[email protected]>
|
|
Introduce basic documentation for the am62p family of SoCs.
Signed-off-by: Bryan Brattlof <[email protected]>
|
|
TI K3 J784S4 and AM69 are new additions to the K3 SoC family.
Add documentation about the J784S4 EVM and AM69 SK.
Signed-off-by: Dasnavis Sabiya <[email protected]>
Signed-off-by: Apurva Nandan <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]> # AM69-SK
|
|
Add documentation for PHYTEC phyCORE-AM62x SoM.
Signed-off-by: Wadim Egorov <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
|
|
This commit adds a general flow to explain the usage of firewalls and
the chain of trust in K3 devices.
Signed-off-by: Manorit Chawdhry <[email protected]>
|
