| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2014-11-25 | x86: ivybridge: Add additional LPC init | Simon Glass | |
| Set up all the remaining pieces of the LPC (low-pin-count) peripheral in PCH (Peripheral Controller Hub). Signed-off-by: Simon Glass <[email protected]> | |||
| 2014-11-21 | x86: ivybridge: Add early LPC init so that serial works | Simon Glass | |
| The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device which provides a serial port. This is accessible on Chromebooks, so enable it early in the boot process. Signed-off-by: Simon Glass <[email protected]> | |||
| 2013-06-26 | cros: add cros_ec driver | Hung-ying Tyan | |
| This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <[email protected]> Signed-off-by: Bill Richardson <[email protected]> Signed-off-by: Che-Liang Chiou <[email protected]> Signed-off-by: Doug Anderson <[email protected]> Signed-off-by: Gabe Black <[email protected]> Signed-off-by: Hung-ying Tyan <[email protected]> Signed-off-by: Louis Yung-Chieh Lo <[email protected]> Signed-off-by: Randall Spangler <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Vincent Palatin <[email protected]> Acked-by: Simon Glass <[email protected]> Tested-by: Simon Glass <[email protected]> | |||
