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2024-08-28mtd: rawnand: meson: refactor use of 'meson_nfc_cmd_access()'Arseniy Krasnov
Move call 'meson_nfc_cmd_seed()' and check for 'NAND_NEED_SCRAMBLING' to 'meson_nfc_cmd_access()', thus removing code duplication. Signed-off-by: Arseniy Krasnov <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2024-08-28mtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flagArseniy Krasnov
Based on Linux kernel: commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a boot device") Allow to define a NAND chip as a boot device. This can be helpful for the selection of the ECC algorithm and strength in case the boot ROM supports only a subset of controller provided options. Signed-off-by: Arseniy Krasnov <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2024-08-27mtd: nand: raw: omap_gpmc: Check return value of gpmc_nand_initVignesh Raghavendra
If the function is called with no NAND device attached, then this function can return error value, proceeding further ignoring the same can cause system crash. This is seen when "mtd list" is run with no NAND addon cards connected. Signed-off-by: Vignesh Raghavendra <[email protected]> Acked-by: Roger Quadros <[email protected]>
2024-08-08Merge tag 'u-boot-nand-20240808' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-nand-flash This series adds support for the UBI block device, which allows to read/write data block by block. The series was tested by Alexey Romanov on SPI NAND. The patches pass the pipeline CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/21933
2024-08-08spinand: bind UBI blockAlexey Romanov
UBI block is virtual block device, which is an abstraction over MTD layer. Therefore it is logical to use it in combination with MTD drivers. Signed-off-by: Alexey Romanov <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]>
2024-08-08disk: support UBI partitionsAlexey Romanov
UBI partition is abstraction over UBI volumes. Can be used by UBI block device. Signed-off-by: Alexey Romanov <[email protected]> Reviewed-by: Heiko Schocher <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]>
2024-08-08drivers: introduce UBI block abstractionAlexey Romanov
UBI block is an virtual device, that runs on top of the MTD layer. The blocks are UBI volumes. Intended to be used in combination with other MTD drivers. Despite the fact that it, like mtdblock abstraction, it used with UCLASS_MTD, they can be used together on the system without conflicting. For example, using bcb command: # Trying to load bcb via mtdblock: $ bcb load mtd 0 mtd_partition_name # Trying to load bcb via UBI block: $ bcb load ubi 1 ubi_volume_name User always must attach UBI layer (for example, using ubi_part()) before using UBI block device. Signed-off-by: Alexey Romanov <[email protected]> Reviewed-by: Heiko Schocher <[email protected]> Acked-by: Heiko Schocher <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]>
2024-08-08spinand: bind mtdblockAlexey Romanov
Bind SPI-NAND driver to MTD block driver. Reviewed-by: Frieder Schrempf <[email protected]> Signed-off-by: Alexey Romanov <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]>
2024-08-08drivers: introduce mtdblock abstractionAlexey Romanov
MTD block - abstraction over MTD subsystem, allowing to read and write in blocks using BLK UCLASS. Signed-off-by: Alexey Romanov <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]>
2024-08-08disk: support MTD partitionsAlexey Romanov
Add new MTD partition driver, which can be useful with mtdblock driver combination. Signed-off-by: Alexey Romanov <[email protected]> Signed-off-by: Michael Trimarchi <[email protected]>
2024-08-05mtd: spi-nor: ids: Add IS25LP01GG flash supportPrasad Kummari
Add support for ISSI 128MB flash IS25LP01GG. This part supports 4byte opcodes. It also supports dual and quad read. Signed-off-by: Prasad Kummari <[email protected]> Reviewed-by: Dhruva Gole <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2024-07-31Merge patch series "Endian Kconfig improvements"Tom Rini
Jiaxun Yang <[email protected]> says: This is a subset of my previous arm64_be work. I wish this could be merged first so it would be easier to work against xtensa and arm64 be support.
2024-07-31config: Use CONFIG_SYS_BIG_ENDIAN in code whenever possibleJiaxun Yang
So CONFIG_SYS_BIG_ENDIAN is our cross architecture option for selecting machine endian, while the old CONFIG_CPU_BIG_ENDIAN is defined by Arc only. Use it whenever possible to ensure big endian code path is enabled for all possible big endian machines. Signed-off-by: Jiaxun Yang <[email protected]>
2024-07-22drivers: mtd: Remove duplicate newlinesMarek Vasut
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2024-07-19drivers/mtd/nvmxip: nvmxip.h is a global includeHeinrich Schuchardt
include/nvmxip.h is a global and not a local include. So we should use angle brackets. Fixes: dc3abd8006c5 ("nvmxip: move header to include") Signed-off-by: Heinrich Schuchardt <[email protected]>
2024-06-24Merge tag 'v2024.07-rc5' into nextTom Rini
Prepare v2024.07-rc5
2024-06-17mtd: spi-nor: Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash partPrasad Kummari
Added SPI_NOR_OCTAL_READ flag for Macronix mx66uw2g345gx0 2Gb(256MB) NOR Flash memory. Initial testing was conducted on the Versal NET board using SDR mode, which included basic erase, write, and read-back operations. Signed-off-by: Prasad Kummari <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2024-06-17mtd: nand: pxa3xx: Incorrect bitflip return on page readRavi Minnikanti
Once a page is read with higher bitflips all subsequent reads are returning the same bitflip value even though they have none. max_bitflip variable is not being reset to 0 across page reads. This is causing problems like incorrectly marking erase blocks bad by UBI and causing read failures. Verified the change with both MTD reads and UBI. This change is inline with other NFC drivers. Sample error log where a block is marked bad incorrectly: ubi0: fixable bit-flip detected at PEB 125 ubi0: run torture test for PEB 125 ubi0: fixable bit-flip detected at PEB 125 ubi0 error: torture_peb: read problems on freshly erased PEB 125, must be bad ubi0 error: erase_worker: failed to erase PEB 125, error -5 ubi0: mark PEB 125 as bad Link: https://lore.kernel.org/all/[email protected] Signed-off-by: rminnikanti <[email protected]> Reviewed-by: Chris Packham <[email protected]> Signed-off-by: rminnikanti <[email protected]> Acked-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-06-17ubi: Depend on MTDJohn Watts
UBI required MTD to build correctly, add it as a Kconfig dependency. Link: https://lore.kernel.org/all/[email protected] Signed-off-by: John Watts <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Reviewed-by: Heiko Schocher <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-06-17mtd: rawnand: macronix: OTP access for MX30LFxG18ACArseniy Krasnov
Support for OTP area access on MX30LFxG18AC chip series. Link: https://lore.kernel.org/all/[email protected] Signed-off-by: Arseniy Krasnov <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-06-12mtd: spi-nor-core: Do not start or end writes at odd address in DTR modePratyush Yadav
On DTR capable flashes like Micron Xcella the writes cannot start or end at an odd address in DTR mode. Extra 0xff bytes need to be prepended or appended respectively to make sure both the start and end addresses are even. Signed-off-by: Pratyush Yadav <[email protected]> Signed-off-by: Apurva Nandan <[email protected]> Signed-off-by: Vignesh Raghavendra <[email protected]> Tested-by: Jonathan Humphreys <[email protected]> Signed-off-by: Manorit Chawdhry <[email protected]>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-07mtd: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-04-22Merge patch series "Kconfig: some cleanups"Tom Rini
Michal Simek <[email protected]> says: I looked as cleaning up some dependencies and I found that qconfig is reporting some issues. This series is fixing some of them. But there are still some other pending. That's why please go and fix them if they are related to your board. UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in a loop you will find some other issue with copyright chars or some issues in files taken from the Linux kernel like DTs. They should be likely fixed in the kernel first. Based on discussion I am ignoring names too.
2024-04-22common: Convert *.c/h from UTF-8 to ASCII enconfingMichal Simek
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or names are converted. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Tom Rini <[email protected]> Acked-by: Marek Behún <[email protected]>
2024-04-22Kconfig: Make all Kconfig encoding asciiMichal Simek
Some of Kconfigs are using utf-8 encoding because of used chars. Convert all of them to ascii enconging. Based on discussion ASCII should be used in general with the exception of names. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2024-04-19mtd: rawnand: stm32_fmc2: add MP25 supportChristophe Kerello
FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are available when on MP25 SoC, the 4 chip select are available. Let's use a platform data structure for parameters that will differ. Signed-off-by: Christophe Kerello <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-04-14Merge tag 'u-boot-nand-20240414' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-nand-flash The first patch is by Weizhao Ouyang and avoids sf probe crashes. The second patch is by Arseniy Krasnov and adds basic support for Amlogic Meson NAND controller on AXG. The following four patches are by Alexander Dahl and apply some fixes to drivers/mtd/nand/raw/ and port some changes applied in Linux. The following patch is by Bruce Suen and adds support for XTX SPINAND. Finally, the last patch is again by Arseniy Krasnov and adds access to OTP region, supporting info, dump, write and lock operations.
2024-04-14mtd: spinand: Add support for XTX SPINANDBruce Suen
Add support for XTX XT26G0xA and XT26xxxD. The driver is ported from linux-6.7.1. This driver is tested on Banana BPI-R3 with XT26G01A and XT26G12D. Link: https://lore.kernel.org/all/[email protected] Signed-off-by: Bruce Suen <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-04-14mtd: nand: raw: atmel: Fix comment in timings preparationAlexander Dahl
Introduced with commit 6a8dfd57220d ("nand: atmel: Add DM based NAND driver") when driver was initially ported from Linux. The context around this and especially the code itself suggests 'read' is meant instead of write. The fix is the same as accepted in Linux already with mainline Linux kernel commit 1c60e027ffde ("mtd: nand: raw: atmel: Fix comment in timings preparation"). Link: https://lore.kernel.org/all/[email protected] Link: https://lore.kernel.org/linux-mtd/[email protected]/T/#t Signed-off-by: Alexander Dahl <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-04-14mtd: nand: raw: Fix (most) Kconfig indentationAlexander Dahl
One tab in general. One tab plus two spaces for help text. Link: https://lore.kernel.org/all/[email protected] Signed-off-by: Alexander Dahl <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-04-14mtd: nand: raw: Port another option flag from LinuxAlexander Dahl
Introduced in upstream Linux with commit 7a08dbaedd365 for release v5.0. When the new atmel nand driver was backported to U-Boot with commit 6a8dfd57220d ("nand: atmel: Add DM based NAND driver") that definition was added to the driver instead of the header file. Move it over to the other definitions with the same help text it has in Linux. Code actually using this has not been ported over to raw nand base yet. Link: https://lore.kernel.org/all/[email protected] Signed-off-by: Alexander Dahl <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-04-14mtd: nand: raw: Use macro nand_to_mtd() where appropriateAlexander Dahl
In every other place in this file the macro is used, make it consistent. Link: https://lore.kernel.org/all/[email protected] Fixes: 9d1806fadc24 ("mtd: nand: Get rid of mtd variable in function calls") Signed-off-by: Alexander Dahl <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-04-14mtd: rawnand: Meson NAND controller supportArseniy Krasnov
Basic support for Amlogic Meson NAND controller on AXG. This version works at only first EDO mode. Based on Linux version 6.7.0-rc4. Link: https://lore.kernel.org/all/[email protected] Signed-off-by: Arseniy Krasnov <[email protected]> Reviewed-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2024-03-12mtd: nand: arasan: Fix the crash caused by use after freeVenkatesh Yadav Abbarapu
The below exception observed on QEMU, as it doesn't support NAND controller. "Synchronous Abort" handler, esr 0x96000005, far 0x17acfc878 elr: 000000000803ad40 lr : 000000000805f438 (reloc) elr: 000000007fcb4d40 lr : 000000007fcd9438 x0 : 000000007bbfc880 x1 : 00000000ff100000 x2 : 000000007fcf059c x3 : 000000007bbfc870 x4 : 000000007fd9a388 x5 : 000000017acfc870 x6 : 0000000000000000 x7 : 000000007bbfd0e0 x8 : 0000000000003dd4 x9 : 000000007bbeec0c x10: 0000000000000001 x11: 0000000000003f8c x12: 000000007bbeecfc x13: 000000007bbeeeb0 x14: 000000007bbeeeb0 x15: 000000007bbee474 x16: 000000007fcef18c x17: 0000000000000000 x18: 000000007bbf9d70 x19: 000000007bbfc888 x20: 000000007bbfc870 x21: 000000007fd68ddb x22: 00000000ffffffed x23: 000000007bbfc878 x24: 0000000000000000 x25: 0000000000000000 x26: 0000000000000000 x27: 0000000000000000 x28: 0000000000000000 x29: 000000007bbeed10 Code: 927ff8c1 924000c6 8b010065 f9400887 (f94004a2) Resetting CPU ... The crash is caused by the use after free. Updating the correct return codes rather than hardcoding. Fixes: 3dd0f8cccd6d ("mtd: nand: Remove hardcoded base address of nand") Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2024-03-12mtd: nand: arasan: Print warning for unsupported ecc modesVenkatesh Yadav Abbarapu
Currently only hw ecc is supported in U-Boot. If any other ecc mode is given in DT, it simply through an error. So better print what is being done. Revert this patch once soft ecc support is fixed in future. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2024-02-19mtd: spi-nor-ids: Add support for ESMT/EON EN25Q80BFrieder Schrempf
The datasheet can be found here: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25Q80B_Ver.E.pdf Signed-off-by: Frieder Schrempf <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2024-01-31Merge tag 'u-boot-at91-2024.04-a' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-at91 First set of u-boot-at91 features for the 2024.04 cycle: This set includes some DT alignments and solves a compile issue for custom nand defconfigs.
2024-01-29treewide: Remove clk_freeSean Anderson
This function is a no-op. Remove it. Signed-off-by: Sean Anderson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-01-29mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt IDTakahiro Kuwano
Infineon(Cypress) S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with Octal interface. It is a dual-die package parts and has same features with existing S28 series. Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Dhruva Gole <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()Takahiro Kuwano
Enabling Octal DTR mode in multi-die package parts requires reister setup for each die. That can be done by simple for-loop. write_enable() takes effect to all die at once so we can call it before the loop. Besides we can replace spi_mem_exec_op() calls with spansion_read/write_any_reg(). And finally, we must mask CFR2V[7:4] when changing dummy cycles, as CFR2V[7] indicates current addressing mode and that should be 1 (4-byte address mode) for multi-die package parts. Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 ↵Takahiro Kuwano
and S28 s28hx_t_post_bfpt_fixup() fixes erase opcode, erase size, and page size. s25_post_bfpt_fixup() is doing same thing including multi-die support. We can consolidate s28hx_t_post_bfpt_fixup() and s25_post_bfpt_fixup() into one named s25_s28_post_bfpt_fixup(). In s25_s28_post_bfpt_fixup(), set_4byte() is called to force the device to be 4-byte addressing mode. In S28HS02GT datasheet, the B7 opcode is missing but it works actually (confirmed). Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28Takahiro Kuwano
s28hx_t_setup() only checks sector layout setting. To support multi-die package parts like S28HS02GT, it needs to check device size and assign ready() hook for multi-die package parts. These are covered in s25_setup() so we can consolidate s28hx_t_setup() and s25_setup() into one named s25_s28_setup(). spi_nor_wait_till_ready() at the beginning of s28hx_t_setup() can be removed since there is no op that makes device busy state before setup. Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR modeTakahiro Kuwano
s25_mdp_ready() handles status polling for multi-die package parts that requires to read and check status register for each die. To support S28HS02GT(dual-die package with Octal DTR support), rename function and use nor->rdsr_dummy in octal DTR mode. Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28Takahiro Kuwano
Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode. Instead, it supports CLPEF(0x82) which has the same functionality as CLSR. spansion_sr_ready() is for multi-die package parts including S28HS02GT, so we need to use CLPEF instead of CLSR. This change does not affect to S25x02GT which uses spansion_sr_ready() as S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30). Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR modeTakahiro Kuwano
In Infineon multi-die package parts, we need to use Read Any Register op to read status register in 2nd or further die. Infineon S28HS02GT is dual-die package and supports Octal DTR interface. To support this, spansion_read_any_reg() needs to be reworked. Implementation is similar to existing read_sr() that already supports Octal DTR mode. Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28Takahiro Kuwano
s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector layout (32 x 4KB sectors overlaid at bottom address) and doing same thing. Consolidate them into single helper named s25_s28_erase_non_uniform(). Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28Takahiro Kuwano
Some macro definitions used in Infineon(Cypress) S25 and S28 series are redundant and some have inconsistent prefix. This patch removes redundant ones and renames some to have same prefix as others. Signed-off-by: Takahiro Kuwano <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2024-01-29mtd: spi: spi-nor-ids: Add more XM25Q series chipsSsunk
- XM25QH128C - XM25QH256C - XM25QU256C - XM25QH512C - XM25QU512C Signed-off-by: Kankan Sun <[email protected]> [jagan: update the commit message] Signed-off-by: Jagan Teki <[email protected]> Reviewed-by: Jagan Teki <[email protected]>