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The patch checks that the "mtd" parameter is accessible before
proceeding.
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Link: https://lore.kernel.org/all/[email protected]
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into next
- spi_nor_read_sfdp_dma_unsafe (Vaishnav)
- w25q01/02 (Jim)
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Prepare v2024.01-rc5
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Add support for XTX XT55Q02G(1.8V,2Gbit).
Signed-off-by: Bruce Suen <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Adaptation of Linux commit d74c36480a67
This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
It seems that ESMT likes to use random JEDEC ID from other vendors.
Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
JEDEC ID in variable name.
Datasheets:
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf
Signed-off-by: Igor Prusov <[email protected]>
Signed-off-by: Chuanhong Guo <[email protected]>
Signed-off-by: Martin Kurbanov <[email protected]>
Signed-off-by: Dmitry Rokosov <[email protected]>
Tested-by: Martin Kurbanov <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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During SFDP header parse and BFPT parse, structures in stack are used
to perform spi_nor_read_sfdp() which expects a dma-safe buffer.
This commit introduces spi_nor_read_sfdp_dma_unsafe() to wrap
spi_nor_read_sfdp() using a kmalloc'ed bounce buffer which is
the same implementation in Linux (drivers/mtd/spi-nor/sfdp.c).
Signed-off-by: Vaishnav Achath <[email protected]>
Reviewed-by: Pratyush Yadav <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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add flash w25q01jv, w25q01jvfim and w25q02jv support
Signed-off-by: Jim Liu <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add Micron MT25QU128AB flash.
Signed-off-by: Godfrey Mwangi <[email protected]>
[jagan: fix the commit head]
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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MT25QU01 OPN with 4B OPCODE support is currently not supported in
source code and the driver reuses the definition for "n25q00a"
which has the same silicon ID but is a slower part.
Adding mt25u01g definition to the source code to support a faster
read response for MT25QU01 QSPI NOR Flash device.
Signed-off-by: Jit Loon Lim <[email protected]>
[jagan: fix the id position and commit head]
Signed-off-by: Jagan Teki <[email protected]>
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Add Support for GigaDevice GD55LB02GEBIR SPI NOR flash as QSPI
configuration flash
Signed-off-by: Teik Heng Chong <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add support for the zBIT ZB25VQ128 (128M-bit) SPI NOR flash memory chip,
as used on the Xunlong Orange Pi Zero 3 board.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Dragan Simic <[email protected]>
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Add support for Silicon Kaiser sk25lp128 SPI NOR flash found in Pine64
PinePhone Pro and PineTab2.
Signed-off-by: Jonas Karlman <[email protected]>
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To quote the author:
This series imports generic versions of ioread_rep/iowrite_rep and
reads/writes from Linux. Some cleanup is done to make sure that all
platforms have proper defines for implemented functions and there are no
redefinitions.
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Currently {read,write}s{b,w,lq}() functions are available only on some
architectures, and there are no io{read,write}{8,16,32,64}_rep()
functions in u-boot. This patch adds generic versions that may be used
without arch-specific implementation.
Since some of added functions were already added locally in some files,
remove them to avoid redeclaration errors.
Signed-off-by: Igor Prusov <[email protected]>
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Prepare v2024.01-rc3
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- squashfs improvements, remove common.h in some places, assorted code
fixes, fix a few CONFIG symbol names in Kconfig files, bring in
linux's <linux/time.h> conversion functions, poplar updates, bcb
improvements.
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Now that we have time conversion defines from in time.h there is no need
for each driver to define their own version.
Signed-off-by: Igor Prusov <[email protected]>
Reviewed-by: Svyatoslav Ryhel <[email protected]> # tegra
Reviewed-by: Eugen Hristev <[email protected]> #at91
Reviewed-by: Caleb Connolly <[email protected]> #qcom geni
Reviewed-by: Stefan Bosch <[email protected]> #nanopi2
Reviewed-by: Patrice Chotard <[email protected]>
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Add a SPL test for the NAND load method. We use some different functions to
do the writing from the main test since things like nand_write_skip_bad
aren't available in SPL.
We disable BBT scanning, since scan_bbt is only populated when not in SPL.
We use nand_spl_loaders.c as it seems to be common to at least a few boards
already. However, we do not use nand_spl_simple.c because it would require
us to implement cmd_ctrl. The various nand load functions are adapted from
omap_gpmc. However, they have been modified for simplicity/correctness.
Signed-off-by: Sean Anderson <[email protected]>
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Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.
For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.
Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.
Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).
Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.
To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.
Signed-off-by: Sean Anderson <[email protected]>
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NAND devices are destroyed in between unit tests. Provide a function to
reinitialize the subsystem at the beginning of each test.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Dario Binacchi <[email protected]>
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This performs the opposite of nand_register, allowing drivers to unregister
nand devices. This is probably unnecessary for most regular drivers, but we
expect sandbox drivers to get repeatedly bound/unbound, so this will help
avoid dangling pointers.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Dario Binacchi <[email protected]>
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This allows using these functions without ifdefs. OneNAND depends on MTD,
so this ifdef was redundant in the first place.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Dario Binacchi <[email protected]>
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Rename SPL_MTD_SUPPORT to SPL_MTD in order to match MTD. This allows using
CONFIG_IS_ENABLED to test for MTD support.
Signed-off-by: Sean Anderson <[email protected]>
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Since commit 34793598c83 ("mtd: nand: mxs_nand_spl: Remove the page aligned
access") there are no longer any users of nand_get_mtd. However, it is
still important to know what the page size is so we can allocate a
large-enough buffer. If the image size is not page-aligned, we will go off
the end of the buffer and clobber some memory.
Introduce a new function nand_page_size which returns the page size. For
most drivers it is easy to determine the page size. However, a few need to
be modified since they only keep the page size around temporarily.
It's possible that this patch could cause a regression on some platforms if
the offset is non-aligned and there is invalid address space immediately
before the load address. spl_load_legacy_img does not (except when
compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or
SPL_LOAD_IMX_CONTAINER (none in tree) would be affected.
defconfig CONFIG_TEXT_BASE
======================= ================
am335x_evm 0x80800000
am43xx_evm 0x80800000
am43xx_evm_rtconly 0x80800000
am43xx_evm_usbhost_boot 0x80800000
am43xx_hs_evm 0x80800000
dra7xx_evm 0x80800000
gwventana_nand 0x17800000
imx8mn_bsh_smm_s2 0x40200000
All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q
which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the
i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a
little underflow.
Signed-off-by: Sean Anderson <[email protected]>
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All other implementations of nand_spl_load_image only read as many pages as
are necessary to load the image. However, nand_spl_loaders.c loads the full
block. Align it with other load functions so that it is easier to
determine how large of a load buffer we need.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
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Contrary to what the help message says, this is the number of pages per
block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and
SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to
SYS_NAND_BLOCK_PAGES.
Signed-off-by: Sean Anderson <[email protected]>
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When no manufacturer is matched, manufacturer_desc is NULL. Avoid
dereferencing it in that case.
Fixes: 4e67c571252 ("mtd,ubi,ubifs: sync with linux v3.15")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
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Replace instances of http://www.ti.com with https://www.ti.com
Signed-off-by: Nishanth Menon <[email protected]>
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Provide an explicit configuration option to disable default "lock"
of any flash chip which supports locking. By disabling the lock
config will save some amount of memory and also don't expose the
lock functionality to the users i.e., via sf protect command.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Compiling sandbox_defconfig with CONFIG_BOOTSTD=n fails:
/usr/bin/ld: drivers/mtd/spi/sf_bootdev.o:
in function `sf_get_bootflow':
/drivers/mtd/spi/sf_bootdev.c:43:(.text+0x96):
undefined reference to `bootmeth_set_bootflow'
Add the missing Kconfig dependency.
Fixes: Fixes: 0c1f4a9fb13a ("bootstd: Add a SPI flash bootdev")
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Similar change was done by commit b4c2c151b14b ("Kconfig: Remove all
default n/no options") and again sync is required.
default n/no doesn't need to be specified. It is default option anyway.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Svyatoslav Ryhel <[email protected]> # tegra
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Angelo Dureghello <[email protected]>
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On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add support for XMC XM25QU128C (128M-bit) Serial Flash memory. Used on
the Xunlong Orange Pi 3B, 5 and 5 Plus boards.
Datasheet:
https://www.xmcwh.com/uploads/806/XM25QU128C_Ver2.0.pdf
Signed-off-by: Ricardo Pardini <[email protected]>
[[email protected]: update commit message]
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add support of Winbond W25N02KV flash
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
Signed-off-by: Frieder Schrempf <[email protected]> (U-Boot port)
Link: https://lore.kernel.org/all/[email protected]
Signed-off-by: Dario Binacchi <[email protected]>
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Winbond uses 3 bytes to identify flash: vendor_id, dev_id_0, dev_id_1,
but current driver uses only first 2 bytes of it for devices
identification. As result Winbond W25N02KV flash (id_bytes: EF, AA, 22)
is identified as W25N01GV (id_bytes: EF, AA, 21).
Fix this by adding missed identification bytes.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
Signed-off-by: Frieder Schrempf <[email protected]> (U-Boot port)
Link: https://lore.kernel.org/all/[email protected]
Signed-off-by: Dario Binacchi <[email protected]>
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This adds more supported spinand devices from the Linux kernel
implementation.
This does not include the latest kernel implementation as this would
require a substantial amount of extra work due to the missing
ECC engine abstraction layer in U-Boot.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Signed-off-by: Frieder Schrempf <[email protected]> (commit message)
Link: https://lore.kernel.org/all/[email protected]
Signed-off-by: Dario Binacchi <[email protected]>
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This brings us closer to the current Linux kernel implementation of
the spinand core and makes backporting features and fixes easier.
This does not include the latest kernel implementation as this would
require a substantial amount of extra work due to the missing
ECC engine abstraction layer in U-Boot.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Signed-off-by: Frieder Schrempf <[email protected]> (add commit message)
Link: https://lore.kernel.org/all/[email protected]
Signed-off-by: Dario Binacchi <[email protected]>
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Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
3. opcode + 1 dummy byte. Found in other currently supported chips.
Original implementation was for variant 1 and let detect function
of chips with variant 2 and 3 to ignore the first byte. This isn't
robust:
1. For chips of variant 2, if SPI master doesn't keep MOSI low
during read, chip will get a random id offset, and the entire id
buffer will shift by that offset, causing detect failure.
2. For chips of variant 1, if it happens to get a devid that equals
to manufacture id of variant 2 or 3 chips, it'll get incorrectly
detected.
This patch reworks detect procedure to address problems above. New
logic do detection for all variants separatedly, in 1-2-3 order.
Since all current detect methods do exactly the same id matching
procedure, unify them into core.c and remove detect method from
manufacture_ops.
This is a rework of Chuanhong Guo <[email protected]> patch
submitted to linux kernel
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Signed-off-by: Frieder Schrempf <[email protected]>
Link: https://lore.kernel.org/all/[email protected]
Signed-off-by: Dario Binacchi <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is possible, the driver does
not override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl <[email protected]>
Reviewed-by: Eugen Hristev <[email protected]>
Acked-by: Michael Trimarchi <[email protected]>
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This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h
Move this out of the common header and include it only where needed.
Signed-off-by: Simon Glass <[email protected]>
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This patch adds support for the MX25U25635F QSPI Flash Memory.
Signed-off-by: Neal Frager <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8f8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.
Signed-off-by: Marek Vasut <[email protected]>
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The sandbox_set_enable_memio() should only ever be set during
sandbox testing, not within driver itself, move it back to test/ .
Signed-off-by: Marek Vasut <[email protected]>
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64bit systems
Cast the address such that it can be printed without warnings
on both 32bit and 64bit systems. This really should use some
better print formatter, but for the lack of it, do it this way.
Signed-off-by: Marek Vasut <[email protected]>
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Get rid of nvmxip_mmio_rawread() and just implement the readl()/readq()
reader loop within nvmxip_blk_read(). Cast the destination buffer as
needed and increment the read by either 4 or 8 bytes depending on if
this is systemd with 32bit or 64bit physical address.
Signed-off-by: Marek Vasut <[email protected]>
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Perform all the block device creation only once, after the driver itself
successfully bound. Do not do this in uclass post bind, as this might be
triggered multiple times. For example the ut_dm_host test triggers this
and triggers a memory leak that way, since there are now multiple block
devices created using the blk_create_devicef() .
To retain the old probe-on-boot behavior, set DM_FLAG_PROBE_AFTER_BIND
flag in uclass post_bind callback, so the driver model would probe the
driver at the right time.
Rename the function as well, to match similar functions in
other block-related subsystems, like the mmc one.
Signed-off-by: Marek Vasut <[email protected]>
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Signed-off-by: Alexander Dahl <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
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Rockchip boot blocks are written per 4 x 512 byte sectors per page.
Each page must have a page address (PA) pointer in OOB to the next page.
Pages are written in a pattern depending on the NAND chip ID.
This logic used to build a page pattern table is not fully disclosed and
is not easy to fit in the MTD framework.
The formula in rk_nfc_write_page_hwecc() function is not correct.
Make hwecc and raw behavior identical.
Generate boot block page address and pattern for hwecc in user space
and copy PA data to/from the already reserved last 4 bytes before EEC
in the chip->oob_poi data layout.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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cfi_mtd requires add_mtd_device() which is available only when MTD is
enabled that's why record this dependency.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/76ae01ce2b2c988758b69e0f0cdcc21bf301c01e.1688472227.git.michal.simek@amd.com
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