| Age | Commit message (Collapse) | Author |
|---|
|
The sunxi nand SPL loader was broken at least for SUN4I,
SUN5I and SUN7I SOCs since the implementation change
from DMA to PIO usage - commit 6ddbb1e.
Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD
being set by method nand_apply_config.
This flag controls the bus being used for the NFCs internal RAM access.
It must be set for the DMA use case only.
See A33_Nand_Flash_Controller_Specification.pdf page 12.
This fix is tested by myself on a Cubietruck A20 board.
Others should test it on new generation SOCs as well.
Signed-off-by: Markus Hoffrogge <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
|
|
This patch adds NAND flash controller driver for MediaTek MT7621 SoC.
The NAND flash controller of MT7621 supports only SLC NAND flashes.
It supports 4~12 bits correction with maximum 4KB page size.
Signed-off-by: Weijie Gao <[email protected]>
|
|
|
|
With the current code if the board has an ONFI compliant NAND without
support to the get and set features, U-boot returns an ENOTSUP error when
trying to tune the timings which prevents the probe of the device.
Indeed onfi_set_features() return ENOTSUP error if set/get features is not
supported. In the case of timings we should not return ENOTSUP because we
can use the default timings. The NAND is already capable of listening at
its highest supported rate, so we assume in this case that it is fine to
skip the operation.
Fix it by adding an intermediate nand_onfi_set_timings() function which
does not error out if set/get feature is not supported.
Signed-off-by: Kory Maincent <[email protected]>
Reviewed-by: Miquel Raynal <[email protected]>
|
|
Tighten up symbol dependencies in a number of places. Ensure that a SPL
specific option has at least a direct dependency on SPL. In places
where it's clear that we depend on something more specific, use that
dependency instead. This means in a very small number of places we can
drop redundant dependencies.
Reported-by: Pali Rohár <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SAMSUNG_ONENAND
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
selected ecc.mode
ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.
Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.
This change fixes usage of none ecc mode if it is specified in DTS file.
Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree")
Signed-off-by: Pali Rohár <[email protected]>
|
|
Add support for various flashes from below manufacturers which are tested
by xilinx for years.
EON:
en25q128b
GIGA:
gd25lx256e
ISSI:
is25lp008
is25lp016
is25lp01g
is25wp008
is25wp016
is25wp01g
is25wx256
MACRONIX:
mx25u51245f
mx66u1g45g
mx66l2g45g
MICRON:
mt35xl512aba
mt35xu01g
SPANSION:
s70fs01gs_256k
SST:
sst26wf016b
WINBOND:
w25q16dw
w25q16jv
w25q512jv
w25q32bv
w25h02jv
Signed-off-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
|
|
mxs_nand_command() implementation assume that it's working with a
LP NAND, which is a common case nowadays and thus uses two bytes
for column address.
However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
expects only one byte of column address, even for LP NANDs.
This leads to ONFI detection problem with some NAND manufacturer (like
Winbond) but not with others (like Samsung and Spansion)
We fix this with a simple workaround to avoid the 2nd byte column address
for those two commands.
Also align the code with nand_base to support 16 bit devices.
Tested on an iMX6SX device with:
* Winbond W29N04GVSIAA
* Spansion S34ML04G100TF100
* Samsung K9F4G08U00
Tested on imx8mn device with:
* Windbond W29N04GV
Signed-off-by: Andrea Scian <[email protected]>
CC: Stefano Babic <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-stm into next
- Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards
|
|
For proper DM support it is required to fill also mtd->dev member.
Otherwise DM would not see nand device at all.
Signed-off-by: Pali Rohár <[email protected]>
|
|
Replace reference to the correct name STMicroelectronics
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Set correct type for 3rd argument of ofnode_get_addr_size_index_notrans()
function. It expects fdt_size_t * and not fdt_addr_t *.
When these two types do not have same size then U-Boot throw compile
warning:
drivers/mtd/mtdpart.c: In function ‘add_mtd_partitions_of’:
drivers/mtd/mtdpart.c:906:57: warning: passing argument 3 of ‘ofnode_get_addr_size_index_notrans’ from incompatible pointer type [-Wincompatible-pointer-types]
offset = ofnode_get_addr_size_index_notrans(child, 0, &size);
^~~~~
In file included from include/dm/device.h:13,
from include/linux/mtd/mtd.h:26,
from include/ubi_uboot.h:28,
from drivers/mtd/mtdpart.c:27:
include/dm/ofnode.h:530:25: note: expected ‘fdt_size_t *’ {aka ‘long long unsigned int *’} but argument is of type ‘fdt_addr_t *’ {aka ‘long unsigned int *’}
fdt_size_t *size);
~~~~~~~~~~~~^~~~
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_TPL_NAND_INIT
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SYS_CFI_FLASH_STATUS_POLL
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SYS_FLASH_CFI_WIDTH
Signed-off-by: Tom Rini <[email protected]>
|
|
Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode
and logically calls spi_get_bus_and_cs(). In case spi mode and speed are
not read from DT, make usage of spi_flash_probe() instead.
To sum-up:
- Previous call tree was:
spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
- Current call tree is:
spi_flash_probe() -> _spi_get_bus_and_cs()
spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
This patch impacts the following :
- cmd/sf.c: if spi mode and/or speed is passed in argument of
do_spi_flash_probe(), call spi_flash_probe() otherwise call
spi_flash_probe_bus_cs().
- drivers/net/fm/fm.c: as by default spi speed and mode was set to
0 and a comment indicates that speed and mode are read from DT,
use spi_flash_probe_bus_cs().
- drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read
from DT by all platforms using this driver, so keep legacy and replace
spi_flash_probe_bus_cs() by spi_flash_probe();
- drivers/net/sni_netsec.c : spi speed and mode are not read from DT,
so replace spi_flash_probe_bus_cs() by spi_flash_probe().
- drivers/usb/gadget/max3420_udc.c: Can't find any platform which make
usage of this driver, nevertheless, keep legacy and replace
spi_get_bus_and_cs() by _spi_get_bus_and_cs().
- env/sf.c: a comment indicates that speed and mode are read
from DT. So use spi_flash_probe_bus_cs().
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Marek Behun <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Vignesh R <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: "Pali Rohár" <[email protected]>
Cc: Konstantin Porotchkin <[email protected]>
Cc: Igal Liberman <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Pratyush Yadav <[email protected]>
Cc: Sean Anderson <[email protected]>
Cc: Anji J <[email protected]>
Cc: Biwen Li <[email protected]>
Cc: Priyanka Jain <[email protected]>
Cc: Chaitanya Sakinam <[email protected]>
|
|
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs().
Add new spi_get_bus_and_cs() implementation which rely on DT
for speed and mode and don't need any drv_name nor dev_name
parameters. This will prepare the ground for next patch.
Update all callers to use _spi_get_bus_and_cs() to keep the
same behavior.
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Marek Behun <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Vignesh R <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: "Pali Rohár" <[email protected]>
Cc: Konstantin Porotchkin <[email protected]>
Cc: Igal Liberman <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Pratyush Yadav <[email protected]>
Cc: Sean Anderson <[email protected]>
Cc: Anji J <[email protected]>
Cc: Biwen Li <[email protected]>
Cc: Priyanka Jain <[email protected]>
Cc: Chaitanya Sakinam <[email protected]>
|
|
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.
The problematic part of old code was in this part:
while (is_badblock(mtd, offs, 1)) {
page = page + nand_page_per_block;
/* Check i we've reached the end of flash. */
if (page >= mtd->size >> chip->page_shift) {
free(page_buf);
return -ENOMEM;
}
}
Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm
Cc: Han Xu <[email protected]>
Cc: Fabio Estevam <[email protected]>
Acked-by: Han Xu <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
|
|
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0
Cc: Han Xu <[email protected]>
Cc: Fabio Estevam <[email protected]>
Acked-by: Han Xu <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
|
|
Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Han Xu <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_MTD_CONCAT
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
- NPCM7xx FIU SPI driver (Jim Liu)
- AT45DB641E dataflash (Luca Ellero)
|
|
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.
Signed-off-by: Andrew Scull <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.
Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.
Signed-off-by: Andrew Scull <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
NOTE: this chip uses "extened device information"
Signed-off-by: Luca Ellero <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Take as reference Linux kernel code:
drivers/mtd/devices/mtd_dataflash.c
commit 1da8869a428317a6d3cd8d47184cf87feb34a98b
Author: Andrey Smirnov <[email protected]>
Signed-off-by: Luca Ellero <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Add Macronix mx25u51245g flash entry, so this can be used on
SoCFPGA devices.
Signed-off-by: Tien Fong Chee <[email protected]>
[Jagan: updated commit head]
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Add ID for Winbond W25Q128JW device. This is a 128 Mbit QSPI NOR.
Tested on W25Q128JWPIM part.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Horatiu Vultur <[email protected]>
Cc: Simon Goldschmidt <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Vignesh R <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
According to Linux kernel DT schema nand-controller.yaml, using DT property
nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Initialize ECC configuration after nand_scan_ident() call and only in case
nand_scan_ident() have not done it. nand_scan_ident() fills ECC
configuration from device tree.
Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
This allows boards to specify NAND settings via standard DT properties.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
This is needed for SW ECC.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220413
i.MX patches for 2022.07
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
|
|
The mxs_nand_spl driver can support to read from page unaligned offset,
so don't need to set bl_len to ask spl_load_simple_fit to handle
the page unaligned access.
Actually spl_load_simple_fit has two parts of reading:
spl_simple_fit_read and spl_load_fit_image.
The spl_load_fit_image can handle the page unaligned offset,
but the spl_simple_fit_read can't do it. spl_simple_fit_read requires
the FIT location at page aligned offset.
Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl
to use page unaligned read by driver.
Signed-off-by: Ye Li <[email protected]>
Tested-by: Tim Harvey <[email protected]> #gw_ventana
|
|
In case mtd_info's dev field is not populated (raw nand's case),
use the flash_node new field which reference the DT flash node where
can be found "partitions" node with "fixed-partitions" compatible.
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Farhan Ali <[email protected]>
Cc: Heinrich Schuchardt <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Marek Behun <[email protected]>
Cc: Miquel Raynal <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Wolfgang Denk <[email protected]>
|
|
Currently, add_mtd_partitions_of() can be used only if dev field of
mtd_info struct is populated. It's the case, for example, for a spi nor
flash, which has a DT compatible "jedec,spi-nor" and an associated
device. mtd->dev is populated in spi_nor_scan().
But in case of a raw nand node, mtd_info's dev field can't be populated
as flash node has no compatible, so no associated device.
add_mtd_partitions_of() can't be used to parse "partitions" subnode.
To remove this constraint, add an ofnode field in mtd_info struct
which reference the DT flash node. This new field is populated by
nand_scan_tail(). This new field will be used by add_mtd_partitions_of()
to parse the flash node for "partitions" defined in DT.
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Farhan Ali <[email protected]>
Cc: Heinrich Schuchardt <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Marek Behun <[email protected]>
Cc: Miquel Raynal <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Wolfgang Denk <[email protected]>
|
|
When SPI flash is used in SPL there is no console, so ctrlc() cannot be
called. Add a condition to fix this.
Signed-off-by: Simon Glass <[email protected]>
|
|
Prepare v2022.04-rc5
|
|
Previous u-boot code changed the default bch setting behavior and caused
backward compatible issue. This fix choose the legacy bch geometry back
again as the default option. If the minimum ecc strength that NAND chips
required need to be chosen, it can be enabled by either adding DT flag
"fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The
unused flag "fsl,legacy-bch-geometry" get removed.
Fixes: 51cdf83eea (mtd: gpmi: provide the option to use legacy bch geometry)
Fixes: 616f03daba (mtd: gpmi: change the BCH layout setting for large oob NAND)
Tested-by: Tim Harvey <[email protected]>
Tested-by: Sean Nyekjaer <[email protected]>
Signed-off-by: Han Xu <[email protected]>
Reviewed-by: Miquel Raynal <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.07-rc1
microblaze:
- Add support for reserved memory
xilinx:
- Update FRU code with MAC reading
zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0
zynq:
- Update nand binding
nand:
- Aligned zynq_nand to upstream DT binding
net:
- Add support for ethernet-phy-id
mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs
gpio:
- Add driver for slg7xl45106
firmware:
- Add support for dynamic SD config
power-domain:
- Update zynqmp driver with the latest firmware
video:
- Add skeleton driver for DP and DPDMA
i2c:
- Fix i2c to work with QEMU
pinctrl:
- Add driver for zynqmp pinctrl driver
|
|
This patch adds the support of the WP# signal. WP will be disabled
before the first access to the NAND flash.
Signed-off-by: Christophe Kerello <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Prepare v2022.04-rc4
|
|
The Gigadevice gd25lq128 serial flash exists in different versions,
all which identify themselves using the same JEDEC id.
gd25lq128c:
https://www.gigadevice.com/datasheet/gd25lq128
gd25lq128d:
https://www.gigadevice.com/datasheet/gd25lq128d
However, all versions support quad read, so enable it.
Tested and verified on the Sipeed MAix BiT board.
Fixes: 30b9a28a3f2d ("mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID")
Signed-off-by: Niklas Cassel <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
This adds the nand support for chipset bcm6753.
Signed-off-by: Philippe Reynes <[email protected]>
|
|
New binding changed node name from flash@e1000000 to nand-controller@0,0
which should be reflected in the driver. Both names are supported for
backward compatibility.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
|
|
This converts the following to Kconfig:
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
Signed-off-by: Tom Rini <[email protected]>
|
|
Populate mtd->dev with flash_info->dev which allows to get
full mtd information using the "mtd list" command.
Before, "mtd list" command returns :
List of MTD devices:
* nor0
- type: NOR flash
- block size: 0x40000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "nor0"
After this patch we get for example:
List of MTD devices:
* nor0
- device: flash@0
- parent: spi@40430000
- driver: cfi_flash
- path: /soc/spi@40430000/flash@0
- type: NOR flash
- block size: 0x40000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "nor0"
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
Use moveconfig.py script to convert define CONFIG_SYS_MAX_FLASH_BANKS
and CONFIG_SYS_MAX_FLASH_BANKS_DETECT to Kconfig and move these entries
to defconfigs.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
[trini: Re-switch to IS_ENABLED check in spi-nor-core.c, re-run migration]
Signed-off-by: Tom Rini <[email protected]>
|
|
Prepare migration to Kconfig.
CONFIG_SYS_MAX_FLASH_BANKS_DETECT becomes boolean and
CONFIG_SYS_MAX_FLASH_BANKS define the MAX size, also used
for detection when CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
(CFI_MAX_FLASH_BANKS = CONFIG_SYS_MAX_FLASH_BANKS).
CONFIG_SYS_MAX_FLASH_BANKS become mandatory when
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
