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These functions are CPU-related and do not use driver model. Move them to
cpu_func.h
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Drop inclusion of crc.h in common.h and use the correct header directly
instead.
With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.
Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.
Signed-off-by: Igor Opaniuk <[email protected]>
Signed-off-by: Anti Sullin <[email protected]>
Tested-by: Max Krummenacher <[email protected]>
Reviewed-by: Oleksandr Suvorov <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Add I2C clocks for i.MX6Q CCF driver
- Fix check in clk_set_default_parents()
- Managed API to get clock from device tree
- Fixes for core clock code (including sandbox regression tests)
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- H6 dts(i) sync (Clément)
- H6 PIO (Icenowy)
- Fix pll1 clock calculation (Stefan)
- H6 dram, half DQ (Jernej)
- A64 OLinuXino eMMC (Sunil)
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The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.
This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method
Signed-off-by: William Zhang <[email protected]>
Reviewed-by: Philippe Reynes <[email protected]>
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This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
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Add an entry for the Adesto AT25SL321 SPI NOR chip.
This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in
SPL. They often rely on hacks in the board header files to include
this option conditionally. To be able to fix this, we previously
introduced a separate option SPL_SPI_FLASH_MTD.
Therefore we can now adjust the Makefile and change the code in
sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD).
We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the
header files to the according defconfigs. The affected boards are
socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6
and da850evm.
We do this all in one patch to guarantee bisectibility.
This change was tested with buildman to make sure it does not
introduce any regressions by comparing the resulting binary sizes.
Signed-off-by: Frieder Schrempf <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Goldschmidt <[email protected]>
Acked-by: Lukasz Majewski <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
register that indicates various errors that may be encountered during
erase/write operations. Therefore add USE_FSR flag wherever missing.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Reviewed-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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mt25q* flashes support stateless 4 byte addressing opcodes. Add entries
for the same. These flashes have bit 6 set in 5th byte of READ ID
response when compared to n25q* variants.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Tested-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Per datasheets of n25q256* and n25q512* not all variants of n25q256* and
n25q512* support 4 Byte stateless addressing opcodes. Therefore drop
SPI_NOR_4B_OPCODES flag from these entries
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Reviewed-by: Simon Goldschmidt <[email protected]>
Tested-by: Simon Goldschmidt <[email protected]>
Tested-by: Eugeniy Paltsev <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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SPI_FLASH_USE_4K_SECTORS
U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.
Reported-by: Eugeniy Paltsev <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Use dev_err() when reporting reason for erase/write failures so that
users can be made aware of the reason for failure.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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To allow SPI_FLASH_MTD being enabled separately in SPL we add a new
option. The only user currently is the stm32mp15_basic board.
Signed-off-by: Frieder Schrempf <[email protected]>
Acked-by: Lukasz Majewski <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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DM_SPI_FLASH should require spi flash interface code for dm
version, so imply SPI_FLASH core by default if any board
enabled DM_SPI_FLASH.
This overcome the explicit enablement of CONFIG_SPI_FLASH on
respective boards when DM_SPI_FLASH being used.
Acked-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Add is25wp256, chip to spi-nor id table.
Tested on SiFive FU540 board.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
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1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
core code which handle both dm and non-dm spi flash code. So
fix the info text to make it clear globally.
2) Since it's flash core it shouldn't depends on legacy SPI,
so remove the 'depends on SPI'
Cc: Vignesh R <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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AM654/J721e has HyperBus Memory Controller that supports HyperFlash and
HyperRAM devices. It provides a memory mapped interface to interact with
these devices. Add a driver to support the same.
Driver calibrates the controller, setups up for MMIO access and probes
HyperFlash child node.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Make use of CONFIG_SYS_MONITOR_BASE only when available to avoid build
error when CONFIG_SYS_MONITOR_BASE is not defined.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add devm_clk_get(), devm_clk_get_optional() to get clocks from the
device-tree. The clocks is automatically released and the data structure
freed when the device is unbound.
Also add devm_clk_put() to release the clock and free the data structure
manually.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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It might be interesting, if "skip_check" is set or not, so lets print
this flag in ubi_dump_vol_info() as well.
hs: fix typo in commit message
Signed-off-by: Stefan Roese <[email protected]>
Cc: Quentin Schulz <[email protected]>
Cc: Boris Brezillon <[email protected]>
Cc: Heiko Schocher <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Some users of static UBI volumes implement their own integrity check,
thus making the volume CRC check done at open time useless. For
instance, this is the case when one use the ubiblock + dm-verity +
squashfs combination, where dm-verity already checks integrity of the
block device but this time at the block granularity instead of verifying
the whole volume.
Skipping this test drastically improves the boot-time.
Adapted to U-Boot by Stefan Roese.
Signed-off-by: Quentin Schulz <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Quentin Schulz <[email protected]>
Cc: Boris Brezillon <[email protected]>
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At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.
Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.
Enable protection ops for SST26 flash series which were
previously enabled by
Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs
protection ops)
Signed-off-by: Eugeniy Paltsev <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.
Add missing SST26* flash IC protection ops which were introduced
previously by
Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs
protection ops)
Signed-off-by: Eugeniy Paltsev <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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spi_write_then_read, will manage to do the respective
spi_xfer based on the tx_buf, rx_buf so drop the
legacy spi_flash_read/write/cm code.
Tested-by: Adam Ford <[email protected]> #da850-evm
Signed-off-by: Jagan Teki <[email protected]>
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Now, we have spi_write_then_read routine that would handle
spi_xfer handling based on the tx_buf and rx_buf parameters.
So, replace individual flash read/write/cmd transfer call
with spi_write_then_read.
Cc: Egnite GmbH <[email protected]>
Cc: Daniel Gorsulowski <[email protected]>
Cc: Ilko Iliev <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Mateusz Kulikowski <[email protected]>
Cc: Alison Wang <[email protected]>
Tested-by: Adam Ford <[email protected]> #da850-evm
Signed-off-by: Jagan Teki <[email protected]>
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Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.
Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Eugen Hristev <[email protected]>
Cc: Miquel Raynal <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
[trini: Rework such that the configs are unchanged to start with]
Signed-off-by: Tom Rini <[email protected]>
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This file contains lots of internal details about the environment. Most
code can include env.h instead, calling the functions there as needed.
Rename this file and add a comment at the top to indicate its internal
nature.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Simon Goldschmidt <[email protected]>
[trini: Fixup apalis-tk1.c]
Signed-off-by: Tom Rini <[email protected]>
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This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Move this function over to the new header file.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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The array bounds have to be checked before accessing the array element.
Identified by cppcheck.
Fixes: 67ac6ffaeefb ("mtd: nand: davinci: add opportunity to write keystone U-boot image")
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Extend the davinci NAND driver to support the driver model. For now this
doesn't add any device-tree parsing due to the fact that we can't access
the actual nand node on the device-tree - it's a subnode of the aemif
device and we don't have an aemif driver on davinci at the moment.
Signed-off-by: Bartosz Golaszewski <[email protected]>
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This function is only used within the driver itself. No need
to export it.
Signed-off-by: Bartosz Golaszewski <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20190719
- CCF for i.MX6
- nandbcb command to write SPL into NAND
- Switch to DM (i.MX28)
- Boards: Toradex, engicam, DH
- Fixes for i.MX8
- Fixes for i.MX7ULP
Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
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mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.
These flashes are tested on LX2160ARDB and LS1028ARDB respectively
Signed-off-by: Kuldeep Singh <[email protected]>
Signed-off-by: Ashish Kumar <[email protected]>
[jagan: suffix 'ba' on part name and update commit message]
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.
It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.
It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.
So, cmd_nandbcb implemented in arch/arm/mach-imx
BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.
On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocks
for nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.
Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.
Reviewed-by: Stefano Babic <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Signed-off-by: Sergey Kubushyn <[email protected]>
Signed-off-by: Shyam Saini <[email protected]>
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mt25qu512a is rebranded after its spinoff from STM, so it is
different only in term of extended jedec ID, initial JEDEC id
is same as that of n25q512a.In order to avoid any confussion
with respect to name new entry is added.
This flash is tested for Single I/O mode on LS1046FRWY although
it also support QUAD I/O.
Signed-off-by: Ashish Kumar <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch solves warnings detected by setting W=1 when building.
Warnings type detected:
- [-Wsign-compare]
- [-Wtype-limits]
Signed-off-by: Christophe Kerello <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
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This allows to silence ubi and ubispl individually.
Signed-off-by: Markus Klotzbuecher <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Kyungmin Park <[email protected]>
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The motivation is to use the UBI atomic volume rename functionality to
allow double copy software updates on UBI. To that end the SPL is
configured to always load the same volume name (e.g. "u-boot"),
whereas a software updater always installs into the secondary volume
"u-boot_r". After successful installation, these two volume names are
switched.
This extension is protected by #ifdefs as it will somewhat slow down
loading of volumes by id. This is because the code needs to disable
the optimization of ignoring all volume ids which are not
to-be-loaded, since these can only be resolved after attaching.
This adds two vtbl related functions from Linux, which are taken from
the same kernel version as the current main U-Boot UBI code (Linux 4.2
64291f7db5bd8).
Signed-off-by: Hamish Guthrie <[email protected]>
Signed-off-by: Markus Klotzbuecher <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Kyungmin Park <[email protected]>
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- drop CONFIG_ prefix from kconfig entry
- fix small compilation issue with CONFIG_UBI_SILENCE_MSG
Signed-off-by: Markus Klotzbuecher <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Kyungmin Park <[email protected]>
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When ENV_IS_IN_UBI is enable, get_mtdparts is called before relocation.
During first get_mtdparts() call, mtdparts is not available in environment,
it can be retrieved by calling board_mtdparts_default(), but following
env_set() do nothing as we are before relocation. Finally mtdparts is
still not available in environment.
At second get_mtdparts() call, use_defaults is false, but mtdparts is still
not in environment and is NULL.
Remove use_defaults bool, only mtdparts criteria is useful.
Fixes: commit 5ffcd50612f6 ("mtd: Use default mtdparts/mtids when not defined
in the environment")
Signed-off-by: Patrice Chotard <[email protected]>
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Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <[email protected]>
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While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.
Acked-by: Alexey Brodkin <[email protected]>
Signed-off-by: Trevor Woerner <[email protected]>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <[email protected]>
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There is no 'config CRC32' remove the select that was attempting to use
it.
Reported-by: Robert P. J. Day <[email protected]>
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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- Important spi-mem fix
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The support for DaVinci DM* SoCs has been dropped. The code that used
to be relevant to dm644x is no longer needed. Remove it.
Signed-off-by: Bartosz Golaszewski <[email protected]>
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Some SPI controllers can't write nor->page_size bytes in a single step
because their TX FIFO is too small, but when that happens we should
make sure a WRITE_EN command before each write access and READ_SR command
after each write access is issued.
We should allow nor->write() to return a size that is smaller than the
requested write size to gracefully handle this case.
Also, the spi_nor_write_data() should return the actual number of bytes
that were written during the spi_mem_exec_op() operation.
This patch is a combination of two commits backported from kernel:
commit 630d6bd8a3b4 ("mtd: spi-nor: Support controllers with limit ...")
commit 3baa8ec88c2f ("mtd: devices: m25p80: Make sure WRITE_EN is ...")
Cc: Vignesh R <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
Acked-by: Vignesh R <[email protected]>
Tested-by: Shyam Saini <[email protected]> # microzed
Acked-by: Jagan Teki <[email protected]>
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