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The conversion from offsets to C structs lost a little padding in the DMA
register map. Accessing endpoints other than ep0 with DMA would fail as
the addresses wouldn't be adjusted correctly.
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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eraseregions numblocks was sometimes one less than actual, possibly producing
erase regions with zero blocks. As MTD code touches eraseregions only if
numeraseregions is greater that zero, allocate eraseregions only for non
uniform erase size flash.
Signed-off-by: Ladislav Michl <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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* add's at91_emac (AT91RM9200) network driver (NET_MULTI api)
* enable driver with CONFIG_DRIVER_AT91EMAC
* generic PHY initialization
* modify AT91RM9200 boards to use NET_MULTI driver
* the drivers has been tested with LXT971 Phy and DM9161 Phy at
MII and RMII interface
Signed-off-by: Jens Scharsig <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Added ethernet driver for EP93xx SoCs
Signed-off-by: Matthias Kaehlcke <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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There's no sensible reason to unite speed and interface type into
one variable. So split this variable enet_interface into two
vars: enet_interface_type, which hold the interface type and speed.
Also: add the possibility for switching between 10 and 100 MBit
interfaces on the fly, when running in FAST_ETH mode.
Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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The EMAC IP on DM365, DM646x and DA830 is slightly different
from that on DM644x. This change updates the DaVinci EMAC driver
so that EMAC becomes operational on SOCs with EMAC v2.
Signed-off-by: Nick Thompson <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Enabling CONFIG_CMD_MII in AVR32 boards was not possible due to
compile errors.
This patch fixes miiphy_read and miiphy_write functions and
registers them properly.
Signed-off-by: Semih Hazar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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The TSEC_FIBER flag should be set when a PHY is operating with an
external fiber interface. Currently it is only used to notify a user
that the PHY is operating in fiber mode.
A short description was also added to the other TSEC flag defines so
that it is clear how they differ from one another.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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The BCM5482 PHY supports both copper and fiber as an ethernet medium.
By enabling its copper/fiber mode auto-detection feature it can
dynamically determine if it should be configured for copper or fiber.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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- Cleanup formatting of phy_info structures
- Fix lines > 80 chars
- Fix some random indentation inconsistencies
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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This is generally good practice and saves ~150 bytes.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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- Remove unnecessary printing "Enet starting in <speed>/<duplex>"
This same information is already printed during normal ethernet
operation in the form "Speed: 1000, full duplex".
- Add a check for link before determining link speed and duplex
If there is no link, speed/duplex don't matter. This also removes
the annoying and unneeded "Auto-neg error, defaulting to 10BT/HD"
message that occurs when no link is detected.
- Whitespace and line > 80 characters cleanup
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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In SGMII mode the link between a processor's internal TBI PHY and an
external PHY should always be 1000Mbps, full duplex. Also, the SGMII
interface between an internal TBI PHY and external PHY does not
support in-band auto-negotation.
Previously, when configured for SGMII mode a TBI PHY would attempt to
restart auto-negotation during initializtion. This auto-negotation
between a TBI PHY and external PHY would fail and result in unusable
ethernet operation.
Forcing the TBI PHY and and external PHY to link at 1000Mbps full duplex
in SGMII mode resolves this issue of auto-negotation failing.
Note that 10Mbps and 100Mbps operation is still possible on the external
side of the external PHY even when SGMII is operating at 1000Mbps.
The SGMII interface still operates at 1000Mbps, but each byte of data
is repeated 100 or 10 times for 10/100Mbps and the external PHY handles
converting this data stream into proper 10/100Mbps signalling.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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This patch turns off MAC address mismatch warning when
optional eeprom programmed with MAC address is not available.
In that case, smc911x's MAC address register has its default
value ff:ff:ff:ff:ff:ff and it's not a valid address. This
makes eth_initialize() show the warning which has no
meaningful information while environment variable ethaddr
overrides the address read from the register. If there's no
eeprom and the value of MAC address register is not valid
after initialization, dev->enetaddr had better not be updated
and maintain its initial value 00:00:00:00:00:00, which I
think is what eth_initialize() expects. This is not a bug fix.
Even without this patch, the driver works fine. It's just for
enhancing the way of displaying messages.
Signed-off-by: Seunghyeon Rhee <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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cs8900_initialize(): remove unecessary calls to free() and fix memory leak
Signed-off-by: Matthias Kaehlcke <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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This adds support for the CLCD logic cell. It accepts precompiled
register values for specific configuration through a board-supplied
data structure. It is used by the Nomadik nhk8815, added by a later
patch in this series.
Signed-off-by: Alessandro Rubini <[email protected]>
Acked-by: Andrea Gallo <[email protected]>
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Add support for version 1.1 of the nfc nand flash
controller which is on the i.mx25 soc.
Signed-off-by: John Rigby <[email protected]>
CC: Scott Wood <[email protected]>
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SPEAr SoCs contain a synopsys usb device controller.
USB Device IP can work in 2 modes
- DMA mode
- Slave mode
The driver adds support only for slave mode operation of usb
device IP. This driver is used along with standard USBTTY
driver to obtain a tty interface over USB on the host
Signed-off-by: Vipin <[email protected]>
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SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories
Signed-off-by: Vipin <[email protected]>
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SPEAr SoCs contain a serial memory interface controller. This
controller is used to interface with spi based memories.
This patch adds the driver for this IP.
Signed-off-by: Vipin <[email protected]>
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SPEAr SoCs contain a synopsys i2c controller.
This patch adds the driver for this IP.
Signed-off-by: Vipin <[email protected]>
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later
These are few files directly imported from Linux kernel source.
Those are not modifyed at all ar per strategy.
These files contains source with GPLv2 only
whereas u-boot expects GPLv2 or latter
These files are updated for the same from prior permission from original writes
Acked-by: Nicolas Pitre <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
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The list of 4xx SoCs that should send type 1 PCI transactions
is not defined correctly. As a result PCI-PCI bridges and devices
behind them are not identified. The following 4xx variants should
send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.
Signed-off-by: Felix Radensky <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Import the large page oob layout from Linux mxc_nand.c driver.
The CONFIG_SYS_NAND_LARGEPAGE option is used to activate
the large page oob layout. Run time detection is not supported
as this moment.
This has been tested on the i.MX31 PDK board with a large
page NAND device.
Signed-off-by: Magnus Lilja <[email protected]>
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Tested on i.MX31 Litekit.
Signed-off-by: Magnus Lilja <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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When referring to PCIe and USB 'endpoint' is the standard naming
convention.
Signed-off-by: Peter Tyser <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Acked-by: Remy Bohmer <[email protected]>
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If the requested clock cannot be exactly obtained, round it up so that we
err on the side of slightly slower rather than slightly faster.
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Some SPI devices like to see high idle values rather than low.
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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For MUSB devices that do not support multipoint (hubs), we have to emulate
a root hub so that we can support core operations like resetting ports.
Signed-off-by: Bryan Wu <[email protected]>
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Currently ppc440epx uses OHCI for USB full-speed support. This change adds
support for EHCI.
Signed-off-by: Chris Zhang <[email protected]>
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In USB ehci driver, the port reset is not terminated. EHCI spec says "A host
controller must terminate the reset and stabilize the state of the port within
2 milliseconds". Without termination, a port stays at reset state. This is
observed on ppc4xx(sequoia) boards.
Signed-off-by: Chris Zhang <[email protected]>
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This patch fixes this warning during compile:
omap3.c: In function 'musb_platform_init':
omap3.c:126: warning: label 'end' defined but not used
Problem reported by: Dirk Behme[[email protected]]
Signed-off-by: Sanjeev Premi <[email protected]>
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Signed-off-by: Bryan Wu <[email protected]>
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
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The RX Control/Status register has bits that we want to preserve, so don't
just write out a single bit. Preserve the others bits in the process.
The original code posted to the u-boot list had this behavior, but looks
like it was lost somewhere along the way to merging.
Signed-off-by: Bryan Wu <[email protected]>
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
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The multipoint handling under MUSB is optional, and some parts (like the
Blackfin processor) do not implement support for it.
Signed-off-by: Bryan Wu <[email protected]>
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
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The dynamic FIFO handling under MUSB is optional, and some parts (like
the Blackfin processor) do not implement support for it.
Due to this, the FIFO reading/writing steps need special handling, so
mark the common versions weak so drivers can override.
Signed-off-by: Bryan Wu <[email protected]>
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
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Tested USB host functionality on DA830 EVM.
Signed-off-by: Ajay Kumar Gupta <[email protected]>
Signed-off-by: Swaminathan S <[email protected]>
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Introduces various optimisations that approximately triple the
read data rate from NAND when run on da830evm.
Most of these optimisations depend on the endianess of the machine
and most of them are very similar to optimisations already present
in the Linux Kernel.
Signed-off-by: Nick Thompson <[email protected]>
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All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
that uses the standard PCI programming model to determine host vs
agent/end-point.
Signed-off-by: Kumar Gala <[email protected]>
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