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Signed-off-by: Wolfgang Denk <[email protected]>
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Conflicts:
drivers/spi/Makefile
Signed-off-by: Wolfgang Denk <[email protected]>
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This patch fixes a build problem noticed on Apollon by using
mtd_dev_by_eb() instead of "/" as done in the Linux UBI version.
So this brings the U-Boot UBI version more in sync with the Linux
version again.
Signed-off-by: Stefan Roese <[email protected]>
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new chips supported:-
MX25L1605D, MX25L3205D, MX25L6405D, MX25L12855E
out of which MX25L6405D and MX25L12855E tested on Kirkwood platforms
Modified the Macronix flash support to use 2 bytes of device id instead of 1
This was required to support MX25L12855E
Signed-off-by: Piyush Shah <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Looks like when I was encoding the sector sizes, I forgot to divide by 8
(due to the stupid marketing driven process that declares all sizes in
useless megabits and not megabytes).
Signed-off-by: Mike Frysinger <[email protected]>
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This patch looks okay on u-boot-net.git/next branch
but when it was merged to u-boot.git/master the last line is missing
Signed-off-by: Prafulla Wadaskar <[email protected]>
Acked-by: Ben Warren <[email protected]>
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NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.
Without this patch, EMIF configurations made in board_init()
will be invalidated.
Signed-off-by: Thomas Lange <[email protected]>
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Kirkwood family controllers are highly integrated SOCs
based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core.
SOC versions supported:-
1) 88F6281-A0 define CONFIG_KW88F6281_A0
2) 88F6192-A0 define CONFIG_KW88F6192_A0
Other supported features:-
1) get_random_hex() fucntion
2) PCI Express port initialization
3) NS16550 driver support
Contributors:
Yotam Admon <[email protected]>
Michael Blostein <[email protected]
Reviewed-by: Ronen Shitrit <[email protected]>
Acked-by: Stefan Rose <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Reviewed-by: Ira W. Snyder <[email protected]>
Tested-by: Ira W. Snyder <[email protected]>
Acked-by: Kim Phillips <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Make DMA transactions snoopable so that CPUs can keep caches up-to-date.
This allows dma transactions to be used for operations such as memory
copies without any additional cache control operations.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Also update dmacpy()'s argument order to match memcpy's and use
phys_addr_t/phy_size_t for address/size arguments
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests. Previously, CS was being
set, not cleared.
Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Support DMA transfers larger than the DMA controller's limit of
(2 ^ 26 - 1) bytes
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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This patch allows the guard time parameter to be set in
the Atmel LCDC driver.
By default, the previous value of 1 is used, unless the
setting is defined elsewhere.
Signed-off-by: Mark Jackson <[email protected]>
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If doing a pure write with register address and data (not a read/write
combo transfer), we don't set the initial transfer length properly which
ends up causing only the register address to be transferred.
While we're here, fix the i2c_write() parameter description of the buffer.
Signed-off-by: Peter Meerwald <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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This patch adds a SPI driver for the Marvell Kirkwood SoC's.
Signed-off-by: Prafulla Wadaskar <[email protected]>
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UART hardware on i.MX27 is the same as on the i.MX31 so we just
need to provide the driver with correct address of the registers.
Signed-off-by: Ilya Yanok <[email protected]>
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All drivers need to be converted to CONFIG_NET_MULTI.
This patch converts the dm9000 driver.
Signed-off-by: Thomas Smits <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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This patch adds a egiga driver for the Marvell Kirkwood SoC's.
Contributors:
Yotam Admon <[email protected]>
Michael Blostein <[email protected]
Reviewed-by: Ronen Shitrit <[email protected]>
Acked-by: Stefan Rose <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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udelay(1) loop counter.
From 584b5fbd4abfc43f920cc1c329633e03816e28be Mon Sep 17 00:00:00 2001
From: Richard Retanubun <[email protected]>
Date: Wed, 20 May 2009 18:26:01 -0400
Subject: [PATCH] Standardize the use of MCFFEC_TOUT_LOOP as a udelay(1) loop counter.
Signed-off-by: Richard Retanubun <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Signed-off-by: Ben Warren <[email protected]>
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Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c
Signed-off-by: Ben Warren <[email protected]>
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Removed pointless #ifdefs
Moved functions around in file in preparation for switch to newer API
Signed-off-by: Ben Warren <[email protected]>
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This driver has been renamed davinci_emac.c
Signed-off-by: Ben Warren <[email protected]>
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Chips supported:-
1. 88E6161 6 port gbe swtich with 5 integrated PHYs
2. 88E6165 6 port gbe swtich with 5 integrated PHYs
2. 88E6132 3 port gbe swtich with 2 integrated PHYs
Platform specific configuration supported for:-
default or router port vlan configuration
led_init configuration
mdip/n polarity reversal configuration
Note: This driver is supported and tested against
kirkwood egiga interface
Contributors:
Yotam Admon <[email protected]>
Michael Blostein <[email protected]
Reviewed by: Ronen Shitrit <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Signed-off-by: Zach LeRoy <[email protected]>
Acked-by: Kumar Gala <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Signed-off-by: Grzegorz Bernacki <[email protected]>
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This reverts commit ca9c8a1e10fac01e6a1129f82a7ce18bd818fa43,
which causes compile warnings ("large integer implicitly truncated
to unsigned type") on all systems that use this driver. The warning
results from passing long constants (TX_CFG, RX_CFG) into
smc911x_set_mac_csr() which is declared to accept "unsigned
character" arguments only.
Being close to a release, with nobody available to actually test the
code or the suggested fixes, it seems better to revert the patch.
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Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The uec driver contains code to hard code configuration information for the uec
ethernet controllers. This patch creates an array of uec_info structures, which
are then parsed by the corresponding driver instance to determine configuration.
It also creates function uec_standard_init() to initialize all UEC interfaces
for 83xx and 85xx.
Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII-
1000 mode.
Signed-off-by: Haiying Wang <[email protected]>
Acked-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.
Signed-off-by: Haiying Wang <[email protected]>
Acked-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Rename riscRx/riscTx to risc_rx/risc_tx to comply with Codingstyle.
Signed-off-by: Haiying Wang <[email protected]>
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This patch adds NAND Flash Controller driver for MPC5121 revision 2.
All device features, except hardware ECC and power management, are
supported.
This NFC driver replaces the one orignally posted by John Rigby:
"[PATCH] Freescale NFC NAND driver"
It's a port of the Linux driver version posted by Piotr Ziecik a few
weeks ago. Using this driver has the following advantages (from my
point of view):
- Compatibility with the Linux NAND driver (e.g. ECC usage)
- Better code quality in general
- Resulting U-Boot image is a bit smaller (approx. 3k)
- Better to sync with newer Linux driver versions
The only disadvantage I can see, is that HW-ECC is not supported right
now. But this could be added later (e.g. port from Linux driver after
it's supported there). Using HW-ECC on the MCP5121 NFC has a general
problem because of the ECC usage in the spare area. This collides with
JFFS2 for example.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Piotr Ziecik <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: John Rigby <[email protected]>
Cc: Scott Wood <[email protected]>
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UBI is quite memory greedy and requires at least approx. 512k of malloc
area. This patch adds a compile-time check, so that boards will not
build with less memory reserved for this area (CONFIG_SYS_MALLOC_LEN).
Signed-off-by: Stefan Roese <[email protected]>
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Added macronix SF driver for MTD framework
MX25L12805D is supported and tested
TBD: sector erase implementation, other deivces support
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Todor I Mollov <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
CC: Haavard Skinnemoen <[email protected]>
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The following patch reorganizes/reworks the USB support for mpc83xx
as under:-
* Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to
cpu/mpx83xx/cpu_init.c
* Board specific usb_phy_type is read from the environment
* Adds USB EHCI specific structure in include/usb/ehci-fsl.h
* Copyrights revamped in most of the following files
Signed-off-by: Vivek Mahajan <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
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The following patch moves 8xxx-specifc USB #defines from
drivers/usb/host/ehci-fsl.h to include/usb.
Signed-off-by: Vivek Mahajan <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
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