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This converts the following to Kconfig:
CONFIG_DRIVER_TI_EMAC_USE_RMII
Signed-off-by: Adam Ford <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Handle errors in Meson serial driver
- Enable HDMI, keyboard and ADC for Odroid-C2
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- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a
- lx2-watchdog support
- layerscape: pci-endpoint support, spin table relocation fixes and
cleanups
- fsl-crypto: RNG support and bug fixes
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https://gitlab.denx.de/u-boot/custodians/u-boot-dm
binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
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This checks and handles RX errors on the Amlogic UART controller
after experiencing errors on the Khadas VIM3 & VIM3L when UART AO A
lines are not connected.
When the RX line is not connected, the first byte is erroneous and breaks
the U-Boot autoboot, breaking automatic boot.
This checks and drops any erroneous RX byte on pending and getc callbacks
to avoid returning true to pending when an error byte is in the FIFO.
Fixes: bfcef28ae4 ("arm: add initial support for Amlogic Meson and ODROID-C2")
Signed-off-by: Neil Armstrong <[email protected]>
Tested-by: Guillaume La Roque <[email protected]>
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- R8A774A1 / Beacon EmbeddedWorks RZG2M Dev Kit support
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According to Server Base System Architecture (SBSA) specification,
the SBSA Generic Watchdog has two stage timeouts: the first signal
(WS0) is for alerting the system by interrupt, the second one (WS1) is a
real hardware reset.
More details about the hardware specification of this device:
ARM DEN0029B - Server Base System Architecture (SBSA)
This driver can operate ARM SBSA Generic Watchdog as a single stage
In the single stage mode, when the timeout is reached, your system
will be reset by WS1. The first signal (WS0) is ignored.
Signed-off-by: Zhao Qiang <[email protected]>
Signed-off-by: Biwen Li <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Add Root Complex and Endpoint mode specific config entries, such that
it's feasible to enable the RC and/or EP mode driver indepently.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Add the PCIe EP mode support for lx2160a-v2 platform.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Modify the ls_pcie_dump_atu function, make it can print the INBOUND
windows registers.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Priyanka Jain <[email protected]>
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Add the INBOUND configuration for VFs of PF.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Due to the ls2085a and ls2080a use different way to set the BAR size,
so add the BAR size init code here.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Add the multiple function support for Layerscape platform, some PEXs
of Layerscaple platform have more than one PF.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Priyanka Jain <[email protected]>
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Some EP deivces need to initialize before RC scan it, e.g. NXP
layerscape platform, so add the init function in pci_ep uclass.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Split the RC and EP driver, and reimplement the EP driver base on
the EP framework.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
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Move i2c_early_init_f to common function
to initialize baudrate of i2c
Signed-off-by: Biwen Li <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Register the random number generator with the rng subsystem in u-boot.
This way it can be used by EFI as well as for the 'rng' command.
Signed-off-by: Michael Walle <[email protected]>
Tested-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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If it is already instantiated tear it down first and then reinstanciate
it again with prediction resistance.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The secure keys (TDKEK, JDKEK, TDSK) can only be generated once after a
POR. Otherwise the RNG4 will throw an error.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Horia Geantă <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Since Era 10, the version registers changed. Add the version registers
and use them on newer modules.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Horia Geantă <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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We need the era in other modules, too. For example, to get the RNG
version.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Horia Geantă <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Align the status line with all the other output in U-Boot.
Before the change:
DDR 3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT: Started with servicing (60s timeout)
After the change:
DDR 3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT: Started with servicing (60s timeout)
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Horia Geantă <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The value 0 assigned to final is overwritten before ever being used.
Remove the assignment.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The sequence of arguments should match the format string.
For printing unsigned numbers we should use %u.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The eSDHC adapter card identification and multiplexing configuration
through FPGA had been implemented in both common mmc driver and
fsl_esdhc driver. However it is proper to move these code to board
files and do it during board initialization. The FPGA registers are
also board specific.
This patch is to move eSDHC adapter card identification and
multiplexing configuration from mmc driver to specific board files.
And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed.
Signed-off-by: Yangbo Lu <[email protected]>
[Rebased, Removed T1040QDS change as board does not exist]
Signed-off-by: Priyanka Jain <[email protected]>
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The sdhc_adapter of global data has not been used, and we
do not have to use it as global data even we may need it
in the future.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_ID
Signed-off-by: Chaitanya Sakinam <[email protected]>
Signed-off-by: Anji J <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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On aarch64 running with dcache off, will result in an unaligned access
exception:
=> dcache off
=> hash sha1 $kernel_addr_r 100
"Synchronous Abort" handler, esr 0x96000061
elr: 00000000960317d8 lr : 00000000960316a4 (reloc)
elr: 00000000fbd787d8 lr : 00000000fbd786a4
[..]
The compiler emits a "stur x1, [x0, #12]". x1 is might just be 32 bit
aligned pointer. Remove the unused u64 element from the union to drop
the minimal alignment to 32 bit. Also remove the union, because it is
no more needed.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Current PFE firmware access spi-nor memory directly. New spi-mem
framework does not support direct memory access. So, let's use
spi_flash_read API to access memory instead of directly using it.
Signed-off-by: Kuldeep Singh <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Communication with some SPI slaves just won't cut it if these delays
(before the beginning, and after the end of a transfer) are not added to
the Chip Select signal.
These are a straight copy from Linux:
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
drivers/spi/spi-fsl-dspi.c
Signed-off-by: Vladimir Oltean <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
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When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.
To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/
The semantic patch that makes this change is as follows:
<smpl>
@@
expression dev;
@@
-devfdt_get_addr(dev)
+dev_read_addr(dev)
</smpl>
Signed-off-by: Masahiro Yamada <[email protected]>
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This cast is unneeded.
Signed-off-by: Masahiro Yamada <[email protected]>
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Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.
One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:
priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
if (!priv->regs)
return -EINVAL;
devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.
dev_read_addr_ptr() returns NULL on error, so this error check
will work.
I generated this commit by the following command:
$ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'
I manually fixed drivers/usb/host/ehci-mx6.c
Signed-off-by: Masahiro Yamada <[email protected]>
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Introduce an soc_ti_k3_driver that allows identification and selection
of SoC specific data based on the JTAG ID register for device
identification, as described for AM65x[0] and J721E[1] devices.
[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf
Signed-off-by: Dave Gerlach <[email protected]>
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Add a sandbox SOC driver, and some tests for the SOC uclass.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Dave Gerlach <[email protected]>
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Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.
This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Dave Gerlach <[email protected]>
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These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.
Signed-off-by: Simon Glass <[email protected]>
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With all the changes in place, add support for DM into the
dc2114x driver.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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Split the RX data check from the rest of the RX function, so that
the check can be performed separately from the processing of the
packet and the release of the received packet once the processing
is finished.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the phys_to_bus() macros and calling that dev, we
can substitute dev with udevice when DM support lands and do minor
adjustment to the macros to support both DM and non-DM operation.
No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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This patch replaces the various uses of struct eth_device for accessing
device private data with struct dc2114x_priv, which is compatible both
with DM and non-DM operation.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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Introduce dc2114x_priv, which is a super-structure around eth_device
and tracks per-device state and the device IO address.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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The current dc21x4x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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This code is never used, remove it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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Add Kconfig entries for the dc2114x driver and convert various boards.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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For the usage in this driver, the chips are identical,
so support all of them.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
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