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2026-01-29Merge tag 'u-boot-stm32-20260129' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm - spi: stm32: OSPI and QSPI optimization - Update stm32 clock drivers to restore boot for STM32MP13/STM32MP2 board family - Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot - Use CONFIG_STM32MP15X to discern STM32MP15xx on DH STM32MP15xx DHSOM - Reinstate missing SPL configs for DH STM32MP15xx DHSOM - stm32mp2 boards: read boot index from backup register - video: simple_panel: add support for "rocktech,rk043fn48h" display - Add .of_to_plat callback in stm32_ltdc driver
2026-01-29misc: Keep FSL_IFC available on PowerPC as wellTom Rini
This symbol is used on a number of PowerPC platforms as well, so make it available there again. Fixes: 424b324165ea ("armv7: Add CPLD support via IFC to the ls1021a-iot board.") Acked-by: Peng Fan <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2026-01-29video: simple_panel: add support for "rocktech,rk043fn48h" displayRaphael Gallais-Pou
Add the compatible "rocktech,rk043fn48h" for simple-panel driver. Signed-off-by: Raphael Gallais-Pou <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2026-01-29video: stm32: ltdc: add .of_to_plat callbackRaphael Gallais-Pou
Drivers should extract device-tree data before probing via the .of_to_plat hook. Implement it for stm32_ltdc driver. No functional change. Signed-off-by: Raphael Gallais-Pou <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2026-01-29clk: stm32: Update clock management for STM32MP13/25Patrice Chotard
During clock's registration, clock's name are used to establish parent - child relation. On STM32MP13 and STM32MP25, most of SCMI clocks are parent clocks. Since commit fdb1bffe2827 ("clk: scmi: Postpone clock name resolution"), all scmi clocks are named by default "scmi-%zu" until they are enabled, it breaks clocks registration and boot process for STM32MP13/25 platforms. Rework the STM32 core clock driver and STM32MP13/25 clock description to use clock index instead of their real name. Introduce struct clk_parent_data which allows to identify parent clock either by index or by name. Name is only used for particular clocks provided by IP which are clock provider as i2s/i2s_ckin, usb0/ck_usbo_48m, and ltdc/ck_ker_ltdc. STM32_GATE() and STM32_COMPOSITE_NOMUX macros are updated in order to use parent clock index. As STM32MP13 supports both SPL and SCMI boot, keep using an array with clock's name for SPL. Fixes: fdb1bffe2827 ("clk: scmi: Postpone clock name resolution") Reviewed-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]>
2026-01-29clk: stm32mp13: Reorder include filesPatrice Chotard
Reorder include following rules available here : https://docs.u-boot.org/en/latest/develop/codingstyle.html#include-files Reviewed-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]>
2026-01-29spi: stm32-qspi: Optimize FIFO accesses using u16 or u32Patrice Chotard
FIFO accesses uses u8 only for read/write. In order to optimize throughput, add u16 or u32 read/write accesses when possible. Set FIFO threshold level value accordingly. Test performed by writing and reading 64MB on sNOR on stm32mp157c-ev1 board: before after ratio Write : 428 KB/s 719 KB/s +68% Read : 520 KB/s 3200 KB/s +615% Reviewed-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]>
2026-01-29spi: stm32-qspi: Increase read throughput in indirect modePatrice Chotard
When WATCHDOG_RESET() was replaced by schedule() in commit 29caf9305b6f ("cyclic: Use schedule() instead of WATCHDOG_RESET()") we not only reset the watchdog but also call the cyclic infrastructure which takes time and has impact on read accesses performances. Move schedule() from _stm32_qspi_read_fifo() to _stm32_qspi_poll() and call schedule() only every 1MB chunk of data. Test performed by reading 64MB on sNOR on stm32mp157c-ev1 board: before after ratio Read : 201 KB/s 520KB/s +258% Reviewed-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]>
2026-01-29spi: stm32-ospi: Increase read throughput in indirect modePatrice Chotard
Schedule() is called every u8/u16 or u32 read accesses which is overkill. Move schedule() from stm32_ospi_read_fifo() to stm32_ospi_tx_poll() and call schedule() only every 1MB chunk of data. Test performed by reading 64MB on sNOR on stm32mp257f-ev1 board: before after ratio Read : 10.6MB/s 14.2MB/s +34% Reviewed-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]>
2026-01-28Merge patch series "Add pinctrl driver for mt8188"Tom Rini
Julien Stephan <[email protected]> says: The driver is based on the kernel driver for mt8188. While at it, also add pinmux_property_set ops for mediatek pinctrl framework. Link: https://lore.kernel.org/r/20260122-add-mt8188-pinctrl-support-v2-0-324b4c8f2b64@baylibre.com
2026-01-28pinctrl: mediatek: add pinmux_property_set ops supportVitor Sato Eschholz
Add pinmux_property_set ops for mediatek pinctrl framework Signed-off-by: Julien Masson <[email protected]> Signed-off-by: Vitor Sato Eschholz <[email protected]> Signed-off-by: Julien Stephan <[email protected]> Reviewed-by: Macpaul Lin <[email protected]> Tested-by: David Lechner <[email protected]>
2026-01-28pinctrl: mediatek: Add pinctrl driver for MT8188 SoCChris-QJ Chen
Add pinctrl driver for mt8188. The driver is based on the kernel driver. Signed-off-by: Chris-QJ Chen <[email protected]> Signed-off-by: Jill.Wu <[email protected]> Signed-off-by: Vitor Sato Eschholz <[email protected]> Signed-off-by: Julien Stephan <[email protected]> Reviewed-by: Macpaul Lin <[email protected]>
2026-01-28Merge patch series "dm: core: Support same compatible in host/gadget musb ↵Tom Rini
drivers" Markus Schneider-Pargmann (TI.com) <[email protected]> says: musb currently uses a wrapper driver that binds on the parent device of the actual musb devices to manage the differentiation between gadget and host modes. However in the upstream devicetree this parent devicetree node can not be used to match the wrapper driver. To be able to probe the musb devices in host/gadget mode directly, this series introduces support for returning -ENODEV in bind functions resulting in iterating the remaining drivers potentially binding to other drivers that match the compatible. Link: https://lore.kernel.org/r/20260127-topic-musb-probing-v2026-01-v4-0-ea3201e0f809@baylibre.com
2026-01-28dm: core: lists_bind_fdt: Indent continuation debug log messageMarkus Schneider-Pargmann (TI)
The loop in lists_bind_fdt uses an indented style for log messages within the loop and normal messages for errors that lead to the exit of the function. Due to the change of the previous patch that adds support for continuation on -ENODEV returned by bind, the log message should be indented. Signed-off-by: Markus Schneider-Pargmann (TI) <[email protected]>
2026-01-28dm: core: Support multiple drivers with same compatiblesMarkus Schneider-Pargmann (TI.com)
Currently once a driver matched the compatible string of a device, other drivers are ignored. If the first matching driver returns -ENODEV, no other possibly matching drivers are iterated with that compatible of the device. Instead the next compatible in the list of compatibles is selected, assuming only one driver matches one compatible at a time. To be able to use the bind function to return -ENODEV and continue matching other drivers with the same compatible, move the for loop a bit to continue the for loop after -ENODEV was returned. The loop had to be adjusted a bit to still support the 'drv' argument properly. Some simplifications were done as well. The modification will only add additional loop iterations if -ENODEV is returned. Otherwise the exit and continue conditions for the loop stay the same and do not cause any additional iterations and should not impact performance. This is required for ti-musb-host and ti-musb-peripheral which both match on the same device but differ based on the dr_mode DT property. Depending on this property, the driver is either UCLASS_USB or UCLASS_USB_GADGET_GENERIC. By checking the DT property in the bind function and returning -ENODEV the other driver can probe instead. Reviewed-by: Simon Glass <[email protected]> Acked-by: Dinesh Maniyam <[email protected]> Signed-off-by: Markus Schneider-Pargmann (TI.com) <[email protected]>
2026-01-28dm: core: lists_bind_fdt: Replace found variableMarkus Schneider-Pargmann (TI.com)
'found' is only used at the end of the function to print a debug message. No need to maintain a variable if we can just return 0 immediately when a driver was bound successfully. Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]> Signed-off-by: Markus Schneider-Pargmann (TI.com) <[email protected]>
2026-01-28dm: core: lists_bind_fdt: Remove unused variableMarkus Schneider-Pargmann (TI.com)
'result' is unused in this function, remove it. Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]> Signed-off-by: Markus Schneider-Pargmann (TI.com) <[email protected]>
2026-01-28Merge tag 'fsl-qoriq-for-2026.04-rc2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq - Rename freescale to nxp - Add CPLD support via IFC to the ls1021a-iot board - Use scmi_clk_state_in_v2 in sandbox
2026-01-28firmware: scmi: sandbox: Use scmi_clk_state_in_v2Peng Fan
The sandbox scmi clock protocol use version 3.0, so need to use scmi_clk_state_in_v2. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2026-01-28board: nxp: Rename board directory from board/freescale to board/nxpAlice Guo
This patch renames the board directory from board/freescale to board/nxp because NXP now provides Board Support Packages (BSPs) and tools for the former Freescale i.MX and other i.MX products. All relevant references have been updated accordingly. This change does not affect functionality. Signed-off-by: Alice Guo <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2026-01-28armv7: Add CPLD support via IFC to the ls1021a-iot board.Mateus Lima Alves
This patch adds CPLD support via IFC to the ls1021a-iot board. Signed-off-by: Mateus Lima Alves <[email protected]>
2026-01-27scsi: ufs: renesas: Add reusable functionsYoshihiro Shimoda
Since some settings can be reused on other UFS controller (R-Car S4-8 ES1.2), add reusable functions. Ported from Linux kernel commit 44ca16f4970e ("scsi: ufs: renesas: Add reusable functions") Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/446d67b751a96645799de3aeefec539735aa78c8.1741179611.git.geert+renesas@glider.be Signed-off-by: Martin K. Petersen <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Neil Armstrong <[email protected]>
2026-01-27scsi: ufs: renesas: Refactor 0x10ad/0x10af PHY settingsYoshihiro Shimoda
Extract specific PHY setting of the 0x10a[df] registers into a new function. Ported from Linux kernel commit cca2b807c227 ("scsi: ufs: renesas: Refactor 0x10ad/0x10af PHY settings") Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/110eafd1ee24f9db0285a5e2bca224e35962268a.1741179611.git.geert+renesas@glider.be Signed-off-by: Martin K. Petersen <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Neil Armstrong <[email protected]>
2026-01-27scsi: ufs: renesas: Remove register control helper functionYoshihiro Shimoda
After refactoring the code, ufs_renesas_reg_control() is no longer needed, because all operations are simple and can be called directly. Remove the ufs_renesas_reg_control() helper function, and call udelay() directly. Ported from Linux kernel commit 855bde8ce5bc ("scsi: ufs: renesas: Remove register control helper function") with replaced readl_poll_timeout_atomic() with readl_poll_sleep_timeout(). Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/69500e4c18be1ca1de360f9e797e282ffef04004.1741179611.git.geert+renesas@glider.be Signed-off-by: Martin K. Petersen <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Neil Armstrong <[email protected]>
2026-01-27scsi: ufs: renesas: Add register read to remove save/set/restoreYoshihiro Shimoda
Add support for returning read register values from ufs_renesas_reg_control(), so ufs_renesas_set_phy() can use the existing ufs_renesas_write_phy() helper. Remove the now unused code to save to, set, and restore from a static array inside ufs_renesas_reg_control(). Ported from Linux kernel commit 5129aa627599 ("scsi: ufs: renesas: Add register read to remove save/set/restore") Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/9fa240a9dc0308d6675138f8434eccb77f051650.1741179611.git.geert+renesas@glider.be Signed-off-by: Martin K. Petersen <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Neil Armstrong <[email protected]>
2026-01-27scsi: ufs: renesas: Replace init data by init codeYoshihiro Shimoda
Since initialization of the UFS controller on R-Car S4-8 ES1.0 requires only static values, the driver uses initialization data stored in the const ufs_param[] array. However, other UFS controller variants (R-Car S4-8 ES1.2) require dynamic values, like those obtained from E-FUSE. Refactor the initialization code to prepare for this. This also reduces kernel size by almost 30 KiB. Ported from Linux kernel commit c4e83573c3d0 ("scsi: ufs: renesas: Replace init data by init code") Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/3520e27ac7ff512de6508f630eee3c1689a7c73d.1741179611.git.geert+renesas@glider.be Signed-off-by: Martin K. Petersen <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Neil Armstrong <[email protected]>
2026-01-25power: regulator: enable AWP318W SPL supportYixun Lan
Add the descriptions for the DC/DC regulators of the AXP318W, and enable it when CONFIG_AXP318W_POWER is enabled. Signed-off-by: Yixun Lan <[email protected]> Reviewed-by: Andre Przywara <[email protected]>
2026-01-25power: regulator: add AXP318W supportYixun Lan
The PMIC is also known as AXP819 in vendor pmu code For DCDC6, 8, 9, the underlying hardware support more than two levels voltage step tuning, but for now only first two levels are implemented in this driver, hence highest voltage will be limited at seccond level. It actual meets board requirement in current design, and we've verified it in Radxa Cubie A7A board. Following are detail explanation of voltage tuning stpes for those DCDCs: DCDC | voltage range | units | steps | implemented 6 | 0.5 - 1.2 | 10 mV | 71 | Y . | 1.22 - 1.54 | 20 mV | 17 | Y . | 1.8 - 2.4 | 20 mV | 31 | N . | 2.44 - 2.76 | 40 mV | 9 | N -------------------------------------------------- 8/9 | 0.5 - 1.2 | 10 mV | 71 | Y . | 1.22 - 1.84 | 20 mV | 32 | Y . | 1.9 - 3.4 | 100mV | 16 | N Signed-off-by: Yixun Lan <[email protected]> Reviewed-by: Andre Przywara <[email protected]>
2026-01-25sunxi: extend R528/T113-s3/D1(s) DRAM initialisationLukas Schmid
The T113-s4 SoC is using the same die as the T113-s3, but comes with 256MiB of co-packaged DRAM. Besides the doubled size, the DRAM chip seems to be connected slightly differently, which requires to use a different pin remapping. Extend the DRAM initialisation code to add support for the T113-S4 aka T113M4020DC0 by checking the SoC's CHIPID, which is stored in the first word of the SID efuses. Signed-off-by: Lukas Schmid <[email protected]> Tested-by: John Watts <[email protected]> Reviewed-by: John Watts <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2026-01-25Merge branch 'master' of git://source.denx.de/u-boot-usbTom Rini
- XHCI DMA bugfix
2026-01-25usb: xhci: fix DMA address corruption in abort_tdANANDHAKRISHNAN S
When aborting a Transfer Descriptor (TD), the xHCI driver updates the device dequeue pointer by converting the virtual enqueue TRB pointer into a DMA address. Previously, the code OR-ed the ring's Dequeue Cycle State (DCS) bit into the virtual TRB pointer before passing it to xhci_trb_virt_to_dma(). This produced an unaligned virtual address (e.g. ending in 0x...1). Inside xhci_trb_virt_to_dma(), the offset calculation: segment_offset = trb - seg->trbs; operated on this unaligned pointer, resulting in an incorrect TRB index. In wraparound cases, this caused the bounds check to fail and the function to return 0. As a result, a SET_DEQ_PTR command was issued with a DMA address of 0x0, leading to controller hangs and transfer timeouts, most commonly when aborting TDs near the end of a ring segment (e.g. index 63). Fix this by translating the aligned virtual TRB pointer to a DMA address first, and only then applying the DCS bit to the resulting physical address. Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: ANANDHAKRISHNAN S <[email protected]>
2026-01-24video: add DejaVu Mono fontHeinrich Schuchardt
A TrueType font for U-Boot should fulfill the following requirements: * mono spaced * support full code page 437 * easily readable Unfortunately none of the fonts provided with U-Boot fulfills all of these requirements. Let's add the DejaVu Mono font. To reduce the code size the characters are limited to code page 437. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2026-01-22mmc: Fix retry logic in sd_get_capabilitiesYanir Levin
In sd_get_capabilities an ACMD is sent (SD_CMD_APP_SEND_SCR), which requires sending APP_CMD (MMC_CMD_APP_CMD) before. Currently, the ACMD is retried on error, however APP_CMD isn't. In this case, when the ACMD fails and it is tried again, the retry attempts will not be handled as ACMD, which is wrong. The fix performs the retry attempts on the sequence of APP_CMD and the ACMD together. Signed-off-by: Yanir Levin <[email protected]> Reviewed-by: Eran Moshe <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-01-22mmc: sdhci-cadence6: Fix the license to GPL-2.0+Hal Feng
The license of the file is not valid. Fix it to GPL-2.0+. Fixes: fe11aa0b8ca3 ("mmc: sdhci-cadence: Add support for Cadence sdmmc v6") Reported-by: Quentin Schulz <[email protected]> Reported-by: oliver Fendt <[email protected]> Closes: https://lore.kernel.org/all/CAFoF8fC4foffYJgYm9CkViET83gDu05noVRxLxgs+KWXN_-LBQ@mail.gmail.com/ Signed-off-by: Hal Feng <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Tanmay Kathpalia <[email protected]> Acked-by: Peng Fan <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-01-22mmc: mmc-uclass: Use max-frequency from device tree with driver default fallbackTanmay Kathpalia
Use dev_read_u32_default() instead of dev_read_u32() to read the "max-frequency" property from device tree. This preserves the driver-set cfg->f_max value when the optional "max-frequency" property is not present, ensuring the controller's default frequency is used as fallback rather than being overwritten. Suggested-by: Marek Vasut <[email protected]> Signed-off-by: Tanmay Kathpalia <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-01-22power: regulator: common: fix compilation issueJulien Stephan
If CONFIG_DM_GPIO is not enabled, compilation fails with the following errors: aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_of_to_plat': <...>/u-boot/drivers/power/regulator/regulator_common.c:30: undefined reference to `gpio_request_by_name' aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_get_enable': <...>/u-boot/drivers/power/regulator/regulator_common.c:57: undefined reference to `dm_gpio_get_value' aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_set_enable': <...>/u-boot/drivers/power/regulator/regulator_common.c:92: undefined reference to `dm_gpio_set_value' make: *** [Makefile:2029: u-boot] Error 139 Since the enable gpio is optional we can conditionally skip these calls. Reviewed-by: Tanmay Kathpalia <[email protected]> Reviewed-by: Peng Fan <[email protected]> Signed-off-by: Julien Stephan <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-01-22power: regulator: common: use dm_gpio_is_valid helperJulien Stephan
Use dm_gpio_is_valid() helper function instead of manually checking the gpio. Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Tanmay Kathpalia <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Julien Stephan <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-01-22power: regulator: common: remove unnecessary debug traceJulien Stephan
Drop the ftrace like debug() that checkpatch --strict complains about: WARNING: Unnecessary ftrace-like logging - prefer using ftrace Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Tanmay Kathpalia <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Julien Stephan <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-01-21pinctrl: mediatek: mt8365: add PUPD registersDavid Lechner
Add pull-up/pull-down (PUPD) register definitions for mt8365. Signed-off-by: David Lechner <[email protected]>
2026-01-21clk: mtk: use IS_ERR_VALUE() to check rate return valuesDavid Lechner
Replace casting with long to IS_ERR_VALUE() macro to check for error return values from rate calculation functions. This is the recommended way to check the return value from clock rate functions. Signed-off-by: David Lechner <[email protected]>
2026-01-21pinctrl: mediatek: fix failing to get sysconDavid Lechner
Replace uclass_get_device_by_ofnode() with syscon_regmap_lookup_by_phandle() to get the "mediatek,pctl-regmap" syscon device. Depending on probe order, uclass_get_device_by_ofnode() may fail, but syscon_regmap_lookup_by_phandle() has logic in it to handle that case correctly. The previous implementation could read more than one syscon if the "mediatek,pctl-regmap" property had more than one phandle, but the one board with a devicetree that does that is not supported in U-Boot yet, so we can save that for later (it may never be needed). Fixes: 424ceba18bfb ("pinctrl: mediatek: support mediatek,pctl-regmap property") Signed-off-by: David Lechner <[email protected]>
2026-01-21clk: mediatek: fix mux clocks with mapped parent IDsDavid Lechner
Pass the unmapped parent ID when setting parent for mux clocks. For technical reasons, some Mediatek clock driver have a mapping between the clock IDs used in the devicetree and ID used in the generic clock framework. The mtk_clk_mux_set_parent() function is comparing the passed mapped parent ID against the unmapped IDs in the chip-specific data structures. Before this change, we were passing the mapped parent ID. When there is a mapping, this resulted in buggy behavior (usually just incorrectly failing to find a match and returning an error). We need to pass the unmapped ID of the parent clock instead for the matching to work correctly. Since the reverse lookup is a bit verbose, a helper function is added to keep the code clean. Fixes: b1358915728b ("clk: mediatek: add of_xlate ops") Signed-off-by: David Lechner <[email protected]>
2026-01-21pinctrl: mediatek: ignored error return from pupd/r1/r0David Lechner
Ignore the error return value from mtk_pinconf_bias_set_pupd_r1_r0(). The PUPD/R1/R0 registers only include a small subset of the pins, so it is normal for this function to return an error for most pins. Therefore, this error should not be propagated. This fixes not all pins in a pinmux group being configured in some cases because the propagated error caused the configuration loop to exit early. The rest of the function is refactored to return early on errors to improve readability. Signed-off-by: David Lechner <[email protected]>
2026-01-21pinctrl: mediatek: set array size for reg_calsDavid Lechner
Set the size of the reg_cals arrays to PINCTRL_PIN_REG_MAX to in all affected mediatek pinctrl drivers. This is needed to avoid potential out-of-bounds accesses when they is used in mtk_hw_pin_field_get(). All array members need to be initialized since the code loops from 0 to PINCTRL_PIN_REG_MAX - 1. mt7622_reg_cals was already defined this way, but the others were not. Signed-off-by: David Lechner <[email protected]>
2026-01-21Merge patch series "clk: clk-uclass: debug message improvements"Tom Rini
David Lechner <[email protected]> says: I needed to debug some clock issues and found some places where pointer addresses were being printed when names were available. The addresses are not very helpful, but the names are. So here a couple of patches to improve that. Link: https://lore.kernel.org/r/[email protected]
2026-01-21clk: clk-uclass: used dev name in debug messageDavid Lechner
Consistently use the device name in debug messages. The clk-uclass file previously had a mix of printing the dev pointer and the device name. Changing all to use the device name makes the debug messages more useful. Signed-off-by: David Lechner <[email protected]>
2026-01-21clk: clk-uclass: fix format specifier for ofnode nameDavid Lechner
Change the format specifier from %p to %s when printing the ofnode name so that the actual name is printed instead of the pointer address. Signed-off-by: David Lechner <[email protected]>
2026-01-21arm: Remove remainder of ARCH_ORION5XTom Rini
With commit 5663b137e682 ("arm: Remove edminiv2 board") the last ARCH_ORION5X platform was removed. Remove the rest of the architecture code which is now unused. Reviewed-by: Tony Dinh <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2026-01-19Merge tag 'xilinx-for-v2026.04-rc1-v2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx/FPGA changes for v2026.04-rc1 v2 microblaze: - Fix spl_boot_list order versal2: - Fix EMMC distro boot setup - Align distro boot variables with memory layout zynqmp-phy: - Sync with Linux kernel driver zynqmp: - Add verify_auth command - DT sync - Add placing variables to FAT/EXT4 - Enable PCIe driver by default pcie - xilinx-nwl: - Fix Link down crash ufs: - Align clock/reset with DT binding # -----BEGIN PGP SIGNATURE----- # # iHUEABYIAB0WIQSXAixArPbWpRanWW+rB/7wTvUR9QUCaW3p3wAKCRCrB/7wTvUR # 9VkwAP4jPRALpM34VpTimNe/iwigIx8hAHxbvkUU0oJ/DW6W8AEAhCSL+ydgreuv # kKCyNiOF1sm8IrOh4TdtMIFn37d4Dwg= # =AkKK # -----END PGP SIGNATURE----- # gpg: Signature made Mon 19 Jan 2026 02:22:55 AM CST # gpg: using EDDSA key 97022C40ACF6D6A516A7596FAB07FEF04EF511F5 # gpg: Can't check signature: No public key
2026-01-17Merge tag 'u-boot-imx-master-20260117' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29031 - Fix interrupt storms in Linux on the imx93_frdm board. - Defconfig update for tqma6 board. - Miscellaneous cleanups/improvements for imx93_evk. - Allow booting from both USB controlles on i.MX6 DHSOM. - Handle third MAC address for SMARC i.MX95