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mmc_poll_for_busy() returns a false -ETIMEDOUT if the card becomes
ready on the exact iteration where timeout_ms reaches 0. The card-ready
check breaks out of the loop, but then the post-loop check
"if (timeout_ms <= 0)" fires and returns -ETIMEDOUT despite the card
being ready.
Fix by returning 0 directly when the card is ready instead of breaking
out of the loop. The only exit from the loop is now the timeout path,
so the post-loop code unconditionally returns -ETIMEDOUT.
Reviewed-by: Tanmay Kathpalia <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The original checking is wrong, it basically compares memory address
end = r->start + r->range;
with memory size:
if (end > (ddr_ram_size - ecc_res))
so the if() condition would be always true. This causes the ECC config
never take input from the devicetree.
Fixes: f43f71012254 ("ram: k3-ddrss: Add support for a partial inline ECC region")
Signed-off-by: Bin Liu <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
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Commit f43f71012254 ("ram: k3-ddrss: Add support for a partial inline
ECC region") uses ofnode_get_addr_size() to read memory address and
size from devicetree using type fdt_addr_t and fdt_size_t. However
these data types are 32bit if CONFIG_FDT_64BIT is not defined on ARMv7
build.
So enable CONFIG_FDT_64BIT to retrieve correct 64bit memory address and
size from devicetree.
Signed-off-by: Bin Liu <[email protected]>
Reviewed-by: Udit Kumar <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
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When DEBUG_UART and SKIP_EARLY_DM are enabled, the serial console
is still probed before relocation even though DEBUG_UART already
configures the UART and provides early console output. The debug
UART configuration is sufficient until relocation, making full
serial driver initialization at this stage unnecessary.
Furthermore, the initialization is slow since it runs with dcache
disabled and is repeated again after relocation.
Skip pre-relocation serial probing in this configuration and
defer full UART initialization until after relocation. Update the
GENI UART probe logic accordingly.
This removes redundant UART initialization and improves boot
performance.
Signed-off-by: Aswin Murugan <[email protected]>
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single_add_gpio_func() calls ofnode_parse_phandle_with_args() once per
gpio-range entry. With a flat device tree, every call re-iterates the
property from index 0 and, because cellname is set, performs an
fdt_node_offset_by_phandle() (a full-FDT scan) at every step. The total
cost is therefore quadratic in the number of entries and proportional to
the size of the device tree.
The impact depends on when the pinctrl is probed. On the J722S EVM
defconfig, pinctrl@f4000 (main_pmx0, the SoC's stock 7-entry gpio-range)
is probed after relocation (caches on): single_add_gpio_func() takes
~18 ms there and ~1 ms with this change. When the node is probed before
relocation (caches off) the same parse takes hundreds of ms; on a board
that probes it pre-relocation and runs LPDDR4 clocked down it reached
723 ms, cut to 22 ms here. Any pinctrl-single user with a populated
gpio-range property pays this cost.
The phandle target is never dereferenced by this function (only the
argument cells are stored), so resolve it only for the first entry to
learn the per-entry cell count, then read the argument cells directly
with ofnode_read_u32_index() and allocate the ranges in one block. A
zero phandle still terminates the list, as in the original loop. This
follows the existing pinctrl-single,gpio-range usage observed in current
DTs, where entries use the same provider and therefore a uniform
per-entry cell count.
Signed-off-by: Jordi Trepat Mur <[email protected]>
Reviewed-by: Anshul Dalal <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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https://git.u-boot-project.org/u-boot/custodians/neil.armstrong/u-boot-nvme
- nvme: Fix missing address translation for PCIe inbound access
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https://git.u-boot-project.org/u-boot/custodians/neil.armstrong/u-boot-ufs
- ufs: invalidate the whole descriptor data segment after a query read
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https://git.u-boot-project.org/u-boot/custodians/u-boot-dfu
u-boot-dfu-20260728
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-dfu/-/pipelines/769
Android:
* avb: Update libavb to AOSP 1.3.0
* avb: Fix memory leak on mmc_part
* bootmeth_android: Fix memory leaks for AvbOps and verify-data
* bootmeth_android: Fix out-of-bounds access in bootconfig parsing
USB Gadget:
* cmd: ums: Set serial# on iSerial device descriptor
* dwc2: Set maxpacket_limit and endpoint capabilities to prepare for
udc core migration
* ci_udc: Fix ep type in ep_enable()
* ci_udc: Set usb request status to handle complete callback
* ci_udc: Ensure dtds are inactive before completing request
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https://git.u-boot-project.org/u-boot/custodians/u-boot-imx
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-imx/-/pipelines/749
- Support authenticating signed Mcore container image on i.MX9.
- Support booting CM70, CM71 and CM33 sync cores on i.MX9.
- Add i.MX SNVS RTC driver.
- Detect RAM sizes on Toradex smarc and aquila i.MX95 boards.
- Add support for the Librem5 devkit.
- Subtract half a cycle instead of three quarters of a cycle after DQS
gating calibration on i.MX6.
- Several tqma6 improvements.
- Add product ID support for new Toradex boards.
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https://git.u-boot-project.org/u-boot/custodians/u-boot-sunxi
Beside a fix for a long standing bug in the A80 eMMC code, this adds
SPI booting support for the Allwinner A523/A527/T527 class of boards.
The second major feature is support for the secondary Ethernet controller
on that same SoC. This might not be as important as for the kernel (I
doubt that U-Boot acts as a router), but for once some boards only connect
the secondary EMAC, and on others people might have the boot server only
reachable via this port.
There are some smaller fixes and improvements still queued up, but they
need some more testing and are minor, so can land a bit later.
The world build timed out, but the rest passed, and I booted that briefly
on an A523 board with two Ethernet ports.
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https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip
- Switched to use upstream pinctrl header include,
- Dropped SDHCI DT properties in U-Boot-specific DT for NanoPi R5 as
most are present upstream and those which aren't are breaking devices,
- Fixed ECC strength mismatch between reading and writing on non-0
NAND chips configured as boot medium (nand-is-boot-medium),
- Moved Simon to reviewer for ARM ROCKCHIP,
- Fixed build issue related to GPT capsule support accessing a struct
member only present when CONFIG_PARTITION_TYPE_GUID is set,
- Added support for new devices:
- Anbernic RG-DS
- ROC-RK3588S-PC
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Add simple driver for i.MX SNVS RTC IP present in NXP i.MX SoCs.
Signed-off-by: Alexander Koch <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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The SYSINFO_TQ_EEPROM driver requires NVMEM to access the SoM EEPROM.
Signed-off-by: Max Merchel <[email protected]>
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The DM serial framework in __serial_getc() and __serial_putc() already
retries when driver ops return -EAGAIN, calling schedule() between
attempts to service the watchdog.
sifive_serial_getc() and sifive_serial_putc() spin internally on
-EAGAIN, which prevents the framework from calling schedule(). This can
lead to watchdog timeouts when waiting for RX data or TX FIFO space.
Remove the busy-loops and return -EAGAIN directly from the underlying
helpers, letting the framework handle retries with proper watchdog
servicing. This is consistent with how other DM serial drivers (pl01x,
meson, cortina, etc.) implement their ops.
Signed-off-by: Naveen Kumar Chaudhary <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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dev_read_addr returns FDT_ADDR_T_NONE (-1), not NULL,
in case of errors.
Replace dev_read_addr by dev_read_addr_ptr.
Replace error to EINVAL.
Signed-off-by: Francois Berder <[email protected]>
Reviewed-by: Hal Feng <[email protected]>
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The Allwinner sun55i (A523/A527/T527) platform features the Synopsys
DesignWare Ethernet QOS IP. To enable this GMAC controller in U-Boot,
this introduces the glue layer responsible for configuring the
corresponding clocks, resets, and syscon registers.
This implementation is directly ported from upstream Linux kernel commit
f603808a98af ("net: stmmac: Add support for Allwinner A523 GMAC200").
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Junhui Liu <[email protected]>
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The Allwinner sun55i (A523/A527/T527) platform requires the MBUS clock
gate enabled for the gmac1 controller to function. Add the clock gate
definition for CLK_MBUS_EMAC1.
Signed-off-by: Junhui Liu <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
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The Allwinner sun55i (A523/A527/T527) platform provide a Synopsys
DesignWare Ethernet QOS IP block as the gmac1 controller, which uses
pins PJ0 to PJ16. Add the gmac1 function to the pinctrl driver to
support it.
Signed-off-by: Junhui Liu <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
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The SPI controllers in the Allwinner A523/A527/T527 SoCs is very close
to the one used in the R329 and D1 generation, definitely as far as our
driver is concerned.
Add the new compatible string, but use the existing config section from
the previous SoC generation.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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The get_mclk_offset() function used the non-existent Kconfig symbol
CONFIG_MACH_SUN9I_A80 instead of CONFIG_MACH_SUN9I, causing the
MMC2 clock register to be written at 0x06000090 instead of
0x06000418. This corrupted the CMD2 response and made eMMC
completely unresponsive.
Also the legacy (SPL) sunxi_mmc_init() did not include CONFIG_MACH_SUN9I
in the 8-bit bus width condition, so MMC2 (eMMC) would only use
4-bit mode in the SPL, which is insufficient for reliable boot.
Tested on a Cubieboard4 A80: with both fixes, SPL loads U-Boot proper
and boots Debian 12 from eMMC with no SD card present.
Signed-off-by: Omar Ivan Fardjoume <[email protected]>
[Andre: fix mangled patch, trim commit message]
Signed-off-by: Andre Przywara <[email protected]>
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Add a driver model serial driver for Espressif ESP32 UART
controllers. The driver supports ESP32, ESP32-S3 and ESP32-S31 UART
register variants, including baud-rate setup, FIFO access and basic
port initialization.
Signed-off-by: Honbo He <[email protected]>
Changes in v3:
- Add debug UART for early print output
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https://git.u-boot-project.org/u-boot/custodians/u-boot-mediatek
Fixes:
* Fixed some wrong parents of VLP clocks on mt8189.
* Added a missing perficfg_ao clock in mt8188.
* Disabled watchdog by default on Genio 510/700.
* Fixed U-Boot DT overrides not included on Genio 510/700.
Cleanups/refactoring:
* Changed how clock parent providers are registered and looked
up for all MediaTek targets.
* Removed duplicate devicetree node in mt7623.
* Removed unused/non-standard DT properties in mt798{1,6,8}.
* Simplified MAINTAINERS by using N: instead of F: when possible.
* Replaced duplicate driver names in all MediaTek clock drivers.
* Cleaned up MediaTek power domain driver and split into separate
driver per compatible target.
* Removed unused power domain enablement from mt798{1,6,6a,7,8}.
Features:
* Added power domain driver for mt8188.
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https://git.u-boot-project.org/u-boot/custodians/u-boot-usb
- XHCI DWC3 bugfix
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A Rockchip NAND Flash Controller (NFC) supports multiple
flash devices. The SoC boot ROM only checks for NAND chip 0
and with reduced ECC strength. Currently only the read page
functions have this condition check added in the U-Boot
driver.
In single- and multi-chip nodes with rockchip,boot-blks and
rockchip,boot-ecc-strength set, the chips that aren't chip 0
will thus have an ECC mismatch when writing and reading.
Fix by adding the same condition to all read and write page
functions by dropping the existing 'selected_bank == 0' check
and use the NAND_IS_BOOT_MEDIUM option that was introduced to
U-Boot more recently than this driver to behave
identically to the Linux driver.
NAND_IS_BOOT_MEDIUM is automatically set when nand-is-boot-medium
property is set in the Device Tree, which is a requirement for
rockchip,boot-blks and rockchip,boot-ecc-strength and will thus
apply to all chips in single- and multi-chips nodes, regardless
of the CS.
Fixes: b12dc5d6fa76 ("mtd: nand: NFC drivers for RK3308, RK2928 and others")
Signed-off-by: Johan Jonker <[email protected]>
Tested-by: Hüseyin BIYIK <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
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When multiple Ethernet controllers are enabled in the device tree,
but only one controller is actually present in hardware, the
non-existent controller still attempts to connect to a PHY.
In this case, phy_connect() may return NULL without setting an
error code. The current driver only logs the failure but does not
propagate an error, causing the initialization flow to continue
with an invalid PHY handle.
This leads to failures later in the initialization sequence.
Fix this by explicitly setting ret = -ENODEV when phy_connect()
returns NULL, ensuring the driver exits cleanly on failure.
Signed-off-by: Boon Khai Ng <[email protected]>
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When device was created, it already has a name assigned. There is
no need to alloc space for name and set it with same device name.
Cleanup the code to avoid unnecessary device_set_name.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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When both CONFIG_PHY_ETHERNET_ID and CONFIG_DM_ETH_PHY are enabled,
eth_phy_binds_nodes() called from eth_post_bind() already binds the
ethernet PHY node to eth_phy_generic_drv. However, phy_connect_phy_id()
called via phy_connect() also binds the same PHY node, resulting in
duplicate entries in the DM tree.
Fix this by introducing phy_connect_dm_bound() which checks if the PHY
is already bound via uclass_find_device_by_phandle(). If so, it gets
the phy_device via phy_find_by_mask() since the udevice does not store
a phy_device pointer and the phy_device can only be obtained by
scanning the MDIO bus. The phydev->node is then set from the
already-bound DM device. This skips the generic binding methods
in phy_connect() when the PHY is already DM-bound.
Fixes: 68a4d1506109 ("net: phy: Bind ETH_PHY uclass driver to each new PHY")
Signed-off-by: Pranav Tilak <[email protected]>
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Add a wrapper to implement ext_read / write using phy_[read,write]_mmd.
Check if devad is the only supported extended MMD address on this PHY.
Signed-off-by: Markus Niebel <[email protected]>
Signed-off-by: Alexander Stein <[email protected]>
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The use of RK_GPIOn defines is deprecated in the upstream
rockchip.h file. Replace all them by the gpio number.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
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The use of RK_FUNC_n defines is deprecated in the upstream
rockchip.h file. Replace all them by the function number.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
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Pranav Tilak <[email protected]> says:
This series fixes several issues in the DW I3C master driver and
related infrastructure that prevented I3C read/write operations,
and enables I3C support for Versal Gen 2.
Link: https://lore.kernel.org/r/[email protected]
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i3c_master_add_i3c_dev_locked() incorrectly set master->this to the
newly discovered slave device, causing i3c_master_attach_i3c_dev()
to skip the attach_i3c_dev() callback. As a result the slave device
never got its master_priv (DAT slot index) allocated, free_pos was
never updated, and the DAT entry was never written.
Fix by removing the incorrect master->this assignment. Store the
slave descriptor directly in master->i3cdev[pos] inside
dw_i3c_master_attach_i3c_dev() where the DAT slot index is already
known. Also check the return value of i3c_master_add_i3c_dev_locked()
and skip num_i3cdevs increment on failure, fixing dummy devices shown
when no slaves are present on the bus.
Fixes: 1009c96f1590 ("drivers: i3c: Add driver for MIPI DWI3C")
Signed-off-by: Pranav Tilak <[email protected]>
Reviewed-by: Dinesh Maniyam <[email protected]>
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Treat -ENOENT and -ENOTSUPP from reset_get_bulk() as non-fatal to
support platforms where no resets are defined in the DTS. The resets
property is not yet documented in the DT binding.
Fixes: 1009c96f1590 ("drivers: i3c: Add driver for MIPI DWI3C")
Signed-off-by: Pranav Tilak <[email protected]>
Reviewed-by: Dinesh Maniyam <[email protected]>
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Add the power domain driver for the MediaTek MT8188 SoC. It describes
the SoC's power domains (MFG, display, camera, codec, ADSP, PCIe, ...)
as a table of mtk_scp_domain_data entries and reuses the shared scpsys
core through the power-controller probe, including the per-domain power
status offsets and the ordered infracfg bus-protection steps.
The domain tables and ordered bus-protection sequences mirror the
Linux mt8188-pm-domains.h data.
Signed-off-by: Chris-QJ Chen <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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The current driver handles a flat scpsys node with a single, fixed set
of power status registers and one infracfg bus-protection mask. Newer
MediaTek SoCs describe their domains as child nodes of a power
controller and need a richer model:
- per-domain power status register offsets (pwr_sta_offs /
pwr_sta2nd_offs), falling back to the legacy SPM_PWR_STATUS
registers when not set;
- an ordered list of bus-protection steps (scpsys_bus_prot_data /
BUS_PROT_WR), each with its own set/clear/status register, applied
on power-off and released in reverse on power-on;
- per-domain clocks and an optional parent power domain.
Add mtk_power_controller_probe(), which walks the controller's subnodes,
resolves each domain's id, clocks and infracfg, and builds the domain
tree. The existing flat probe (mtk_scpsys_probe) is left unchanged.
No functional change for the existing MT7623/MT7629 drivers.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Prepare for support of future MediaTek SoCs by renaming struct
mtk_scp_domain to struct mtk_scpsys.
Upcoming SoCs require additional per-domain runtime data obtained from
Device Tree. To keep the domain_data description in soc_data static
const, a new wrapper structure will be introduced to combine the
immutable domain_data description with the runtime data. The natural
name for that wrapper is struct mtk_scp_domain, so free that name by
renaming the existing runtime state structure to struct mtk_scpsys.
Update the MT7623 and MT7629 drivers accordingly.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Rename the flat, single-node probe to mtk_scpsys_probe so that the name
mtk_power_domain_probe can be reused for an upcoming nested
(power-controller) probe. Update the MT7623 and MT7629 drivers
accordingly.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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The per-SoC match data currently points directly at the array of
mtk_scp_domain_data. Wrap it in a new struct mtk_scp_soc_data that
carries the table pointer together with its size, and add a
MTK_SCP_SOC_DATA() helper that fills both from a single table definition
via ARRAY_SIZE().
The num_domains field is not used yet; it is added here so that upcoming
SoC support can validate the domain index coming from the device tree
against the size of the table.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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In order to prepare addition of future SoC, split the current driver
into common shared code and SoC specific drivers:
- mtk-power-domain.c now only holds the common register access and
power on/off/request/probe logic plus the shared power_domain_ops.
- mtk-power-domain.h exposes the register definitions, the mtk_scp_domain
data structures and the core helpers to the per-SoC drivers.
- mt7623-power-domain.c and mt7629-power-domain.c each hold their own
domain table and U_BOOT_DRIVER registration. The mt7629 driver also
matches the mt7622 compatible, preserving the previous behaviour.
Update the mt7622, mt7623 and mt7629 defconfigs to select the matching
per-SoC driver.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Make all scp_domain_data instances static const by removing the mutable
scpd member from struct scp_domain_data.
Refactor mtk_scpsys_domain_is_on() to take struct power_domain as
parameter instead of struct mtk_scp_domain_data and remove
mtk_scpsys_power_request(), which only existed to associate a struct
scp_domain with struct scp_domain_data.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Prefix internal functions, variables, and struct tags with the mtk_
prefix to avoid namespace collisions.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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The driver mapped each compatible to an enum scp_domain_type via the
match data, then used mtk_power_domain_hook() to switch on that enum
and select the per-SoC domain table. This forces every new SoC to add
an enum value and a switch case in shared code.
Store a pointer to the per-SoC table directly in the match data and
drop the enum, the type field, and mtk_power_domain_hook(). This keeps
per-SoC information in the match data where it belongs, making it
possible to later split the SoC-specific tables into standalone drivers.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Upstream DT bindings define "mediatek,mt7623-scpsys" to fall back to
"mediatek,mt2701-scpsys". Align the driver with this convention by
using MT2701 naming throughout.
This also allows the driver to use the upstream
dts/upstream/include/dt-bindings/power/mt2701-power.h header instead of
the local include/dt-bindings/power/mt7623-power.h, since both expose
equivalent power domain definitions.
Rename scp_domain_mt7623 to scp_domain_mt2701, replace SCPSYS_MT7623
enum by SCPSYS_MT2701, and switch all MT7623 power domain defines to
their MT2701 equivalents.
Note:
we intentionally keep the explicit "mediatek,mt7623-scpsys"
compatible entry to avoid breaking legacy boards
(mt7623a_unielec_u7623_02 and mt7623n_bpir2_defconfig) that didn't
switched yet to OF_UPSTREAM. Same for
include/dt-bindings/power/mt7623-power.h that is only used in these
boards.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Upstream DT bindings define "mediatek,mt7629-scpsys" to fall back to
"mediatek,mt7622-scpsys". Align the driver with this convention by
using MT7622 naming throughout.
This also allows the driver to use the upstream
dts/upstream/include/dt-bindings/power/mt7622-power.h header instead of
the local include/dt-bindings/power/mt7629-power.h, since both expose
equivalent power domain definitions.
Rename scp_domain_mt7629 to scp_domain_mt7622, remove the
SCPSYS_MT7629 enum, and switch all MT7629 power domain defines to their
MT7622 equivalents.
Also drop the explicit "mediatek,mt7629-scpsys" compatible entry and
rely on the DT fallback instead.
Suggested-by: David Lechner <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Sort the Makefile and Kconfig alphabetically.
No functional change.
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Change driver names for MediaTek mt8518 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.
Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-15-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <[email protected]>
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Change driver names for MediaTek mt8516 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.
Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-14-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <[email protected]>
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Change driver names for MediaTek mt8512 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.
Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-13-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <[email protected]>
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Change driver names for MediaTek mt8365 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.
Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-12-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <[email protected]>
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Change driver names for MediaTek mt8195 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.
Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-11-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <[email protected]>
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