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There's no dev to log with, so pass the device along with the priv data.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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netdev_xxx evaluates to printf in U-Boot, so there is no extra info
printed. mvpp2 one of only two drivers which use these functions in U-Boot.
Convert these functions to dev_xxx where possible (and to log_xxx where
not).
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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Remove some prefixes, or get the device from the phy.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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netdev_xxx evaluates to printf in U-Boot, so there is no extra info
printed. mvneta is one of two drivers which use these functions in U-Boot.
Convert these functions to dev_xxx where possible (and to log_xxx where
not).
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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No need for indirection here.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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Remove the pdev indirection.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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This member was presumably dropped when this driver was converted from
Linux. However, it is still used in log statements during initialization.
This patch adds the member back. In addition, allocation of struct
vf610_nfc has been moved to the callers of vf610_nfc_nand_init. This allows
it to be allocated by DM (if it is being used) and for dev to be
initialized.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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There are too many levels of indirection when calling dev_err. This is an
artifact of the conversion of brcmnand_host.pdev from a struct
platform_device (which has a member `dev` pointing to a struct device) to
struct udevice.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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Use mtd_info to get a device to log with.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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dev needs to be gotten from mbox_chan
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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This adds a udevice parameter to get_best_delay and msdc_set_mclk so they
can call dev_err properly.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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dev needs to be qualified as a member of host.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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Get it from spinand->slave->dev. Another option would be to use
spinand_to_mtd(spinand)->dev, but this is what the existing code uses.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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This fixes dev_xxx() not always being called with a device. In
spi_nor_reg_read, a the slave device may not always be available, so we use
bus and cs instead.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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This header is needed so struct udevice can be used in dev_xxx().
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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Usually the device is gotten from sunxi_nfc. This is a struct device and
not a struct udevice, but the whole driver seems to be written wihout DM
anyway...
In a few instances, this patch modifies functions to take an nfc to log
with. In once instance we use mtd_info's device since there is no nfc.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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Use the device from any mtd already available, or from the active mtd via
pxa3xx_nand_info if one is not.
Signed-off-by: Sean Anderson <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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The udevice we are working with is called `bus` and not `dev`.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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This converts calls to dev_err to get the device from ti_sci_info where
appropriate.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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We can't use dev_dbg here because we haven't bound to the device yet. Use
log_debug instead.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
Tested-by: Patrick Delaunay <[email protected]>
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Another "virtual" clock (in the sense that it isn't configurable). This
could possibly be done as a clock in the device tree, but I think this is a
bit cleaner.
Signed-off-by: Sean Anderson <[email protected]>
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To test this function, sandbox CPU must set cpu_platdata.timebase_freq on
bind. It also needs to expose a method to set the current cpu. I also make
some most members of cpu_sandbox_ops static.
On the timer side, the device tree property
sandbox,timebase-frequency-fallback controls whether sandbox_timer_probe
falls back to time_timebase_fallback or to SANDBOX_TIMER_RATE.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This function is designed to be used when a timer used to be initialized by
the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
such a case, the timer may prefer to use the clocks and clock-frequency
properties, but should be able to fall back on using the cpu's
timebase-frequency.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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The riscv-timer driver currently serves as a shim for several riscv timer
drivers. This is not too desirable because it bypasses the usual timer
selection via the driver model. There is no easy way to specify an
alternate timing driver, or have the tick rate depend on the cpu's
configured frequency. The timer drivers also do not have device structs,
and so have to rely on storing parameters in gd_t. Lastly, there is no
initialization call, so driver init is done in the same function which
reads the time. This can result in confusing error messages. To a user, it
looks like the driver failed when trying to read the time, whereas it may
have failed while initializing.
This patch removes the shim functionality from the riscv-timer driver, and
has it instead implement the former rdtime.c timer driver. This is because
existing u-boot users who pass in a device tree (e.g. qemu) do not create a
timer device for S-mode u-boot. The existing behavior of creating the
riscv-timer device in the riscv cpu driver must be kept. The actual reading
of the CSRs has been redone in the style of Linux's get_cycles64.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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The usage of regmap API in the SiFive RAM driver is not correct.
The reg address should be obtained via dev_read_addr_index() API.
Signed-off-by: Bin Meng <[email protected]>
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The return value should be checked otherwise it's useless to
assign the return value to 'ret'.
Signed-off-by: Bin Meng <[email protected]>
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%s/Normlly/Normally/
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Fix a typo
%s/interract/interact/
Use Samsung's capitalization of their trademarks
%s/onenand/OneNAND/
%s/Hyperflash/HyperFlash/
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
[trini: Add other Hyperflash cases as noted by Stefan]
Signed-off-by: Tom Rini <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix RNG driver probe & linux EFI KASLR boot on GXL, GXM, G12A, G12B & SM1 based boards
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Add support for Microchip PIT64B timer. The timer is 64 bit length and
is used as a free running counter (in continuous mode with highest values
for period registers). The clock feeding the timer would be no more
than 12.5MHz.
Signed-off-by: Claudiu Beznea <[email protected]>
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This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1
based boards dues to the lack of the core clock in the device tree.
It was reported breaking EFI boot in the Linux EFI stub, because the
EFI_RNG_PROTOCOL didn't check for the RNG device presence before
installing itself.
The Linux amlogic,meson-rng.yaml doesn't mandate the core clock,
this the clock should be ignores if not present.
Nevertheless, the clock should be present and this should be fixed
on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced
with U-Boot.
The change has been tested on a Khadas VIM3, which uses the common
meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's
report, along with the RNG cmd.
Cc: Heinrich Schuchardt <[email protected]>
Reported-by: Scott K Logan <[email protected]>
Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver")
Signed-off-by: Neil Armstrong <[email protected]>
Tested-by: Scott K Logan <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
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The micrel phy driver is already configuring this values from
device tree. So remove the redundant phy configuration call from
this driver.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
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R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same
for PINCTRL_PFC_R8A774A1 help description
Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing
number of the SoC.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
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- Bug fixes related to PCIe, pfe, xfi, gpio, reset, vid, env, and usb on
layerscape products
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into next
- Enhance the 'zboot' command to be more like 'bootm' with sub-commands
- The last series of ACPI core changes for programmatic generation of
ACPI tables
- Add all required ACPI tables for ApolloLake and enable ACPIGEN on
Chromebook Coral
- A feature minor enhancements to the 'hob' command
- Intel edison: Support for writing an xFSTK image via binman
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Call mmc_of_parse at probe time to fetch all the host properties
from the DT.
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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The second clock of the IP block (the generic clock), must be explicitly
enabled.
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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clk_set_rate will return rate in case of success and zero in case of
error, however it can also return -ev, but it's an ulong function.
To avoid any issues, disregard the return value of this call.
In case this call actually fails, nothing much we can do anyway, but we
can at least try with the previous values (or DT assigned-clocks)
Signed-off-by: Eugen Hristev <[email protected]>
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Add new compatibility string for matching sama7g5 product.
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Add new compatible to microchip,sama7g5 new SoC.
Signed-off-by: Eugen Hristev <[email protected]>
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Generate ACPI information for this device so that Linux can use it
correctly.
Signed-off-by: Simon Glass <[email protected]>
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Add various tables that are common to Intel CPUs. These functions can be
used by arch-specific CPU code.
Signed-off-by: Simon Glass <[email protected]>
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Many I2C devices produce roughly the same ACPI data with just things like
the GPIO/interrupt information being different.
This can be handled by a generic driver along with some information in the
device tree.
Add a generic i2c driver for this purpose.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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This function currently accepts the IRQ-polarity type. Fix it to use the
GPIO type instead.
Signed-off-by: Simon Glass <[email protected]>
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LX2160A rev2 uses different PCIe controller, so EP mode DT
nodes also need to be fixed up.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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CONFIG_DM_SPI_FLASH is only supported now with passing of driver
conversion deadline from non-DM to DM model. Hence, it's safe to remove
non-DM code check from pfe_spi_flash_init.
Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of
reading reading values from DT.
Signed-off-by: Kuldeep Singh <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Fix Coverity issue: RESOURCE_LEAK.
leaked_storage: Variable addr going out of scope leaks the storage it
points to.
Fixes: e0152dbed683 ("net: pfe_eth: Use spi_flash_read API to access
flash memory")
Signed-off-by: Kuldeep Singh <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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All the 10G ports that were working in XFI mode were described as
using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time).
Add the minimal changes required for the FMan code to support XFI.
Signed-off-by: Madalin Bucur <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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PFE DDR addresses are now stored on to a stack varaiable rather
dynamic allocation.
Signed-off-by: Chaitanya Sakinam <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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correction in delay implementation before we exit out of tx timeout.
Signed-off-by: Chaitanya Sakinam <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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