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2020-07-01clk: Check that ops of composite clock components exist before callingSean Anderson
clk_composite_ops was shared between all devices in the composite clock driver. If one clock had a feature (such as supporting set_parent) which another clock did not, it could call a null pointer dereference. This patch does three things 1. It adds null-pointer checks to all composite clock functions. 2. It makes clk_composite_ops const and sets its functions at compile-time. 3. It adds some basic sanity checks to num_parents. The combined effect of these changes is that any of mux, rate, or gate can be NULL, and composite clocks will still function normally. Previously, at least mux had to exist, since clk_composite_get_parent was used to determine the parent for clk_register. Signed-off-by: Sean Anderson <[email protected]> Acked-by: Lukasz Majewski <[email protected]>
2020-07-01clk: Always use the supplied struct clkSean Anderson
CCF clocks should always use the struct clock passed to their methods for extracting the driver-specific clock information struct. Previously, many functions would use the clk->dev->priv if the device was bound. This could cause problems with composite clocks. The individual clocks in a composite clock did not have the ->dev field filled in. This was fine, because the device-specific clock information would be used. However, since there was no ->dev, there was no way to get the parent clock. This caused the recalc_rate method of the CCF divider clock to fail. One option would be to use the clk->priv field to get the composite clock and from there get the appropriate parent device. However, this would tie the implementation to the composite clock. In general, different devices should not rely on the contents of ->priv from another device. The simple solution to this problem is to just always use the supplied struct clock. The composite clock now fills in the ->dev pointer of its child clocks. This allows child clocks to make calls like clk_get_parent() without issue. imx avoided the above problem by using a custom get_rate function with composite clocks. Signed-off-by: Sean Anderson <[email protected]> Acked-by: Lukasz Majewski <[email protected]>
2020-06-30Merge tag 'mips-pull-2020-06-29' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mips into next - net: pcnet: cleanup and add DM support - Makefile: add rule to build an endian-swapped U-Boot image used by MIPS Malta EL variants - CI: add Qemu tests for MIPS Malta
2020-06-30arm: pxa: mmc: add driver model supportMarcel Ziswiler
Add driver model (DM) support. Signed-off-by: Marcel Ziswiler <[email protected]>
2020-06-30kconfig: mmc: move pxa_mmc_generic to kconfigMarcel Ziswiler
Move CONFIG_PXA_MMC_GENERIC to Kconfig. Signed-off-by: Marcel Ziswiler <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2020-06-30dm: core: gracefully handle alias seq without ofMarcel Ziswiler
Gracefully handle alias seq in the platform data rather than OF case. Signed-off-by: Marcel Ziswiler <[email protected]>
2020-06-30mmc: add missing space before comment delimiterMarcel Ziswiler
Add missing space before a comment delimiter. Signed-off-by: Marcel Ziswiler <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Igor Opaniuk <[email protected]>
2020-06-29net: pcnet: Add Kconfig entriesMarek Vasut
Add Kconfig entries for the pcnet driver and convert MIPS malta to use those. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Add DM supportMarek Vasut
With all the changes in place, add support for DM into the pcnet driver. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Split common and non-DM functionsMarek Vasut
Pull the common parts of functions out so they can be reused by both DM and non-DM code paths. The recv() function had to be reworked to fit into this scheme and this means it now only receives one packet at a time instead of spinning in an endless loop. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Wrap name and enetaddr into private dataMarek Vasut
Instead of using the non-DM-only name and enetaddr in struct eth_device, add pointers into the private data which can either point to that non-DM name or a DM one later on. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Wrap iobase into private dataMarek Vasut
Instead of using the non-DM-only iobase in struct eth_device, add one into the private data to make DM and non-DM operation possible. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Pass private data through dev->privMarek Vasut
Get rid of the global point to private data, and rather pass it thought dev->priv. Also remove the unnecessary check for lp being non-NULL, since it is always NULL at this point. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Wrap devbusfn into private dataMarek Vasut
Instead of using eth_device priv for this PCI devbusfn, free it so it could be used for driver private data, and wrap devbusfn into those driver private data. Note that using the name dev for the variable is a trick left for later, when DM support is in place, so dm_pci_virt_to_mem() can be used with minimal ifdeffery. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Drop useless forward declarationsMarek Vasut
Remove those as they are not needed anymore. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Move initialize function at the endMarek Vasut
Move the function at the end of the driver, so we could drop various forward declarations later. No functional change. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Move private data allocation to initializeMarek Vasut
The private data allocation does not have to be done every time the NIC is initialized at run time, move the allocation to initialize function, which means it will be done only once when the driver starts. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Replace memset+malloc with callocMarek Vasut
This combination of functions can be replaced with calloc(), make it so. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Simplify private data allocationMarek Vasut
The current code is horribly complex. Both the RX and TX buffer descriptors are 16 bytes in size, the init block is 32 bytes in size, so simplify the code such that the entire private data of the driver are allocated cache aligned and the RX and TX buffer descriptors are part of the private data. This removes multiple malloc calls and cache flushes. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Use PCI_DEVICE() to define PCI device compat listMarek Vasut
Use this macro to fully fill the PCI device ID table. This is mandatory for the DM PCI support, which checks all the fields. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Drop PCNET_HAS_PROMMarek Vasut
All of one PCNET users has this option set, make this default and drop this config option. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29net: pcnet: Drop typedef struct pcnet_priv_tMarek Vasut
Use struct pcnet_priv all over the place instead. Signed-off-by: Marek Vasut <[email protected]> Cc: Daniel Schwierzeck <[email protected]> Cc: Joe Hershberger <[email protected]>
2020-06-29Convert CONFIG_CADENCE_QSPI to KconfigTom Rini
This converts the following to Kconfig: CONFIG_CADENCE_QSPI Signed-off-by: Tom Rini <[email protected]>
2020-06-29spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI*Lukasz Majewski
This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <[email protected]> Tested-by: Adam Ford <[email protected]> #da850-evm Signed-off-by: Hou Zhiqiang <[email protected]> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <[email protected]>
2020-06-29video: rockchip: fix HDMI 4K resolutionAnatolij Gustschin
3480 is not valid XRES, use 3840 as default. Fixes: 05c65a82c3c1 ("video: rockchip: Support 4K resolution for rk3399, HDMI") Signed-off-by: Anatolij Gustschin <[email protected]> Cc: Jagan Teki <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]> # roc-rk3399-pc
2020-06-28Merge tag 'fixes-for-v2020.07' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix logo on mx6ul_14x14_evk with DM_VIDEO enabled - fix banner string overwriting the logo on small displays - fix splash warning when building for ARM64 - fix STM32 DSI driver to probe only on supported hardware - fix memory corruption with DSI panel drivers
2020-06-28rockchip: correctly set vop0 or vop1Patrick Wildt
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or vop1, but so far we have set it in both conditions, which is not correct. Can someone verify this is the correct way round? vop1 -> set, vop0 -> clear? Signed-off-by: Patrick Wildt <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2020-06-28video: orisetech_otm8009a: fill characteristics of DSI data linkYannick Fertre
Fill characteristics of DSI data link to platform data instead of mipi device to avoid memory corruption. Signed-off-by: Yannick Fertre <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
2020-06-28video: raydium_rm68200: fill characteristics of DSI data linkYannick Fertre
Fill characteristics of DSI data link to platform data instead of mipi device to avoid memory corruption. Signed-off-by: Yannick Fertre <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
2020-06-28video: stm32: stm32_dsi: copy DSI fieldsYannick Fertre
Copy the DSI data link characteristics from panel platform data to mipi DSI device. Signed-off-by: Yannick Fertre <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
2020-06-28video: check hardware version of DSIYannick Fertre
Check the hardware version of DSI. Versions 1.30 & 1.31 are only supported. Signed-off-by: Yannick Fertre <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]> Reviewed-by: Philippe Cornu <[email protected]>
2020-06-28video: vidconsole: avoid multiple lines overwrite logoYe Li
Fix the bug that multiple lines wraps to overwrite logo bmp display. Signed-off-by: Ye Li <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]> # bpi-m1+, bpi-m64
2020-06-28video: bmp: support 8bits BMP drawing on 24/32 bpp framebufferYe Li
Update video bmp code so that we can display 8 bits logo on 24 or 32 bpp framebuffer. Signed-off-by: Ye Li <[email protected]> Signed-off-by: Anatolij Gustschin <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]> # bpi-m1+, bpi-m64
2020-06-27rockchip: clk: rk3188: change APLL to safe 600MHzAlexander Kochetkov
The commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver") changed ARM clock from 600MHz to 1600MHz. It made boot unstable due to the fact that PMIC at the start generates insufficient voltage for operation. See also: commit f4f57c58b589 ("rockchip: rk3188: Setup the armclk in spl"). Fixes commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver"). Signed-off-by: Alexander Kochetkov <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2020-06-26Convert CONFIG_ATMEL_HLCD to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ATMEL_HLCD Signed-off-by: Tom Rini <[email protected]>
2020-06-26Convert CONFIG_AT91_GPIO to KconfigTom Rini
This converts the following to Kconfig: CONFIG_AT91_GPIO Signed-off-by: Tom Rini <[email protected]>
2020-06-26Convert CONFIG_ARM_PL180_MMCI to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ARM_PL180_MMCI Signed-off-by: Tom Rini <[email protected]>
2020-06-26Convert CONFIG_AM335X_LCD to KconfigTom Rini
This converts the following to Kconfig: CONFIG_AM335X_LCD Signed-off-by: Tom Rini <[email protected]>
2020-06-25bdinfo: dm: Update fb_base when using driver modelSimon Glass
Update this value with the address of a video device so that it shows with the 'bd' command. It would be better to obtain the address from the uclass by looking in struct video_uc_platdata for each device. We can move over to that once DM_VIDEO migration is complete. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2020-06-25Merge tag 'xilinx-for-v2020.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.10 Versal: - xspi bootmode fix - Removing one clock from clk driver - Align u-boot memory setting with OS by default - Map TCM and OCM by default ZynqMP: - Minor DT improvements - Reduce console buffer for mini configurations - Add fix for AMS - Add support for XDP platform Zynq: - Support for AES engine - Enable bigger memory test by default - Extend documentation for SD preparation - Use different freq for Topic miami board mmc: - minor GD pointer removal net: - Support fixed-link cases by zynq gem - Fix phy looking loop in axi enet driver spi: - Cleanup global macros for xilinx spi drivers firmware: - Add support for pmufw reloading fpga: - Improve error status reporting common: - Remove 4kB addition space for FDT allocation
2020-06-24Merge tag 'mmc-2020-6-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- Fix fsl_esdhc_imx tunning mask - Disable CMD CRC for normal tuning for fsl_esdhc_imx - Retry CM1 until emmc ready - Fix sdhci HISPD handling - Cache-aligned extcsd reading
2020-06-24net: xilinx: axi_emac: Fix endless loop when no PHYs are connectedPatrick van Gelder
The index used to iterate over the possible PHYs in axiemac_phy_init was an unsigned int and decremented. Therefor it was always >= 0 and never exited the loop. Signed-off-by: Patrick van Gelder <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24arm64: xilinx: Print fpga error value in hexT Karthik Reddy
Fpga returns error value when fails, error status should be printed in hex format. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24spi: zynq_[q]spi: Convert config's to macro'sAshok Reddy Soma
Remove below config options and convert them to macros. They have never been configured to different values than default one. And also it makes sense to reduce the config_whitelist. CONFIG_SYS_ZYNQ_SPI_WAIT CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_XILINX_SPI_IDLE_VAL Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24net: gem: Disable PCS autonegotiation in case of fixed-linkMichal Simek
Disable PCS autonegotiation if fixed-link node is present in device tree. This way systems with multiple GEM instances with a combination of SGMII-fixed and SGMII-PHY will work. Reported-by: Goran Marinkovic <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24fpga: zynqpl: Flush dcache only for non-bitstream dataT Karthik Reddy
In case of aes decryption destination address range must be flushed before transferring decrypted data to destination. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24fpga: zynqpl: Check if aes engine is enabledIbai Erkiaga
AES engine cannot be used if has not been enabled at boot time with an encrypted boot image. Signed-off-by: Ibai Erkiaga <[email protected]> Acked-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24fpga: zynqpl: Check fpga config completionT Karthik Reddy
This patch checks fpga config completion when a bitstream is loaded into PL. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24fpga: zynqpl: Correct PL bitstream loading sequence for zynqaesSiva Durga Prasad Paladugu
Correct the PL bitstream loading sequence for zynqaes command by clearing the loaded PL bitstream before loading the new encrypted bitstream using the zynq aes command. This was done by setting the PROG_B same as in case of fpgaload commands. This patch fixes the issue of loading the encrypted PL bitstream onto the PL in which a bitstream has already been loaded successfully. Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-06-24firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()Michal Simek
There is no need to panic all the time when pmufw config object loading failed. The patch improves function logic to report permission deny case and also panic only for SPL case. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Luca Ceresoli <[email protected]>