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Group these #defines into an enum to make it easier to understand the
relationship between them.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jun Chen <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Some SoCs support a higher speed than what is currently called 'max' in
this driver. Rename it to 'high' speed, which is the official name of the
3.4MHz speed.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jun Chen <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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We use struct clk here so really should include this header file to avoid
build errors. Also switch the order of clk.h in the C file to match the
required code style.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ley Foon Tan <[email protected]>
Reviewed-by: Jun Chen <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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If a different input clock is required then the correct way to do this is
with a clock driver. Don't allow boards to override IC_CLK.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Some versions of this peripherals provide more control of the bus
behaviour. Add definitions for these registers.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ley Foon Tan <[email protected]>
Reviewed-by: Jun Chen <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Guard 'parent_rate==0' to prevent 'divide by zero' issue in
clk_pplv3_av_set_rate(). If it is 0, let's return with -EINVAL.
Signed-off-by: Giulio Benetti <[email protected]>
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Guard 'mfd==0' to prevent 'divide by zero' issue in
clk_pplv3_av_get_rate(). If it is 0, let's return with EIO since mfd
should never be 0 at all.
Signed-off-by: Giulio Benetti <[email protected]>
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Guard 'parent_rate==0' to prevent 'divide by zero' issue in
clk_pplv3_sys_get_rate(). If it is 0, let's return with -EINVAL.
Signed-off-by: Giulio Benetti <[email protected]>
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m68k needs block cache list initialized after relocation.
Other architectures must not be involved.
Fixing regression related to:
commit 1526bcce0f7285087621e16e6720636d01839da8
("common: add blkcache init")
Signed-off-by: Angelo Durgehello <[email protected]>
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This function parameter usage of load_addr was incorrectly caught in
the clarifying renames of commit bb872dd930cc, which results in boot
failures on Marvell A38x.
Signed-off-by: Joel Johnson <[email protected]>
Patch-to: Simon Glass <[email protected]>
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- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai)
- Allwinner R40 Ethernet, usb phy enablement (Andre Przywara)
- Sunxi auto load from 128KB MMC offset (Andre Przywara)
- Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
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dev_read_addr_ptr returns NULL on error, not FDT_ADDR_T_NONE.
Signed-off-by: Sean Anderson <[email protected]>
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is enabled
clk_get_by_name() requires clk_get_by_id() that is not available if
CONFIG_OF_PLATDATA is defined, so move clk_get_by_name() into #else
condition of #if CONFIG_IS_ENABLED(OF_PLATDATA).
Signed-off-by: Giulio Benetti <[email protected]>
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It will ease debug when uclass_get_device_by_name failed with
more error info printed out.
Signed-off-by: Peng Fan <[email protected]>
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mtk_clk_find_parent_rate is calling clk_get_rate to know the rate
of a parent clock. clk_get_rate returns a ulong, while
mtk_clk_find_parent_rate returns an int. This implicit cast creates
an issue for clock rates big enough to need the full 32 bits to
store its data. When that happen the clk rate will become incorrect
because of the implicit cast between ulong -> int -> ulong.
This commit change the return type of mtk_clk_find_parent_rate to
ulong.
Signed-off-by: Fabien Parent <[email protected]>
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Updates and fixes for ls1028a, lx2160a, ls1012a, ls1021a, ls2080a,
ls1088a platforms:
- lx2-rev2 pcie support, enetc related updates, layerscape-pcie fixes
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On m68k, block_cache list is relocated, but next and prev list
pointers are not adjusted to the relocated struct list_head address,
so the first iteration over the block_cache list hangs.
This patch initializes the block_cache list after relocation.
Signed-off-by: Angelo Durgehello <[email protected]>
Reviewed-by: Eric Nelson <[email protected]>
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Now that arch specific dma mapping APIs take care of cache
flush/invalidate, drop local cache flush operation.
While at that fix dma_unmap_single() call to match new prototype
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: Vignesh Raghavendra <[email protected]>
Acked-by: Masahiro Yamada <[email protected]>
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Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: Vignesh Raghavendra <[email protected]>
Acked-by: Masahiro Yamada <[email protected]>
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This patch includes the following:
1. Add fastboot command to erase the whole EMMC_USER
2. Add fastboot command to flash image at EMMC_BOOT1
3. Add fastboot command to erase the whole EMMC_BOOT1
4. Enale CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT for mt8518
Signed-off-by: mingming lee <[email protected]>
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Using musb-new structure for mt85xx gadget driver.
Add gadget driver dts for mt8518 SoCs.
Signed-off-by: mingming lee <[email protected]>
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Function mod_exp_sw() is only used via the operators of the uclass.
It is not defined in any include.
Make mod_exp_sw() static.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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drivers/rng/sandbox_rng.c requires rand() to be defined but configuration
option CONFIG_CONFIG_LIB_RAND selected in drivers/rng/Kconfig does not
exist.
test/lib/test_aes.c requires rand() to be defined.
Fix the selection criteria for choice "Pseudo-random library support type".
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Since every Allwinner USB PHY seems to be slightly different from each
other, we need to add the compatible string and the respective data
structure to make it work on the R40/V40 SoC.
Nothing spectacular this time, just one less USB controller than the H3.
Copied from the Linux kernel.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.
Signed-off-by: Simon Glass <[email protected]>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <[email protected]>
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These functions relate to memory init so move them into the init
header.
Signed-off-by: Simon Glass <[email protected]>
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This function has a very generic name which does not adequately describe
its purpose. Rename it and move it to image.h, since it relates to reading
a script from an image.
Signed-off-by: Simon Glass <[email protected]>
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These three globals relate to image handling. Move them to the image
header file.
Signed-off-by: Simon Glass <[email protected]>
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These global variables are quite short and generic. In fact the same name
is more often used locally for struct members and function arguments.
Add a image_ prefix to make them easier to distinguish.
Signed-off-by: Simon Glass <[email protected]>
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Move this function out of common.h and into a relevant header file.
Signed-off-by: Simon Glass <[email protected]>
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This function related to timer and most of the timer functions are in
time.h, so move this function there.
Signed-off-by: Simon Glass <[email protected]>
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These three clock functions don't use driver model and should be migrated.
In the meantime, create a new file to hold them.
Signed-off-by: Simon Glass <[email protected]>
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This is an init-related function so belongs in that file. Move it.
Signed-off-by: Simon Glass <[email protected]>
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This seems pretty old now. It has not been converted to driver model and
is not used by any boards.
Drop it.
Signed-off-by: Simon Glass <[email protected]>
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If baud_divisor is not set (i.e. == -1), we should use the baud divisor
already in use for flushing the xmit register. If we don't flush the
xmit register, then SPL will hang.
Signed-off-by: Patrik Dahlström <[email protected]>
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Fix an issue where some sections are never loaded : if p_type is
different from PT_LOAD the phdr pointer must be incremented.
Signed-off-by: Fabien Dessenne <[email protected]>
Acked-by: Suman Anna <[email protected]>
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Separate MAC and serdes configuration, MAC configuration must be applied
at each enetc_start() as FLR clears it.
This restores traffic for ENETC interfaces in USXGMII mode.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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lx2160a rev1 requires layerscape_gen4 device tree fixup and
lx2160a rev2 requires layerscape device tree fixup.
Add device tree fixup for lx2160a based on SoC and Version.
Signed-off-by: Wasim Khan <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Move streamId allocation to layerscape common device tree fixup.
Calculate streamId based on SoC variant.
Signed-off-by: Wasim Khan <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Add Common device tree fixup for NXP SoCs. Based on
SoC and revision call pcie_layerscape or pcie_layerscape_gen4
fixup.
Signed-off-by: Wasim Khan <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The LS1028A SoC is special in the handling of the MAC addresses. We need
to write to the IERB version of the PSIPMAR0/1 register. This value will
be sampled into the corresponding port PSIPMAR0/1 register if the PCI
memory access is enabled.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Intead of setting the MAC address in enetc_start() use the proper
write_hwaddr(). U-Boot takes care of the random MAC address, too.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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There is not any difference for disabling BARs in RC mode
between PCIe controllers with and without SRIOV.
Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM")
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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The software will still get non-zero Expansion ROM BAR size
even when the BAR_EN bit is cleared. The BAR_EN bit of
register EXP_ROM_BAR_MASK_RC is not working as expected,
so this patch changes to mask all the bits.
Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM")
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Passes on the primary address used by u-boot to Linux. The code does a DT
fix-up for ENETC PFs and sets the primary MAC address in IERB. The address
in IERB is restored on ENETC PCI functions at FLR.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Vladimir Oltean <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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This IP is also used on some arm SoC, so we allow to
use it on arm bcm68360 too.
Signed-off-by: Philippe Reynes <[email protected]>
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This IP is also used on some arm SoC, so we allow to
use it on arm bcm68360 too.
Signed-off-by: Philippe Reynes <[email protected]>
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This adds the nand support for chipset bcm68360.
Signed-off-by: Philippe Reynes <[email protected]>
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This IP is also used on some arm SoC, so we allow to
use it on arm bcm68360 too.
Signed-off-by: Philippe Reynes <[email protected]>
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