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mt25qu512a is rebranded after its spinoff from STM, so it is
different only in term of extended jedec ID, initial JEDEC id
is same as that of n25q512a.In order to avoid any confussion
with respect to name new entry is added.
This flash is tested for Single I/O mode on LS1046FRWY although
it also support QUAD I/O.
Signed-off-by: Ashish Kumar <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch adds SiFive SPI driver. The driver is 100% DM driver
and it determines input clock using clk framework.
The SiFive SPI block is found on SiFive FU540 SOC and is used to
access flash and MMC devices on SiFive Unleashed board.
This driver implementation is inspired from the Linux SiFive SPI
driver available in Linux-5.2 or higher and SiFive FSBL sources.
Signed-off-by: Bhargav Shah <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Most DM based SPI host controller drivers use SPI_XFER_BEGIN and
SPI_XFER_END flags to enable/disable slave chip select.
This patch extends MMC SPI driver to pass SPI_XFER_BEGIN flag when
MMC command is send at start and pass SPI_XFER_END flag using a
dummy transfer (of bitlen = 0) at the end of MMC command.
Suggested-by: Jagan Teki <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Sagar Kadam <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Use readl_poll_timeout instead of explicit calculation
Signed-off-by: Thomas Schaefer <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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During QSPI reads, current is_controller_busy function sporadically
fails with -ETIMEDOUT due to fixed number of 5 test loops. Using
timer functions to wait 1000 us instead will fix this.
Signed-off-by: Thomas Schaefer <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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When slave drivers don't set the max_read_size, the spi-mem should directly
use data.nbytes and not limit to any size. But current logic will limit to
the max_write_size.
Signed-off-by: Ye Li <[email protected]>
Acked-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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K3 devices have I2C IP that is same as OMAP2+ family. Allow driver to be
compiled for ARCH_K3.
Signed-off-by: Vignesh R <[email protected]>
Signed-off-by: Andreas Dannenberg <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Lokesh Vutla <[email protected]>
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We would like to use the driver even without power domains being
specified for cases such as during early boot when the required power
domains have already gotten enabled by the SoC's boot ROM and such
explicit initialization is not needed and possible.
Signed-off-by: Andreas Dannenberg <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.
Also create a common API to set UHS timings in HOST_CONTROL2.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add support in the driver for handling phy specific registers.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Make set_ios_post() return int to faciliate error handling in
platform drivers.
Signed-off-by: Faiz Abbas <[email protected]>
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The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.
Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add Support for masking some bits in the capabilities
register of a host controller.
Also remove the redundant readl() into caps1.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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In device nodes with more than one entry in the reg property,
it is sometimes useful to regmap only of the entries. Add an
API regmap_init_mem_index() to facilitate this.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The host controller works perfectly well without having to add any
quirks. Remove them.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel. This also syncs the main_pmx0 node
as a side effect.
Also change the name of the driver to match the compatible in kernel.
Signed-off-by: Faiz Abbas <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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- Beelink-x2 STB support (Marcus)
- H6 DDR3, LPDDR3 changes (Andre, Jernej)
- H6 pin controller, USB PHY (Andre)
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The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),
which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.
Signed-off-by: Andre Przywara <[email protected]>
Tested-by: Corentin Labbe <[email protected]> # Pine-H64
Reviewed-by: Jagan Teki <[email protected]>
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To enable USB support in U-Boot, add the required clock and reset gates
to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will
pick them up from there automatically.
Signed-off-by: Andre Przywara <[email protected]>
Tested-by: Corentin Labbe <[email protected]> # Pine-H64
Reviewed-by: Jagan Teki <[email protected]>
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The Allwinner H6 pin controller is not really special, at least not when
it comes to normal GPIO operation.
Add the H6 compatible strings to the list of recognised strings, to make
GPIOs work for H6 boards.
Signed-off-by: Andre Przywara <[email protected]>
Tested-by: Corentin Labbe <[email protected]> # Pine-H64
Reviewed-by: Jagan Teki <[email protected]>
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Probably for no particular reason SUNXI_GPIO was still defined the "old
way", in header files only.
Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove
another line from our dreadful config_whitelist.txt.
Signed-off-by: Andre Przywara <[email protected]>
Tested-by: Corentin Labbe <[email protected]> # Pine-H64
Reviewed-by: Jagan Teki <[email protected]>
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Macb can be used with Xilinx PCS/PMA PHY in fpga which is a 1000-baseX
phy(lpa 0x41e0). This patch adds checks for LPA_1000XFULL and
LPA_1000XHALF bits.
Signed-off-by: Radu Pirea <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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If macb is gem and is gigabit capable, lpa value is not read from
the right register(MII_LPA) and is read from MII_STAT1000. This patch
fixes reading of the lpa value.
Signed-off-by: Radu Pirea <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports and provides Ethernet packet communication for the
device and can be configured as an Ethernet switch. CPSW NUSS features: the
Reduced Gigabit Media Independent Interface (RGMII), Reduced Media
Independent Interface (RMII), and the Management Data Input/Output (MDIO)
interface for physical layer device (PHY) management. The TI AM65x SoC has
integrated two-port Gigabit Ethernet Switch subsystem into device MCU
domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII
and RMII interfaces and an internal Communications Port Programming
Interface (CPPI) port (Host port 0).
Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX
channels and on RX channels operating by TI am654 NAVSS Unified DMA
Peripheral Root Complex (UDMA-P) controller.
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Keerthy <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Use phys_addr_t for mdio_base address to avoid build
warnings on arm64 and dra7. Cast it to uintprt_t before
assigning to regs.
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Keerthy <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This patch is to use block layer to read from mmc in cortina
Signed-off-by: Yinbo Zhu <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Because all MSCC SoC use the same MDIO bus, put the implementation in
one common file(mscc_miim) and make all the other MSCC network drivers to
use these functions.
Signed-off-by: Horatiu Vultur <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
stand-alone devices. Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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When serdes configuration was written in hardware there was a delay
of 100ms to be sure that configuration was written. But the delay is not
needed because already the function serdes_write it is checking that the
operation finished.
Therefore remove the mdelay. This improves the speed of configuring the
network driver.
Signed-off-by: Horatiu Vultur <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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The code block reading the DT property for the clock output control was
before the phy's DT node pointer was set, so it could never work. Move
it after the node pointer is set.
Also store the unsigned 32-bit property into an unsigned value, not a
signed value, as the former will cause a problem if value overflows.
For instance, if one were to add 0xffffffff as a code to mean the clock
output should be turned off.
Cc: Joe Hershberger <[email protected]>
Cc: Janine Hagemann <[email protected]>
Cc: Grygorii Strashko <[email protected]>
Signed-off-by: Trent Piepho <[email protected]>
Reviewed-by: Grygorii Strashko <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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When not using DM_ETH, these PHY settings are programmed with default
values hardcoded into the driver. When using DM_ETH, they should come
from the device tree. However, if the device tree does not have the
properties, the driver will silent use -1. Which is entirely out of
range, programs nonsense into the PHY's registers, and does not work.
Change this to use the same defaults as non-DM_ETH if the device tree is
lacking the properties.
As an alternative, the kernel driver for the phy will display an error
message and fail if the device tree is lacking.
Cc: Joe Hershberger <[email protected]>
Cc: Janine Hagemann <[email protected]>
Cc: Grygorii Strashko <[email protected]>
Signed-off-by: Trent Piepho <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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- mmc spi driver model support
- drop mmc_spi command
- enhanced Strobe mmc HS400 support
- minor mmc bug/fixes and optimization
- omap hsmmc and mvbeu update
- sdhci card detect support
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Flash system partition with fastboot will earse the partition firstly
The 600ms timeout will fail on some SD Card. Enlarge it to 5s to make
it works for most of sdcard
Cc: guoyin.chen <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add i.MX8QM compatible and soc data, the soc data is following Linux
i.MX SDHC driver.
Signed-off-by: Peng Fan <[email protected]>
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Implement set_enhanced_strobe hook for fsl_esdhc_imx,
,in esdhc_set_timing and esdhc_change_pinstate, also handle HS400_ES.
Signed-off-by: Peng Fan <[email protected]>
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Use mmc_of_parse to set host_caps.
Signed-off-by: Peng Fan <[email protected]>
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Parse no-1-8-v DT
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Jean-Jacques Hiblot <[email protected]>
Cc: Marek Vasut <[email protected]>
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Add HS400 Enhanced strobe properties parsing support to mmc_of_parse().
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Jean-Jacques Hiblot <[email protected]>
Cc: Marek Vasut <[email protected]>
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eMMC 5.1+ supports HS400 Enhances Strobe mode without the need for
tuning procedure.
The flow is as following:
- set HS_TIMIMG (Highspeed)
- Host change freq to <= 52Mhz
- set the bus width to Enhanced strobe and DDR8Bit(CMD6),
EXT_CSD[183] = 0x86 instead of 0x80
- set HS_TIMING to 0x3 (HS400)
- Host change freq to <= 200Mhz
- Host select HS400 enhanced strobe complete
Signed-off-by: Peng Fan <[email protected]>
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Should use CONFIG_IS_ENABLED not IS_ENABLED for clock and regulator drivers,
CONFIG_IS_ENABLED will check the CONFIG_SPL_CLK and CONFIG_SPL_DM_REGULATOR
when building SPL.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This patch rewrites MMC SPI driver using U-Boot DM
framework and get it's working on SiFive Unleashed
board.
Signed-off-by: Bhargav Shah <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
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The MMC mode and width are fixed for MMC SPI host hence we skip
sd_select_mode_and_width() and mmc_select_mode_and_width() for
MMC SPI host.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
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This operation may fail. Retry it a few times before giving up and report
a failure.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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Accessing the boot partition had been error prone with HS200 and HS400 and
was disabled. The driver first switched to a lesser mode and then switched
the partition access. It was mostly due to a bad handling of the switch and
has been fixed, so let's remove this 'feature'
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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The switch operation can sometimes make the bus unreliable, in that case
the send_status parameter should be false to indicate not to poll using
CMD13. If polling on dat0 is possible, we should use it to detect the end
of the operation.
At the end of the operation it is safe to use CMD13 to get the status of
the card. It is important to do so because the operation may have failed.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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The e-MMC spec allows the e-MMC to specify a timeout for the partition
switch command. It can take up to 2550 ms. There is no lower limit to this
value in the spec, but do as the the linux driver does and force it to be
at least 300ms.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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Starting with rev 4.5, the eMMC can define a generic timeout for the
SWITCH command.
Following Linux Kernel code, the timeout also changed from 1000 -> 500
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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