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Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.
Signed-off-by: Ramon Fried <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.
Signed-off-by: Ramon Fried <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link
Signed-off-by: Ramon Fried <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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KM Kirkwood boards now implement the driver model for its SPI flash
interface. Therefore, the old board specific claim and release functions
can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet
unused as well. All its appearances and dependencies are removed in the
kirkwood_spi driver, header files and finally the configuration whitelist.
Signed-off-by: Pascal Linder <[email protected]>
Signed-off-by: Holger Brunck <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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The weak functions, known from the legacy code, are added to the DM part
as well. For this purpose, the release operation first needs to be
implemented. KM Kirkwood boards will overwrite those weak functions to
change the MPP configuration when claiming/releasing the bus, because the
hardware pins are shared between the SPI NOR and NAND devices.
Signed-off-by: Pascal Linder <[email protected]>
Signed-off-by: Holger Brunck <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Adds dm_pci_flr API that issues a Function Level reset on a PCI-e function,
if FLR is supported.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This test is built on top of the existing swap_case driver. It adds EA
capability structure support to swap_case and uses that to map BARs.
BAR1 works as it used to, swapping upper/lower case. BARs 2,4 map to a
couple of magic values.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
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Makes dm_pci_map_bar API available for integrated PCI devices that
support Enhanced Allocation instead of the original PCI BAR mechanism.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This add missing parts for previous commit 06f94461a9f4
("fdt: Allow indicating a node is for U-Boot proper only")
At present it is not possible to specify that a node should be used before
relocation (in U-Boot proper) without it also ending up in SPL and TPL
device trees. Add a new "u-boot,dm-pre-proper" boolean property for this.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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By default LPUART driver with compatible string "fsl,ls1021a-lpuart"
support big-endian mode.On NXP SoC like LS1028A LPUART IP is
little-endian,Added support to Fetch LPUART IP Endianness from lpuart
device-tree node.
Signed-off-by: Vabhav Sharma <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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In general we should avoid calling malloc() and free() repeatedly in
U-Boot lest we turn it into tianocore. In SPL this can make SPI flash
unusable since free() is often a nop and allocation space is limited.
In any case, these seems no need for malloc() since the number of bytes
is very small, perhaps less than 8.
Signed-off-by: Simon Glass <[email protected]>
Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI
memory controllers)
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Generally block devices are not enabled in TPL, but in case they are,
add a Kconfig option for the block cache. This allows the setting (default
off) to be found with CONFIG_IS_ENABLED().
Signed-off-by: Simon Glass <[email protected]>
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Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix
this by using the expected compatible string in the flash node.
Signed-off-by: Simon Glass <[email protected]>
Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
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At present this returns but it seems better to just exit sandbox
immediately.
Signed-off-by: Simon Glass <[email protected]>
reset
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[trini: Migrate sama5d27_som1_ek_qspiflash/sama5d2_xplained_qspiflash
for CONFIG_ENV_SECT_SIZE]
Signed-off-by: Tom Rini <[email protected]>
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I also added comments for NAND clocks.
Signed-off-by: Masahiro Yamada <[email protected]>
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Add SPI controller driver implemented in Socionext UniPhier SoCs.
This controller has the SPI master mode only.
Signed-off-by: Kunihiko Hayashi <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features and fixes for 2019.10 cycle
This includes the Atmel QSPI driver and support for the at91 boards.
This is the port of the driver from Linux, mostly done by Tudor Ambarus.
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The previous pcf2127 RTC chip could not read and set the correct time.
When reading the data of internal registers, the read address was the
value of register plus 1. This is because this chip requires the host
to send a stop signal after setting the register address and before
reading the register data.
This patch sets the register address using dm_i2c_write and reads
the register data using the original dm_i2c_xfer in order to generate
a stop signal after the register address is set, and fixes the bug of
the original read and write time.
Signed-off-by: Biwen Li <[email protected]>
Signed-off-by: Chuanhua Han <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Prior to starting a new transfer, conditionally wait for bus to not
be busy.
Reinitialise controller as otherwise operation is not stable.
For reference, see linux kernel
commit 9656eeebf3f1 ("i2c: Revert i2c: xiic: Do not reset controller before every transfer")
hs: Fixed DOS line endings
added missing '\n'
Fixed git commit description style
Signed-off-by: Tomas Melin <[email protected]>
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Comparison should be against the actual message length, not loop index.
len is used for stopping while loop, pos is position in message.
stop should be sent when entire message is sent, not when
len and pos meet.
hs: fixed DOS line endings
Signed-off-by: Tomas Melin <[email protected]>
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Get clock rate from clock DM if CONFIG_CLK is enabled.
Otherwise, uses IC_CLK define.
Signed-off-by: Ley Foon Tan <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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Before calling __dw_i2c_set_bus_speed(),
the I2C could already be set as ether enable or disable,
we should restore the original setting instead of enable i2c anyway.
This patch fix a bug happened in init function:
__dw_i2c_init(){
/* Disable i2c */
...
__dw_i2c_set_bus_speed(i2c_base, NULL, speed);
writel(slaveaddr, &i2c_base->ic_sar);
/* Enable i2c */
}
In this case, enable i2c inside __dw_i2c_set_bus_speed() function
will cause ic_sar write fail.
Signed-off-by: Jun Chen <[email protected]>
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This allows to silence ubi and ubispl individually.
Signed-off-by: Markus Klotzbuecher <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Kyungmin Park <[email protected]>
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The motivation is to use the UBI atomic volume rename functionality to
allow double copy software updates on UBI. To that end the SPL is
configured to always load the same volume name (e.g. "u-boot"),
whereas a software updater always installs into the secondary volume
"u-boot_r". After successful installation, these two volume names are
switched.
This extension is protected by #ifdefs as it will somewhat slow down
loading of volumes by id. This is because the code needs to disable
the optimization of ignoring all volume ids which are not
to-be-loaded, since these can only be resolved after attaching.
This adds two vtbl related functions from Linux, which are taken from
the same kernel version as the current main U-Boot UBI code (Linux 4.2
64291f7db5bd8).
Signed-off-by: Hamish Guthrie <[email protected]>
Signed-off-by: Markus Klotzbuecher <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Kyungmin Park <[email protected]>
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- drop CONFIG_ prefix from kconfig entry
- fix small compilation issue with CONFIG_UBI_SILENCE_MSG
Signed-off-by: Markus Klotzbuecher <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Kyungmin Park <[email protected]>
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- Pull in the series to split fsl_esdhc for i.MX/non-i.MX cleanly
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https://gitlab.denx.de/u-boot/custodians/u-boot-video
- fix pwm backlight
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set_pwm() will always fail with -ENOSYS if pwm_ops set_invert() is
not implemented, leaving the backlight dark. Fix this by returning
no error if set_invert() is not implemented and no polarity change
is requested.
Fixes: 57e7775413 ("video: backlight: Parse PWM polarity cell")
Signed-off-by: Marc Dietrich <[email protected]>
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dwc3-generic has been broken since MISC uclass has been modified to scan DT
sub-nodes after bind.
Fixing it by a using the no-op uclass.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This uclass is intended for devices that do not need any features from the
uclass, including binding children.
This will typically be used by devices that are used to bind child devices
but do not use dm_scan_fdt_dev() to do it. That is for example the case of
several USB wrappers that have 2 child devices (1 for device and 1 for
host) but bind only one at a any given time.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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There is simply no reason to do that here.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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The EHCI iMX6 driver is only partly converted to DT probing and
still uses a tremendous amount of hard-coded addresses. Worse,
the driver uses hard-coded SoC-model-specific base addresses, which
are derived from values protected by SoC-specific macros, hence the
driver is also compiled for a specific SoC model. Even worse, the
driver depends on specific sequential indexing of the controllers,
from which it derives offsets in the PHY and ANATOP register sets.
However, when the driver is probed from DT, the indexing is not
correct. In fact, each controller has index 0. This patch derives
the index for DT probing case from the controller base addresses,
which is not the way this should be done, however it is the least
intrusive approach, favorable this close to release.
The necessary steps to convert this driver fully to DT probing are
described inside the patch, however this should be done in the next
release and depends on iMX clock driver patches.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Abel Vesa <[email protected]>
Cc: Adam Ford <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Ludwig Zenz <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Vagrant Cascadian <[email protected]>
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Add pin-mux settings for SPI controller.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Signed-off-by: Masahiro Yamada <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2019.07
- menlo board
- allow SDB on Sabre
- HAB for mx6sl
- apalis board
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Add support for loading u-boot FIT images over the USB SDP protocol in
the SPL
Signed-off-by: Frieder Schrempf <[email protected]>
[Various build fixes]
Signed-off-by: Sjoerd Simons <[email protected]>
Tested-by: Fabio Estevam <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
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Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu <[email protected]>
Tested-by: Steffen Dirkwinkel <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Martyn Welch <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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Dropped i.MX code which couldn't be reused.
Signed-off-by: Yangbo Lu <[email protected]>
Tested-by: Steffen Dirkwinkel <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Martyn Welch <[email protected]>
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The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and
more different. We should have split it into two drivers, like them
(sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
This patch is just to create a fsl_esdhc_imx driver which is a copy
of fsl_esdhc driver for i.MX processors. We will convert i.MX processors
to use fsl_esdhc_imx, and clean up the two drivers separately in the
future patches.
Signed-off-by: Yangbo Lu <[email protected]>
Tested-by: Steffen Dirkwinkel <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Martyn Welch <[email protected]>
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- boot failure fix for Intel edison
- tangier wdt conversion to driver model
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Convert legacy driver to use watchdog class.
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The default timeout value had been left in order to leave some traces
about default setup of watchdog done by firmware.
For better understanding and compiler burden, replace it with a comment.
Suggested-by: Stefan Roese <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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commit b7598a43f2b4 ("[PATCH] Avoid assigning PCI resources from
zero address") only moved the bus lower address to 0x1000 if the
given bus start address is zero. The comment said 0x1000 is a
reasonable starting value, hence we'd better apply the same
adjustment when the given bus start address is below 0x1000.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Signed-off-by: Shannon Barber <[email protected]>
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The driver was using milliseconds and programming it into a register
which takes ticks of the watchdog clock, which runs at 1MHz. This meant
we were off by 1000 with the desired value.
When 06985289d452 ("watchdog: Implement generic watchdog_reset()
version") was added the aspeed board would leave the watchdog running,
causing it to bite before u-boot was done.
Discovered by booting in qemu:
$ qemu-system-arm -M ast2500-evb -drive file=test.img,format=raw,if=mtd -nographic -no-reboot -d cpu_reset
U-Boot 2019.07-rc3-00091-g2253e40caef5 (Jun 06 2019 - 16:53:23 +0930)
Model: Aspeed BMC
DRAM: 496 MiB
WDT: Started with servicing (60s timeout)
MMC:
In: serial@1e784000
Out: serial@1e784000
Err: serial@1e784000
Watchdog timer expired.
Fixes: 06985289d452 ("watchdog: Implement generic watchdog_reset() version")
Signed-off-by: Joel Stanley <[email protected]>
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- PCIe driver change to support DM model
- T2080QDS migrated to use PCIe DM model
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https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Update STM32MP entry in MAINTAINERS
- Handle correctly binding for g-tx-fifo-size for USB DWC2 driver
- Fix trusted STM32MP1 defconfig with correct ethernet driver
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- Avoid HS400 mode when accessing boot partitions
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